All,
During Connect the suggestion was made that each working group should have
its own IRC Channel for discussions and topics relating to the group in
particular (as opposed to #linaro which is 'generic' Linaro conversations).
Therefore I have just set up #linaro-tcwg on Freenode for the Toolchain
Working Group.
This channel is public and open to anyone who wants to talk with the TCWG
group about anything toolchain related.
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
SVE Support ([VIRT-198])
========================
- generated a [narrow test case for fdiv_64 rounding error]
- doesn't hit much code but I possibly misunderstanding [the code]
AFAICT inc = ((frac & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 :
0); seems reasonable
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[narrow test case for fdiv_64 rounding error]
https://github.com/stsquad/qemu/tree/testing/generic-op-tester
[the code]
https://github.com/stsquad/qemu/blob/testing/generic-op-tester/fpu/softfloa…
QEMU Tooling ([VIRT-252])
=========================
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- following discussion with team started adding plugin hooks to
[tracepoint clean-up]
- I think I need to resurrect and expand the cputlb de-macro stuff
to cleanly add memory tracing
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[tracepoint clean-up]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 0/4} fixes for kvm/arm64 guest debug Message-Id:
<20180926112048.17778-1-alex.bennee(a)linaro.org>
- posted {PATCH} cpus: fix TCG kick timer leak Message-Id:
<20180927171724.30128-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Tasks
===========
- Administrava
- sorted out expenses for Connect
- organising travel/accommodation for KVM Forum 2018
Completed Reviews [1/1]
=======================
{PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-28 Fri 19:40]
I'm happy with this
Absences
========
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {RFC PATCH 00/13} target/arm: Derive cpu id regs from features
Message-Id: <20180915161738.25257-1-richard.henderson(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {RFC PATCH v2 00/23} KVM: arm64: Initial support for SVE guests
Message-Id: <1538141967-15375-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH 00/35} exec: drop BQL from interrupt handling
Message-Id: <20180917163103.6113-1-cota(a)braap.org>
* {PATCH v3 00/13} i386 + x86_64 mttcg
Message-Id: <20180911202823.21657-1-cota(a)braap.org>
--
Alex Bennée
[Connect]
Wrote up Connect Report with notes of presentations and hack-rooms,
for better or worse we have 20 pages of notes.
Wrote up Jira discussion
[TCWG-1468]
Made an example of how to use cmake, clang, newlib and a gcc-embedded
toolchain to build an example and run it on qemu.
[TCWG-1473] Linux kernel big-endian builds
Nearly have a fix that I'm happy with ready to submit.
[TCWG-1471] Fix the Armv6 Linux kernel build
Committed upstream today.
=== Work done during these past 3 weeks ===
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ all my tests pass, started to implement further minor changes to the syntax
* PR87374: external review
+ investigate bug, write patch, test it and send for external review
* GCC PR85434 / CVE-2018-12886: rework needed
+ Approved upstream but found when doing last minute testing after rebase
+ Testing on a wide number of targets a patch to register allocator
to properly ignore some operand when told to
* Linaro Connect Vancouver 2018
+ prepare talk, attend event and write up reports
* Regression testing of LLVM release:
+ extend script to do a LLVM release to be able to build from an
arbitrary branch
+ make weekly regression build from trunk
+ fix here-doc in regression job to test release when scripts it use change
Misc:
+ bits of line management
+ catching up on emails
=== Plan for week 40 ===
* GCC PR85434 / CVE-2018-12886:
+ finish testing, and get both register allocator fix and stack
protector fix committed
* PR87374: external review
+ add documentation and send back for external review
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ finish change to suport last syntax changes
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ start cleaning up the code
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management
Progress:
* Post-travel/holiday catchup (email, expenses claims, code review,
team meetings etc)
(this was the lion's share of the time)
* VIRT-65 [QEMU upstream maintainership]
- some patches to fix clang warnings about taking the
address of a field in a packed struct
- make the compatibility "virt-2.10" machine really behave like the 2.10
QEMU's virt board: don't generate external aborts for accesses to bad
physical addresses. (It turns out a few misconfigured Linux
kernels do this.)
- noticed that we only have another 40 or so devices to convert
to be able to complete an API transition (sysbus init methods):
wrote this up for the list to nudge people into doing some conversions
thanks
-- PMM
Progress:
This week was Linaro Connect (Vancouver). Recordings are
online for most sessions I think; some may still be in the
process of being uploaded. For other presentations see:
https://connect.linaro.org/resources/yvr18/
Interesting presentations:
* "My other Machine is Virtual"
-- Alex's talk summarising QEMU's current tracing/debug facilities:
https://connect.linaro.org/resources/yvr18/yvr18-118/
* "SBSA QEMU"
-- Summary of work on an "enterprise" model in QEMU intended for use
as a development platform for firmware and other lower-level code.
https://connect.linaro.org/resources/yvr18/yvr18-511/
* "How to build a C++ processing tool using the clang libraries"
-- Peter Smith doing a fast pass through the clang library APIs
you can use for refactoring-type tools that operate on C++ source.
Watch the talk to figure out if this is something you want to
do at all; read the slides separately for the fine detail and
links to where to find more info, if the answer is "yes"...
https://connect.linaro.org/resources/yvr18/yvr18-223/
* "Diary of a drive-by coder: tips and tricks for working with upstream"
-- James Bottomley talks about successes and failures in upstreaming
one-off patches if you're not a member of the community. I also
asked in the Q&A about what communities can do to make life
easier for such contributors (answer mostly revolved around
better and clearer communication about the chances of a change
being accepted)
https://connect.linaro.org/resources/yvr18/yvr18-503/
* "An open source developer and a lawyer walk into a bar..."
-- Jilayne Lovejoy's keynote
(Personal takeaway: try to reduce my use of "IANAL, but...".)
https://connect.linaro.org/resources/yvr18/yvr18-200k2/
* Fujitsu's keynote on their new A64FX CPU:
https://connect.linaro.org/resources/yvr18/yvr18-400k1/
* Arm Architecture Enhancements in 2018
Matt Gretton-Dann's presentation of ARM v8A 8.5 features.
I was particularly encouraged to see that Arm have been able
to make public the system register and ISA XML on the same day
they announce the new features publicly.
https://connect.linaro.org/resources/yvr18/yvr18-104/
Useful meetings:
* discussion with RTH about handling CPU ID register fields
vs internal QEMU "enable this feature" bits (we have a bit of
an ugly mix of specifying the same thing in both places, and
also overriding ID reg fields from feature bits in some cases;
we'd like to achieve a bit more consistency in what we do...)
* discussion with RTH/Alex on instrumentation plugin APIs. I hope
we're now more or less on the same page about the general principles.
* QEMU roadmap sync with Alex/RTH/Maxim:
- finish v8M work
- heterogenous CPU support (for Musca board emulation)
- finish SVE
- fill in other v8.x missing emulation support
- instrumentation work
Other:
* Greensocs have sent out some QEMU patches to do with
modelling clock trees, which also touch a bit on reset.
QEMU's modelling of reset at the moment is pretty terrible,
so I had a think about how we might manage to do it better.
(Notably we currently only model power-on reset, and we don't
have a good answer for "device A in reset wants to assert a
signal that connects to device B, but there's no guarantee
about what order A and B will reset in". Does anybody know of
any good existing treatments of modelling device reset ?)
thanks
-- PMM
o LLVM
* Buildbots babysitting:
- Investigating armv7 bots failures, having hard time to reproduce the issue
* Machine Outliner on ARM prototype:
- worked on LTO integration
- more stack fixups to handle
o Misc
* Various meetings and discussions.
QEMU Tooling ([VIRT-252])
=========================
- thoughts after reviewing {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary
instrumentation prototype Message-Id:
<152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
- we want rich tooling but don't want to leak internals to plugins
- the proposed helper per insn is pretty limited/hacky
- I think we could expand exiting trace support with plugins
- plugin hook to trace points
- plugin either filters trace points or does in-situ analysis
- existing trace infrastructure used to export data
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
Upstream Work ([VIRT-109])
==========================
- investigating CI failure in master:
- The [Travis builds have been broken for a while]
- meanwhile it looks like [atomic_8 issues have broken 32 bit
builds]
- reviewed {PATCH 0/6} i386 + x86_64 mttcg Message-Id:
<20180903171831.15446-1-cota(a)braap.org>
- posted {RFC PATCH 0/4} Add Nios II cross-compiler and enable
tests/tcg Message-Id:
<8346c1bb-9cb6-4c08-66a2-b5e5a31903d4(a)vivier.eu>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[Travis builds have been broken for a while]
https://travis-ci.org/qemu/qemu/builds
[atomic_8 issues have broken 32 bit builds]
https://app.shippable.com/github/qemu/qemu/dashboard
Other Tasks
===========
- Continued working on "My Other Machine is Virtual" talk for YVR18
- finished main talk, iterating and practising now
- also made a few [fixes and enhacements for tlb tracking]
- Administrava
- caught up with expense claims for SynQuacer
- organising for KVM Forum 2018
- organising/travel to Connect
[fixes and enhacements for tlb tracking]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Completed Reviews [4/4]
=======================
{PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-09-07 Fri 16:36]
Already in target-arm.next
{Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
- CLOSING NOTE [2018-09-07 Fri 17:41]
Already merged
{PATCH 0/6} i386 + x86_64 mttcg
Message-Id: <20180903171831.15446-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-10 Mon 10:18]
Quick pass, looks OK but a question about __thread w.r.t tcg globals
{PATCH v2 0/2} softfloat tests based on berkeley's testfloat
Message-Id: <20180908191735.22861-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-10 Mon 12:27]
Looks like an improvement on IBM test suite but needs a few more
tweaks.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
* {PATCH v3 00/13} i386 + x86_64 mttcg
Message-Id: <20180911202823.21657-1-cota(a)braap.org>
* {PATCH v6 00/25} Fixing record/replay and adding reverse debugging
Message-Id: <20180912081747.3228.21861.stgit@pasha-VirtualBox>
* {Qemu-devel} {PATCH v2 00/11} convert CPU list to RCU
Message-Id: <374f82bc-1680-a59d-aa71-31e88e4936a2(a)redhat.com>
* {Qemu-arm} {PATCH 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20180901124639.19735-1-luc.michel(a)greensocs.com>
* {Qemu-devel} {PATCH v4 0/5} Acceptance/functional tests
Message-Id: <20180530184156.15634-1-crosa(a)redhat.com>
--
Alex Bennée