[Activity]
[TCWG-1384]
- Implemented missing TLS LE relocations in LLD
- Found out while testing that LLVM had the range check in locally
resoloved fixups for Thumb2 BL wrong, and was not range checking B.w
or Bcc.W at all. Patches submitted for review.
[LLD]
- Submitted extra test cases to improve code-coverage
- Arm LLD 2 stage build-bot including test suite now configured
(thanks Maxim!), will be active upstream soon.
- Started to think about how ICF could be implemented in clang
-- Should be able to make a prototype using clang libtooling
[TCWG-1236]
- Added aarch64 emulation used by Android to LLD
- Tried and failed to get Android to boot when using LLD, narrowed
down the number of modules that could be problematic but I think that
the main symptom is dlopen failing on some modules.
- Found that Google have added LLD support to the Android build system
with a very slightly tweaked version of LLD. This will successfully
boot Android. The main differences are:
-- Google's LLD is a few weeks behind trunk.
-- They have reverted a couple of patches that add undefined symbols
from Shared Objects and allow these to resolve against static
libraries. These patches are correct and I think it is just exposing
some library dependency problems in Android.
-- They are setting -zmax-page-size to 4K on AArch64, LLD defaults to 64K.
--- Android dynamic linker does use 4K page size, but Gold still
seems to use a 64K max page size and I can't see why overaligning
would cause problems.
-- A handful of modules have LLD disabled.
[Plans]
- Investigate differences in trunk and Google Android LLD to see if I
can pinpoint why trunk is failing to boot Android.
- Start to build a prototype with libtooling that records when the
address of a function/member-function/lambda is taken.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review:
- RTH's v8.1 atomics emulation patchset
- bugfix to cmsdk UART model
- bugfix to MPUIR access check for OMAP/StrongARM emulation
- Alex's float-to-float conversion refactoring
- SMMUv3 now fully reviewed and in target-arm.next
+ tracked down a bug in our handling of "DUP" vector instruction
that turned out to be in the new x86 codegen backend that tries
to use MMX instructions and wasn't quite getting it right. Patch sent.
* VIRT-164 [improve Cortex-M emulation]
+ working on emulation of Memory Protection Controller; I think we can
do this neatly using QEMU's IOMMU emulation framework, but it needs
some improvements to the framework to make that work:
- feed memory transaction attributes to the IOMMU translate function
so it can use secure/nonsecure attribute to make decisions
- allow TCG code to handle accessing data and executing from RAM
that's on the far side of an IOMMU (currently it asserts if you
set up a system with an IOMMU in the CPU's data path)
I have some prototype patches that deal with these and use them in an MPC
model, which need debugging.
thanks
-- PMM
- Off Tuesday (May 1st)
== Progress ==
* GCC
- FDPIC
- GCC: updating patches to handle new target name: lots of
testsuite and target libs configure changes needed.
- QEMU: patches merged in master, thanks to Peter's reviews.
* GCC upstream validation:
- reported a few new failures/regressions
* Infrastructure:
- patch reviews
- stopped trying to use TK1s until they are back in Jenkins
- cleanup
- tcwg-1404: small patches to prepare use of slaves outside our VPN
* misc (conf-calls, meetings, emails, ....)
== Next ==
* very short week (only Monday)
* FDPIC:
- GCC continue cleanup
* GCC upstream validation
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2018.04
snapshot of Linaro GCC 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.3+svn259627 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be part of the 2018.05 stable[2] quarterly
release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.3-2018.04/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.3+svn259627
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.4+svn259634 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the next maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.4+svn259634
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
