All,
During Connect the suggestion was made that each working group should have
its own IRC Channel for discussions and topics relating to the group in
particular (as opposed to #linaro which is 'generic' Linaro conversations).
Therefore I have just set up #linaro-tcwg on Freenode for the Toolchain
Working Group.
This channel is public and open to anyone who wants to talk with the TCWG
group about anything toolchain related.
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
Hi ,
I am a SW engineer that use Linaro-toolchain to build images,
Recently, I encounter some issue about enable NEON features on ARMv8 processor platform.
I cat cpuinfo, can not find neon and vfp feature enable in list, the image was build with aarch-64 toolchian;
While, the image built by armv7l toolchain can list "neon and vfp" in cpuinfo.
I want to verify from your side,
1. if the toolchain of aarch64 version already enable" neon and vfp " in default, Because I do not find some build items that related with "neon",
2. If not supported defaultly, can you give some suggestion to enable it.
Thanks & B.R.
Joy Deng
== This Week ==
* TCWG-1005 (4/10)
- Iteration on upstream feedback and validated patch
- Committed to trunk in r254140.
* Reverse of TCWG-1253 transform (3/10)
- Adding reverse transform for div pattern in expand
* TCWG-1234 (2/10)
- Experimenting with "unhoisting" approach
* Misc (1/10)
- Meetings
== Next Week ==
- Continue ongoing and backlog tasks from JIRA
- Go through IPA mod/ref paper
* One day off
== Progress ==
o Linaro GCC/Validation
* Releases handover
- GCC 5.5 source snapshot and RC1 deployed
- GCC 6 and 7 RCs under construction
o LLVM
* Continue ramp-up
* Upstream bug 32999:
- Validating a fix
o Misc
* Various meetings and discussions.
== Plan ==
o Continue release handover and LLVM ramp-up
== Progress ==
* GCC
- FDPIC: started reading docs and looking at patches
- Neon intrinsics PR71233: duplicates will be removed from the next doc update
* GCC upstream validation:
- since ubsan merge with upstream, validation of arm targets is now
broken. Switching back to qemu-2.7 seems to avoid qemu deadlocks, but
there are still new asan test failures after the merge.
- reduced the dejagnu timeout to avoid global 'make check' timeouts,
but this caused some testcases to become zombies, in turn causing
problems in the ST compute farm.
- validation on-hold until next so that I can experiment a bit more
with workarounds
- reported another qemu bug
- reported a couple of regressions/breakages in binutils
* Infrastructure:
* misc (conf-calls, meetings, emails, ....)
== Next ==
* GCC upstream validation
* GCC/ubsan
* GCC/FDPIC
* Short week (off Wed/Thu/Fri)
* TCWG-1040, [4/10]
Update my patches to remove the last use of MAX_REGISTER_SIZE.
Post the clean up and refactor patches.
* TCWG-1125, [4/10]
ARMv8 tagged address support in GDB.
v2 patches are posted. Take care of breakpoint and watchpoint on
tagged address carefully.
* ILP32 GDB branch. [1/10]
Branch is created! Done.
* Misc, meeting, [1/10]
# Plan #
* Update my patches to remove the last use of MAX_REGISTER_SIZE.
* GDB flexible target description conversion. Upstream patches.
--
Yao Qi
Hi,
We are evaluating LInaro GCC5.4 readiness for ARMv8.2-A extension support but can't find direct answer if all the features has been supported/backported.
Can you point me to the answer?
Thanks,
Vincent
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== Progress ==
o Linaro GCC/Validation
* Releases handover
- Monthly snapshots for GCC 6 and 7 deployed
- GCC 5 final release handled by Mark
* Branch merge done
* Tarball and release ready to be deployed
* RC1 planned for w43
o LLVM
* Continue ramp-up
* Working on upstream bug 32999:
[ARM] Missed vpadd combine opportunity
o Misc
* Various meetings and discussions.
== Plan ==
o Continue release handover and LLVM ramp-up