== This Week ==
* TCWG-1005 (malloc attr propagation) (4/10)
- Extended for pointer comparisons
- Patch review from Kugan
- Removed some cruft from the patch
* TCWG-1010 (bitwise dce propagation) (4/10)
- Started working on prototype
* Misc (2/10)
- Looked at Wheader-guard
- Building chromium with gcc
- Meetings
== Next Week ==
- TCWG-1005, TCWG-1010
~ Progress ~
* TCWG-984, PR 20939, GDB aborts if there is an error in disassembly. [3/10]
It is a blocker to 7.12.1 release. Fixed it in 7.12 branch.
Address comments and manage reviewer's expectations on the
patches for mainline.
* Approved two Alan's SVE GDB preparatory patches. [1/10]
* Reviewed Dave Martin's SVE user space VL control API. [1/10]
Can't figure out a case that debugger or debugger user wants to change VL.
* Review DWARF patch in big endian on DW_OP_implicit_value. [2/10]
Played with the patch, and use part of it in existing gdb tests.
Found other GDB bugs, and fixed them. Some readings on DWARF 5.
Will post my patches next week and continue reviewing the DWARF patch.
* Booked Hungary visa appointment.
* Training. [3/10]
~ Plan ~
* TCWG-984, GDB aborts if there is an error in disassembly.
* Carefully read IBM's kernel debugging patches.
* Set up AArch64 bare debugging with GDB, OpenOCD, JTAG and
HiKey. Soldering is needed.
--
Yao Qi
[TCWG-614] Range extension thunks
Started process of upstreaming the conversion of Thunks to SyntheticSections.
- Patch 1 of 3 committed, move Thunk Creation later in the link step.
- Patch 2 of 3 add support for local symbol creation in upstream review
- Patch 3 of 3 waiting for patch 2
Made a patch to output mapping symbols in PLT to test local symbol
creation. Not recommending this for inclusion in lld yet, but have
included as a way of testing 2.
Responded to comment on implementation and overall Thunks proposal.
Plans for next week:
Yet more range extension work, hope to get patches 2 and 3 above committed.
== Progress ==
* Out of office Mon-Wed [6/10]
* [ARM] Use AddDefaultPred everywhere [TCWG-987]
- Committed upstream
* LLVM AArch64 4.0.0 [ TCWG-1008] [1/10]
- Ran the tests for rc1, everything went smoothly
* [AArch64] Investigate PR30225 [TCWG-1021] [1/10]
- Someone noticed that llvm-mc is using a different code/data
alignment factor for the call frame information than gas, trying to
figure out if that would actually confuse a debugger
* Misc [2/10]
- Mailing lists, code reviews, meetings etc
=== This Week ===
Monitor LLDB buildbot for minimum down time. [TCWG-712] [1/10]
-- LLDB Arm build was broken and then fixed upstream but a buildbot script bug.
-- Fixed buildbot script to make sure not every type of build is
refreshed after a breakage.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012] [3/10]
-- Investigated and fixed TestRegisterVariables
(https://reviews.llvm.org/D28666)
-- Fixed a log issue which I initially thought was a bug.
(https://reviews.llvm.org/rL291889)
-- No further AArch64 failures except for one test timedout needs
further investigation.
-- Some tests fail randomly on AArch32 but pass when run individually.
More investigation needed.
LLDB Arm/AArch64 Investigate and fix testsuite crashes (Pine64
Crashes) [TCWG-792] [2/10]
-- There was some problem occuring when multiple versions of python
are installed on tester.
-- Also some tests are leaving behind runaway processes.
-- Cleaned up testers removed python issue ended up reducing test time
to 3 minutes.
-- Trying to track runaway processes.
Miscellaneous Activities [4/10]
-- Travel to Islamabad for Hungary visa interview (9th-10th Jan 2017).
-- Meetings, Emails etc.
=== Next Week ===
ARM/AArch64 hardware breakpoints [TCWG-717]
-- Investigate current status and create task breakdown.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012]
-- Further tracking on runaway processes when running AArch32 testsuite.
-- Investigation of timedout tests on AArch64.
o Teaching activity (4/10)
== Progress ==
o Linaro GCC/Validation (4/10)
* Merge FSF GCC 6 branch into Linaro one
* Backports reviews
* Delivered snapshot of 6.3-2017.01 source package
* Merge FSF 4.9 branch into Linaro one
o Misc (2/10)
* Various meetings and discussions.
== Plan ==
o Last GCC 4.9 snapshot
o GCC 5.4 release
[TCWG-614] Long branch thunks:
Implemented a prototype of the existing Thunk implementation using
Synthetic (Linker created sections) and moved it close to the area it
will need to go for Long Branch Thunk work.
Worked on this exclusively all week.
Plans for next week:
[TCWG-614] Long branch thunks:
Tidy up and refactor prototype to a point where I can post for
upstream review. This won't be long-branch thunk support but it will
be a significant intermediate step.
Do a draft plan of Connect submission and decide how long I need.
== Progress ==
* [ARM] Use AddDefaultPred everywhere [TCWG-987] [1/10]
- Proposed a refactoring first [TCWG-1015]
- Rebased initial patch after the refactoring, still waiting for review
* Refactor AddDefaultPred [TCWG-1015] [4/10]
- Initial implementation was a bit heavyweight, so I worked on a
simpler version based on people's suggestions
- Committed upstream
* Misc [5/10]
- Got up to speed after vacation
- Booked travel for Connect and EuroLLVM
- FOSDEM slides
- Upstream code reviews
- Reverted and ran pre-commit tests for some compiler-rt patches
that broke the buildbots
== Plan ==
* 3 days off (Mon-Wed)
* [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980]
- I have 3 patches in upstream review, I will keep pinging them
- Putting GlobalISel work on hold until these patches go through