Progress:
- Read up on AARCH64 TLS and LLD code base
- Commented on upstream patch in hope of getting approval from the code-owners
- TCWG-466 Implement ADRL pseudo in LLVM assembler
-- Slow progress as the pseudo instruction does not fit well into the
existing architecture
-- On the positive side I have learned quite a bit about how the LLVM
assembler works
-- Will make a decision next week whether it is worth actively
pursuing TCWG-466. Supporting ADRL is not high priority and whatever
fix I come up with may be difficult to get accepted upstream. I'd
still like to keep trying, at least as a background task, but I think
that there is higher priority work that can be done instead.
Next Week:
On holiday (hopefully added correctly to Linaro google calendar). I'll
be at the ACCU conference.
== Progress ==
* Validation
- finally identified what caused several random results: use of 'ssh
-tt' to acces the remote tester. I don't know the real cause.
* GCC
- reported a few regressions in trunk
- a few backports
- AdvSIMD intrinsics tests: built the list of AArch64 intrinsics not
yet covered
- support on a few bug reports
* Misc (conf-calls, meetings, emails, ....)
== Next ==
* Holidays Mon/Tue/Wed
* Validation
- consolidation on stdout/stderr problems
- extended validation
* GCC:
- trunk monitoring, report regressions if needed
- start monitoring the just-created gcc-6 branch
- more intrinsics tests
- switch backport activity to gcc-6 branch, update tools, etc...
# Progress #
* TCWG-545, 7 patches are approved, and 1 patch needs update, which
needs the change somewhere else. [3/10]
* TCWG-547, patch is pending. Pinged Pedro on IRC, to be reviewed, but
no response.
* TCWG-167, [3/10]. ARM reverse debugging fixes. Post one patch to fix
test case. Testing another patch to give high priority of epilogue
unwinder.
* Upstream patch review, [2/10]. Spend more time on this due to long
patch review backlog. The more I reviewed, the sooner my patches will
be reviewed by others.
* Misc, [2/10]
** Look at the slowness of gdb regression test in jekins validation, but
can't reproduce it.
** Share some knowledge of watchpoint implementation in GDB to the
people, who need the equivalent or similar things in LLDB.
# Plan #
* TCWG-545, TCWG-547, TCWG-167.
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.04 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.3+svn234898 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.05
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.04/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn234898
* Backport of [Bugfix] [AArch32] Fix PR target/70496
* Backport of [Bugfix] [AArch32] PR driver/70132: Avoid double fclose
in driver-arm.c
* Backport of [Bugfix] [AArch32] PR rtl-optimization/69904: Disallow
copying/duplicating of load-exclusive operations
* Backport of [Bugfix] [AArch32] PR target/62254 Fix for ARMv3
* Backport of [Bugfix] [AArch32] PR target/69614
* Backport of [Bugfix] [AArch32] PR target/70566 Check that condition
register is dead in tst-imm -> lsls-imm Thumb2 peepholes
* Backport of [Bugfix] [AArch32] PR testsuite/70553
* Backport of [Bugfix] [AArch64] PR rtl-optimization/70398 LRA
* Backport of [Bugfix] PR 69400: Invalid 128-bit modulus result
* Backport of [Bugfix] PR middle-end/70370
* Backport of [AArch32] 1/2 Cortex-R8 support
* Backport of [AArch32] Add initial support for the Cortex-A32
* Backport of [AArch32] Add support for Cortex-A35
* Backport of [AArch32] Delete ASM_OUTPUT_DEF and fall back to default
.set directive
* Backport of [AArch64] 1/3 Enable CRC by default for armv8.1-a
* Backport of [AArch64] 2/3 Rework the code to print extension strings (pr70133)
* Backport of [AArch64] 3/3 Fix up for pr70133
* Backport of [AArch64] [ACLE][NEON] Implement vcvt*_s64_f64 and
vcvt*_u64_f64 NEON intrinsics
* Backport of [AArch64] Add extra tuning parameters for target processors
* Backport of [AArch64] Add support for Cortex-A35
* Backport of [AArch64] Only update assembler .arch directive when necessary
* Backport of [Testsuite] [AArch32] 2/2 Cortex-R8 support
* Backport of [Testsuite] [AArch64] PR target/70113 fix pr63304_1 testcase
* Backport of [Testsuite] [AArch64] Skip
gcc.target/aarch64/assembler_arch_1.c if assembler does not support it
* Backport of [Testsuite] Avoid GDB being blocked on signals
* Backport of [Testsuite] Fix testsuite for Cortex-R8 support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
== Progress ==
* Type promotion pass (2/10)
- Benchmarking
* LTO (7/10)
- Refactoring tree-vrp to share common parts
- Looking at open enhancement bugzilla and working on them
* Misc (1/10)
- GCC Lists
== Plan ==
* LTO and VRP
== Progress ==
LLDB Buildbot Setup [TCWG-241] [9/10]
-- Migration of local master/slave setup to Linaro LLVM lab.
-- Setup slave to be able to connect to chromebook for lldb remote testing.
-- Modified Android build scripts to work with chromebook in llvm lab.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
== Plan ==
LLDB Buildbot Setup [TCWG-241]
-- Write a new factory for linux based lldb script commands
-- Break down and tweak scripts with better logical steps.
-- Migrate current setup to use new factory.
LLDB development [TCWG-563]
-- Look into failing tests on chromebook tester and see if some of
them can be fixed.
== Progress ==
o Extended validation (5/10)
* Dejagnu remote layout patch finalized and committed upstream
(will be part of the coming 1.6 Dejagnu release)
* GCC guality test fix committed in trunk.
* Native armv8l validation unblocked, but still slow (more than 8hrs)
Analysis on-going.
* Start to work on enhancement:
include cross validation and benchmark trigger.
o Misc (5/10)
* Lot of meetings (Internal, training, Benchmarking, ...)
== Plan ==
o Monthly snaphsot (review backports, branch merge)
o Continue on extended validation
o GCC ARMv8.1 builtins fix.
== Progress ==
Transition week into Linaro toolchain group from ARM to replace Bernie [*]
- Some ARM handover work done.
- Started looking into https://llvm.org/bugs/show_bug.cgi?id=24350 (TCWG-466
ADRL support)
-- Checked behaviour of ADRL on armasm and GNU as
-- Worked out what I need to do in LLVM to make ADRL work, looks like
nothing hugely complicated but a lot of plumbing through various layers.
- Started reading about AArch64 TLS descriptor implementation. I'm familiar
with the AArch32 traditional model so I need to bridge the gap a bit.
== Plans ==
- Post some review comments on Adhemeval's TLS patch with the hope of
unblocking it.
- Start implementing support for ADRL in the integrated assembler
== Planned Absences ==
Holiday 18th - 22nd April (Attending ACCU conference in Bristol). I think
I've put that in the shared holiday calendar correctly.
[*] Hello to everyone I didn't manage to meet at Linaro Connect. I've been
working in ARM's proprietary compiler team, with much of that time spent on
armlink and the other non-compiler tools.
