== This week ==
* TCWG-146 - Detect smin/umin idiom (1/10)
- Made change recommended upstream and resubmitted
* TCWG-140 - Transform end of loop conditions to min_expr (1/10)
- Validated and submitted upstream
* TCWG-833 - Exploit Wide Add operations when appropriate (5/10)
- Added early clobber and forced operand 0 and operand 2 to match
- Finished Aarch32 by using mode iterators
- Developed patch for Aarch64
- Wide add instructions are now emitted for both Aarch32 and Aarch64
* TCWG-834 - Use non-unit stride loads by preference when applicable (2/10)
- Further Aarch32 investigation
* Misc (1/10)
- Conference calls
== Next week ==
- Validate patches for TCWG-833 and submit upstream
- Further TCWG-834 investigation
- Linaro connect presentation preparation
* TCWG-835 (6/10)
- Looked at newton raphson method
- Need to write new md pattern that matches sdiv_optab for modes == v2sf, v4sf
- First attempt for patch: http://pastebin.com/NKy8WdWC
* TCWG-830 (2/10)
- Ran Charles's benchmarks on ARM and AArch64.
- Investigating testsuite fallout for ARM patch.
- Still blocked by permissions to do benchmarking
* Misc (2/10)
- Conference Calls
- US visa collection
== Next Week ==
- Continue with TCWG-830, TCWG-835, TCWG-777
Hi Linaro Toolchain Group,
I am trying to learn the 'decoding decision tree' for aarch64 in binutils
by trying to add a new assembly instruction 'addvp'.
For example: addvp x0, x0, 9
For this, I added a entry in struct aarch64_opcode aarch64_opcode_table[]
(file opcodes/aarch64-tbl.h) as below:
{"addvp", 0x01000000, 0x7f000000, addsub_imm, 0, CORE, OP3 (Rd_SP, Rn_SP,
AIMM), QL_R2NIL, F_SF},
ARM manual say, bit 27 & bit 28 are unallocated. Thus for addvp, I am
giving opcode 01000000 (with bit 27 & 28 as 0).
With this, generating object file from assembly file is successful (test.s
--> test.o); but while disassembling using objdump, it say undefined
instruction.
>From objdump log:
81002400 .inst 0x81002400 ; undefined
(but instruction was generated correct i.e. 81002400 !!!).
I know since addvp is a hack instruction, it won't execute on cpu. But
still disassembly should succeed.
1. Please help me in knowing what I am doing wrong here ? What else I
should do to add a new instruction in binutils ?
2. I also saw some printf in opcodes/aarch64-gen.c which I guess create
decoding tree (initialize_decoder_tree()). How to print them ? I made debug
=1 but still print is not coming.
3. There are some auto-generated files
like aarch64-asm-2.c, aarch64-dis-2.c. How to re-generate them ?
Thanks.
--
with regards,
Virendra Kumar Pathak
== Progress ==
* Maintenance (CARD-1833 5/10)
- Building libc++/abi/unwind in LLVM/Clang tree
- Fixing some build errors (D11486)
- Addressing comments to submissions from last week
- Committing approved ones
- Re-working the others
* Releases (CARD-1431 1/10)
- Building 3.7.0-RC1 on ARM and AArch64, uploading
* Benchmarks (CARD-716 2/10)
- Running LNT, SPEC and EEMBC on ARM and AArch64 for 3.7.0
* Background (2/10)
- Code review, meetings, discussions, etc.
- Upgraded APM to Debian, kernel 3.16
- Perf still segfaults. :(
== Plan ==
* Finish open reviews
* Continue getting libc++ to build and pass the tests in tree
* Look at some of the performance regressions in 3.7
# Progress #
* TCWG-806, aarch64 remote debugging multi-arch support. [4/10]
Patches are done. Need to test them and polish them.
Fix various multi-arch issues when --wrapper is used in GDBserver.
Patches are pushed in to mainline.
* TCWG-876 [1/10]
Re-run GDB testsuite with incoming Linaro toolchain release.
Everything looks OK.
* TCWG-860, aarch64 fast tracepoint. [1/10]
Polish the patches, and ready for submission.
* TCWG-757, upstream patch review. [2/10].
* Misc, meeting. [2/10]
# Plan #
* TCWG-806, test patches on different targets, polish patches
and post them for review.
# Absence #
06th Aug - 10th Aug, GNU Tools Cauldron.
11th Aug - 14th Aug, Holiday.
--
Yao
Benchmark infrastructure - TCWG-360 [6/10]
* Some user support/bugfixing/bugraising
* Multinode job more or less working (not fully tested)
* Additional restructuring got rid of some more complexity
** Though if my simplifying assumption doesn't hold, I'll have to put it back
Benchmarking 101 presentation [2/10]
* Ran through slides with Ryan & Maxim
* Removed many slides
* Collected up and categorized the removed slides
** Probably will go into future presentation(s)
Misc [2/10]
=Plan=
* Tweak multinode a little more
* Integrate multinode into Jenkins
** To the extent that I'm comfortable with the security
* Read a bit about some benchmarks that aren't SPEC
* Start noise control experiments (may inform presentation)
=Week After Next=
Holiday
* One day off - Bastille day (2/10)
== Progress ==
o Upstream GCC (3/10)
* Finalized and committed fix in trunk for Linaro bug #416
o Linaro GCC release (4/10)
* Reviewed and did more patches for tcwg-release script
* Still investigate validation issues.
* Prepared FSF branch merge into Linaro GCC 5 branch
o Misc (1/10)
* Various meetings
== Plan ==
- Summer Holidays (2 weeks)
== Progress ==
* Add REG_EQUAL note for arm_emit_movpair (1/10)
- Patch2 ok to commit.
- Ran complete validation.
- Found an issue and posted a patch to fix
* Factor conversion out of COND_EXPR - TCWG-849 (6/10)
- Found a performance regression in tree-ssa-reasoc
- Looked at the tree-ssa-reasoc code to see possible fixes
- Posted an RFC patch
* PR66865
- Wine segfaults from gcc in trunk (r225757)
- Reproduced it but turned out not from my commit
- Fixed by other PR
* Misc (2/10)
- Looked at interaction between gcc optimization passes
- gcc-patches, gcc-bugs list
- Meetings
== Plan ==
- GCC Bugs
- TACT driven optimization exploration for gcc
- Linaro bug 1318
Benchmark infrastructure - TCWG-360 [5/10]
* Worked through my Jenkins issues with Fathi, raised some tickets at him
* Converting LAVA end into multinode job
** Having some trouble with multinode API
Benchmarking 101 presentation [3/10]
* 1/2 day of discussions/reading, full day of redrafting
* Looked for Michael Hope's similar 2012 presentation
** Found slides, not video
=Plan=
* Complete multinode job
* Integrate into Jenkins to the extent that I'm comfortable
* Complete 'shareable' draft of benchmarking-101
** And see if I have enough left over for -102, maybe -103
== This week ==
* TCWG-140 - Transform end of loop conditions to min_expr (1/10)
- Blocked waiting on validation
* TCWG-833 - Exploit Wide Add operations when appropriate (7/10)
- Developed patch to handle signed and unsigned cases for Aarc32
- Investigation and debugging into support for Aarch64
* TCWG-834 - Use non-unit stride loads by preference when applicable (1/10)
- Initial Aarch32 investigation
* Misc (1/10)
- Conference calls
== Next week ==
- Validate Aarch32 patch for TCWG-833
- Develop Aarch64 patch for TCWG-833
- Validate TCWG-140
- Make recommended fixes to TCWG-146 and resubmit upstream
