== Progress ==
* builtin_bswap16:
* Backported missing patch from thunk to Linaro/4.7. One test still
failing in the hard-float + thumb configuration because it forces
armv6 and results in a unsupported configuration: vfp-1 + hard-float.
Resumed discussion about a fix I proposed 3 weeks ago.
* PGO/hot-cold partitioning/Spec2k:
* read doc about spec2k
* started looking at 254.gap causing an ICE.
* started studying qemu traces about 175.vpr crashing when compiled
using profiling info. Cold code returns from a function using a
clobbered lr value.
== Next ==
* builtin_bswap16:
* complete backport to linaro-gcc 4.7.
* PGO/hot-cold partitioning/Spec2k:
* investigate compiler crash and runtime failures.
== Progress ==
* Deputising for Michael
* 4.6 and 4.7 2012.10 releases
* Included extra AArch64 merge into gcc-lianro/4.7
* AArch64 support
* Did another merge
* Starting another one.
* HOT/COLD partitioning for PGO
* PINGed If/Then/Else block conversion patch
* Started reworking postreload-gcse.c patch
* Ran into issues with vanilla gcc-linaro/4.7 not being able to
build for 'arm-none-linux-gnueabihf' without some configury magic
* Admin
* Interviewing
== Next Week ==
* Do another AArch64 merge.
* HOT/COLD partitioning for PGO:
* Get two current patches accepted upstream
* Post question upstream about register allocation 'mistakes' I am seeing
* symbol_ref splitting
* Test code alignment hypothesis
* Test v2 patch.
== Future ==
* Look at Cards for Vectorization, PGO and LTO with Michael.
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
Hi Guys,
I just found an issue in kernel code and thought we must have a
compilation warning for such cases.
Submitted a bug here:
https://bugs.launchpad.net/gcc-linaro/+bug/1064218
Problem description:
-------------------------
When we have following declaration:
struct foo {
char array[5];
....
};
And have a definition like:
struct foo foo_abc = {
.array = "12345",
};
Problem here is: size of array is 5 bytes and so we can actually add a
string with four characters only to it, as '\0' will take
an additional space.
But with my definition of foo_abc.. i had 5 characters + '\0'... that
will make it 6 and that will overflow the array..
What will actually happen here?
- compiler will not add '\0' at all?
-or it will go outside of boundaries of array?
--
viresh
On 5 October 2012 12:10, Rob Herring <robherring2(a)gmail.com> wrote:
> I've been scratching my head with a "scheduling while atomic" bug I
> started seeing on 3.6. I can easily reproduce this problem when doing a
> wget on my system. It ultimately seems to be a combination of factors.
> The "scheduling while atomic" bug is triggered in do_alignment which
> gets triggered by this code in net/ipv4/af_inet.c, line 1356:
>
> id = ntohl(*(__be32 *)&iph->id);
> flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id ^ IP_DF));
> id >>= 16;
>
> This code compiles into this using "gcc version 4.6.3 (Ubuntu/Linaro
> 4.6.3-1ubuntu5)":
>
> c02ac020: e8920840 ldm r2, {r6, fp}
> c02ac024: e6bfbf3b rev fp, fp
> c02ac028: e6bf6f36 rev r6, r6
> c02ac02c: e22bc901 eor ip, fp, #16384 ; 0x4000
> c02ac030: e0266008 eor r6, r6, r8
> c02ac034: e18c6006 orr r6, ip, r6
>
> which generates alignment faults on the ldm. These are silent until this
> commit is applied:
Hi Rob. I assume that iph is something like:
struct foo {
u32 x;
char id[8];
};
struct foo *iph;
GCC merged the two adjacent loads of x and id into one ldm. This is
an ARM specific optimisation done in load_multiple_sequence() and
enabled with -fpeephole2.
I think the assembly is correct - GCC knows that iph is aligned and
knows the offsets of both x and id. Happy to be corrected if I'm
wrong, but I think the assembly is valid given the C code.
-- Michael
== Progress ==
* builtin_bswap16:
* backporting of builtin_bswap16 for ARM to Linaro/4.7: one of the
tests fails. Waiting for Ramana's return to see if he can help me
identify the patch needed from trunk.
* Useless zero extensions: despite Ulrich support I didn't succeed
to rewrite the bswap16 pattern in a way that would avoid
generating useless zero extension. Asking for help on gcc list
shows that it would actually need a complete new optimization
pass, which has already been discussed several times.
* PGO/hot-cold partitioning/Spec2k:
* looking at spec2k build & run system
* Branch reviews: approved Matt's october merges for Linaro-gcc 4.6 and 4.7.
Briefly looked at aarch64-4.7 merge request.
== Next ==
* builtin_bswap16:
* try to complete backport to linaro-gcc 4.7.
* PGO/hot-cold partitioning/Spec2k:
* investigate compiler crash and runtime failures.
* setup Snowball
== Progress ==
* Started Linaro ramp up process.
* Started to look at Crosstool-ng and CBuild
* Fighting against proxy and bazaar configuration
== Next Week ==
* Continue the started tasks.
== Progress ==
* 4.6 and 4.7 start of month merges
* Fixed missing binary files issues whilst doing this.
* 4.7 AArch64 merge into gcc-linaro/4.7
* Completed initial merge
* Admin
* Interviewing
== Next Week ==
* Deputise for Michael
* Do GCC-Linaro releases
* Fix up any issues with aarch64 merge.
* HOT/COLD partitioning for PGO:
* Get two current patches accepted upstream
* Post question upstream about register allocation 'mistakes' I am seeing
* symbol_ref splitting
* Test code alignment hypothesis
* Test v2 patch.
== Future ==
* Look at Cards for Vectorization, PGO and LTO with Michael.
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
Adding linaro-toolchain
On Tue, Oct 02, 2012, Khem Raj wrote:
> On Tue, Oct 2, 2012 at 4:59 PM, Tim Bird <tim.bird(a)am.sony.com> wrote:
> > When I try to build the Linux kernel version 3.6 with the gcc-4.7
> > nightly build Linaro toolchains,
>
> linaro binutils needs to back port
>
> http://sourceware.org/git/?p=binutils.git;a=commit;h=3fd1fadc205bc69410080a…
>
> >
> > $ arm-eabi-gcc --version
> > arm-eabi-gcc (Linaro GCC 4.7-2012.09-1~dev) 4.7.2 20120910 (prerelease)
> > $ arm-eabi-as --version
> > GNU assembler (Linux/GNU Binutils) 2.23.51.0.3.20120918
> >
> > I get a compiler error (actually, assembler error):
> >
> > AS arch/arm/lib/copy_from_user.o
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S: Assembler messages:
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt r3,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt r4,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt r5,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt r6,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt r7,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt r8,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt ip,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:100: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:118: Error: selected processor does not support ARM mode `ldralt r3,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:119: Error: selected processor does not support ARM mode `ldralt r4,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:120: Error: selected processor does not support ARM mode `ldralt r5,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:121: Error: selected processor does not support ARM mode `ldralt r6,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:122: Error: selected processor does not support ARM mode `ldralt r7,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:123: Error: selected processor does not support ARM mode `ldralt r8,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:124: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:173: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt r4,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt r5,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt r6,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt r7,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt r8,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt r9,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt ip,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:243: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt r4,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt r5,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt r6,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt r7,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt r8,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt r9,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt ip,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:245: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt r4,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt r5,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt r6,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt r7,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt r8,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt r9,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt ip,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > /a/home/tbird/work/auto-reduce/lto-test/linux-3/arch/arm/lib/copy_template.S:247: Error: selected processor does not support ARM mode `ldralt lr,[r1],#4'
> > make[2]: *** [arch/arm/lib/copy_from_user.o] Error 1
> > make[1]: *** [arch/arm/lib] Error 2
> > make[1]: *** Waiting for unfinished jobs....
> >
> >
> > This appears to be related to the following bug report for binutils:
> > http://sourceware.org/ml/binutils/2012-09/msg00128.html
> >
> > I'm compiling the kernel for PandaBoard
> >
> > Any ideas for work-arounds or fixes for this? Note that the ldralt instruction
> > doesn't actually appear in copy_template.S (maybe it's coming from a macro?)
> > -- Tim
> >
> > =============================
> > Tim Bird
> > Architecture Group Chair, CE Workgroup of the Linux Foundation
> > Senior Staff Engineer, Sony Network Entertainment
> > =============================
>
> _______________________________________________
> linaro-dev mailing list
> linaro-dev(a)lists.linaro.org
> http://lists.linaro.org/mailman/listinfo/linaro-dev
--
Loïc Minier
== GCC ==
* Implemented patch to prevent lower-subreg pass from splitting
pseudo register moves during first pass. Committed to mainline.
* Updated patch to perform 64-bit integer shifts in NEON registers
to avoid NEON single to NEON double register hazard. Re-started
testing via Launchpad branch neon-shifts-4.7-v3.
* Rebased patch to improve 32-to-64-bit extended from core into
NEON registers, added backport of lower-subreg mainline fix.
New Launchpad branch neon-extendsidi-4.7-v3.
* Tested reload patch to fix aarch64 find_reloads_subreg_address
bug on multiple platforms to prepare for mainline.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
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Wittkopp
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