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Re: [Linaro-mm-sig] [PATCH] udmabuf: put dmabuf in case of get fd failed

by kernel test robot

3 years

Re: [Linaro-mm-sig] [PATCH] udmabuf: put dmabuf in case of get fd failed

by kernel test robot

Hi Xianting, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v5.16-rc6 next-20211217] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Xianting-Tian/udmabuf-put-dmabuf-i… base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git a7904a538933c525096ca2ccde1e60d0ee62c08e config: x86_64-randconfig-r032-20211220 (https://download.01.org/0day-ci/archive/20211220/202112202144.R9IV6eP2-lkp@…) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): # https://github.com/0day-ci/linux/commit/322781a4da9de4a3057afd933108d23ca7f… git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Xianting-Tian/udmabuf-put-dmabuf-in-case-of-get-fd-failed/20211220-134433 git checkout 322781a4da9de4a3057afd933108d23ca7f5282e # save the config file to linux build tree mkdir build_dir make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/dma-buf/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com> All warnings (new ones prefixed by >>): drivers/dma-buf/udmabuf.c: In function 'udmabuf_create': drivers/dma-buf/udmabuf.c:292:13: error: invalid storage class for function 'udmabuf_ioctl_create' 292 | static long udmabuf_ioctl_create(struct file *filp, unsigned long arg) | ^~~~~~~~~~~~~~~~~~~~ >> drivers/dma-buf/udmabuf.c:292:1: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] 292 | static long udmabuf_ioctl_create(struct file *filp, unsigned long arg) | ^~~~~~ drivers/dma-buf/udmabuf.c:311:13: error: invalid storage class for function 'udmabuf_ioctl_create_list' 311 | static long udmabuf_ioctl_create_list(struct file *filp, unsigned long arg) | ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/dma-buf/udmabuf.c:332:13: error: invalid storage class for function 'udmabuf_ioctl' 332 | static long udmabuf_ioctl(struct file *filp, unsigned int ioctl, | ^~~~~~~~~~~~~ drivers/dma-buf/udmabuf.c:353:20: error: initializer element is not constant 353 | .unlocked_ioctl = udmabuf_ioctl, | ^~~~~~~~~~~~~ drivers/dma-buf/udmabuf.c:353:20: note: (near initialization for 'udmabuf_fops.unlocked_ioctl') drivers/dma-buf/udmabuf.c:355:20: error: initializer element is not constant 355 | .compat_ioctl = udmabuf_ioctl, | ^~~~~~~~~~~~~ drivers/dma-buf/udmabuf.c:355:20: note: (near initialization for 'udmabuf_fops.compat_ioctl') drivers/dma-buf/udmabuf.c:365:19: error: invalid storage class for function 'udmabuf_dev_init' 365 | static int __init udmabuf_dev_init(void) | ^~~~~~~~~~~~~~~~ drivers/dma-buf/udmabuf.c:370:20: error: invalid storage class for function 'udmabuf_dev_exit' 370 | static void __exit udmabuf_dev_exit(void) | ^~~~~~~~~~~~~~~~ In file included from include/linux/init.h:5, from include/linux/cred.h:12, from drivers/dma-buf/udmabuf.c:2: include/linux/compiler.h:244:46: error: initializer element is not constant 244 | __UNIQUE_ID(__PASTE(__addressable_,sym)) = (void *)&sym; | ^ include/linux/init.h:236:2: note: in expansion of macro '__ADDRESSABLE' 236 | __ADDRESSABLE(fn) | ^~~~~~~~~~~~~ include/linux/init.h:241:2: note: in expansion of macro '__define_initcall_stub' 241 | __define_initcall_stub(__stub, fn) \ | ^~~~~~~~~~~~~~~~~~~~~~ include/linux/init.h:254:2: note: in expansion of macro '____define_initcall' 254 | ____define_initcall(fn, \ | ^~~~~~~~~~~~~~~~~~~ include/linux/init.h:260:2: note: in expansion of macro '__unique_initcall' 260 | __unique_initcall(fn, id, __sec, __initcall_id(fn)) | ^~~~~~~~~~~~~~~~~ include/linux/init.h:262:35: note: in expansion of macro '___define_initcall' 262 | #define __define_initcall(fn, id) ___define_initcall(fn, id, .initcall##id) | ^~~~~~~~~~~~~~~~~~ include/linux/init.h:291:30: note: in expansion of macro '__define_initcall' 291 | #define device_initcall(fn) __define_initcall(fn, 6) | ^~~~~~~~~~~~~~~~~ include/linux/init.h:296:24: note: in expansion of macro 'device_initcall' 296 | #define __initcall(fn) device_initcall(fn) | ^~~~~~~~~~~~~~~ include/linux/module.h:88:24: note: in expansion of macro '__initcall' 88 | #define module_init(x) __initcall(x); | ^~~~~~~~~~ drivers/dma-buf/udmabuf.c:375:1: note: in expansion of macro 'module_init' 375 | module_init(udmabuf_dev_init) | ^~~~~~~~~~~ In file included from include/linux/container_of.h:5, from include/linux/list.h:5, from include/linux/key.h:14, from include/linux/cred.h:13, from drivers/dma-buf/udmabuf.c:2: >> include/linux/build_bug.h:78:41: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] 78 | #define __static_assert(expr, msg, ...) _Static_assert(expr, msg) | ^~~~~~~~~~~~~~ include/linux/build_bug.h:77:34: note: in expansion of macro '__static_assert' 77 | #define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr) | ^~~~~~~~~~~~~~~ include/linux/init.h:246:2: note: in expansion of macro 'static_assert' 246 | static_assert(__same_type(initcall_t, &fn)); | ^~~~~~~~~~~~~ include/linux/init.h:254:2: note: in expansion of macro '____define_initcall' 254 | ____define_initcall(fn, \ | ^~~~~~~~~~~~~~~~~~~ include/linux/init.h:260:2: note: in expansion of macro '__unique_initcall' 260 | __unique_initcall(fn, id, __sec, __initcall_id(fn)) | ^~~~~~~~~~~~~~~~~ include/linux/init.h:262:35: note: in expansion of macro '___define_initcall' 262 | #define __define_initcall(fn, id) ___define_initcall(fn, id, .initcall##id) | ^~~~~~~~~~~~~~~~~~ include/linux/init.h:291:30: note: in expansion of macro '__define_initcall' 291 | #define device_initcall(fn) __define_initcall(fn, 6) | ^~~~~~~~~~~~~~~~~ include/linux/init.h:296:24: note: in expansion of macro 'device_initcall' 296 | #define __initcall(fn) device_initcall(fn) | ^~~~~~~~~~~~~~~ include/linux/module.h:88:24: note: in expansion of macro '__initcall' 88 | #define module_init(x) __initcall(x); | ^~~~~~~~~~ drivers/dma-buf/udmabuf.c:375:1: note: in expansion of macro 'module_init' 375 | module_init(udmabuf_dev_init) | ^~~~~~~~~~~ In file included from include/linux/cred.h:12, from drivers/dma-buf/udmabuf.c:2: drivers/dma-buf/udmabuf.c:376:13: error: initializer element is not constant 376 | module_exit(udmabuf_dev_exit) | ^~~~~~~~~~~~~~~~ include/linux/init.h:299:50: note: in definition of macro '__exitcall' 299 | static exitcall_t __exitcall_##fn __exit_call = fn | ^~ drivers/dma-buf/udmabuf.c:376:1: note: in expansion of macro 'module_exit' 376 | module_exit(udmabuf_dev_exit) | ^~~~~~~~~~~ include/linux/init.h:299:2: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] 299 | static exitcall_t __exitcall_##fn __exit_call = fn | ^~~~~~ include/linux/module.h:100:24: note: in expansion of macro '__exitcall' 100 | #define module_exit(x) __exitcall(x); | ^~~~~~~~~~ drivers/dma-buf/udmabuf.c:376:1: note: in expansion of macro 'module_exit' 376 | module_exit(udmabuf_dev_exit) | ^~~~~~~~~~~ drivers/dma-buf/udmabuf.c:379:1: error: expected declaration or statement at end of input 379 | MODULE_LICENSE("GPL v2"); | ^~~~~~~~~~~~~~ vim +292 drivers/dma-buf/udmabuf.c fbb0de79507819 Gerd Hoffmann 2018-08-27 291 fbb0de79507819 Gerd Hoffmann 2018-08-27 @292 static long udmabuf_ioctl_create(struct file *filp, unsigned long arg) fbb0de79507819 Gerd Hoffmann 2018-08-27 293 { fbb0de79507819 Gerd Hoffmann 2018-08-27 294 struct udmabuf_create create; fbb0de79507819 Gerd Hoffmann 2018-08-27 295 struct udmabuf_create_list head; fbb0de79507819 Gerd Hoffmann 2018-08-27 296 struct udmabuf_create_item list; fbb0de79507819 Gerd Hoffmann 2018-08-27 297 fbb0de79507819 Gerd Hoffmann 2018-08-27 298 if (copy_from_user(&create, (void __user *)arg, 33f35429fc49c0 Gerd Hoffmann 2018-09-11 299 sizeof(create))) fbb0de79507819 Gerd Hoffmann 2018-08-27 300 return -EFAULT; fbb0de79507819 Gerd Hoffmann 2018-08-27 301 fbb0de79507819 Gerd Hoffmann 2018-08-27 302 head.flags = create.flags; fbb0de79507819 Gerd Hoffmann 2018-08-27 303 head.count = 1; fbb0de79507819 Gerd Hoffmann 2018-08-27 304 list.memfd = create.memfd; fbb0de79507819 Gerd Hoffmann 2018-08-27 305 list.offset = create.offset; fbb0de79507819 Gerd Hoffmann 2018-08-27 306 list.size = create.size; fbb0de79507819 Gerd Hoffmann 2018-08-27 307 c1bbed66899726 Gurchetan Singh 2019-12-02 308 return udmabuf_create(filp->private_data, &head, &list); fbb0de79507819 Gerd Hoffmann 2018-08-27 309 } fbb0de79507819 Gerd Hoffmann 2018-08-27 310 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

3 years

Re: [Linaro-mm-sig] [Intel-gfx] [RFC PATCH 1/2] dma-fence: Avoid establishing a locking order between fence classes

by Daniel Vetter

On Tue, Dec 07, 2021 at 09:46:47PM +0100, Thomas Hellström wrote: > > On 12/7/21 19:08, Daniel Vetter wrote: > > Once more an entire week behind on mails, but this looked interesting > > enough. > > > > On Fri, Dec 03, 2021 at 03:18:01PM +0100, Thomas Hellström wrote: > > > On Fri, 2021-12-03 at 14:08 +0100, Christian König wrote: > > > > Am 01.12.21 um 13:16 schrieb Thomas Hellström (Intel): > > > > > On 12/1/21 12:25, Christian König wrote: > > > > > > And why do you use dma_fence_chain to generate a timeline for > > > > > > TTM? > > > > > > That should come naturally because all the moves must be ordered. > > > > > Oh, in this case because we're looking at adding stuff at the end > > > > > of > > > > > migration (like coalescing object shared fences and / or async > > > > > unbind > > > > > fences), which may not complete in order. > > > > Well that's ok as well. My question is why does this single dma_fence > > > > then shows up in the dma_fence_chain representing the whole > > > > migration? > > > What we'd like to happen during eviction is that we > > > > > > 1) await any exclusive- or moving fences, then schedule the migration > > > blit. The blit manages its own GPU ptes. Results in a single fence. > > > 2) Schedule unbind of any gpu vmas, resulting possibly in multiple > > > fences. > > This sounds like over-optimizing for nothing. We only really care about > > pipeling moves on dgpu, and on dgpu we only care about modern userspace > > (because even gl moves in that direction). > Hmm. It's not totally clear what you mean with over-optimizing for nothing, > is it the fact that we want to start the blit before all shared fences have > signaled or the fact that we're doing async unbinding to avoid a > synchronization point that stops us from fully pipelining evictions? Yup. Least because that breaks vulkan, so you really can't do this optimizations :-) In general I meant that unless you really, really understand everything all the time (which frankly no one does), then trying to be clever just isn't worth it. We have access pending in the dma_resv, we wait for it is dumb, simple, no surprises. > > And modern means that usually even write access is only setting a read > > fence, because in vk/compute we only set write fences for object which > > need implicit sync, and _only_ when actually needed. > > > > So ignoring read fences for movings "because it's only reads" is actually > > busted. > > I'm fine with awaiting also shared fences before we start the blit, as > mentioned also later in the thread, but that is just a matter of when we > coalesce the shared fences. So since difference in complexity is minimal, > what's viewed as optimizing for nothing can also be conversely be viewed as > unneccesarily waiting for nothing, blocking the migration context timeline > from progressing with unrelated blits. (Unless there are correctness issues > of course, see below). > > But not setting a write fence after write seems to conflict with dma-buf > rules as also discussed later in the thread. Perhaps some clarity is needed > here. How would a writer or reader that implicitly *wants* to wait for > previous writers go about doing that? > > Note that what we're doing is not "moving" in the sense that we're giving up > or modifying the old storage but rather start a blit assuming that the > contents of the old storage is stable, or the writer doesn't care. Yeah that's not how dma-buf works, and which is what Christian is trying to rectify with his huge refactoring/doc series to give a bit clearer meaning to what a fence in a dma_resv means. > > I think for buffer moves we should document and enforce (in review) the > > rule that you have to wait for all fences, otherwise boom. Same really > > like before freeing backing storage. Otherwise there's just too many gaps > > and surprises. > > > > And yes with Christian's rework of dma_resv this will change, and we'll > > allow multiple write fences (because that's what amdgpu encoded into their > > uapi). Still means that you cannot move a buffer without waiting for read > > fences (or kernel fences or anything really). > > Sounds like some agreement is needed here what rules we actually should > obey. As mentioned above I'm fine with either. I think it would be good to comment on the doc patch in Christian's series for that. But essentially read/write don't mean actual read/write to memory, but only read/write access in terms of implicit sync. Buffers which do not partake in implicit sync (driver internal stuff) or access which is not implicitly synced (anything vk does) do _not_ need to set a write fence. They will (except amdgpu, until they fix their CS uapi) _only_ set a read fence. Christian and me had a multi-month discussion on this, so it's a bit tricky. > > The other thing is this entire spinlock recursion topic for dma_fence, and > > I'm deeply unhappy about the truckload of tricks i915 plays and hence in > > favour of avoiding recursion in this area as much as possible. > > TBH I think the i915 corresponding container manages to avoid both the deep > recursive calls and lock nesting simply by early enable_signaling() and not > storing the fence pointers of the array fences, which to me appears to be a > simple and clean approach. No tricks there. > > > > > If we really can't avoid it then irq_work to get a new clean context gets > > the job done. Making this messy and work is imo a feature, lock nesting of > > same level locks is just not a good&robust engineering idea. > > For the dma-fence-chain and dma-fence-array there are four possibilities > moving forward: > > 1) Keeping the current same-level locking nesting order of container-first > containee later. This is fully annotated, but fragile and blows up if users > attempt to nest containers in different orders. > > 2) Establishing a reverse-signaling locking order. Not annotatable. blows up > on signal-on-any. > > 3) Early enable-signaling, no lock nesting, low latency but possibly > unnecessary enable_signaling calls. > > 4) irq_work in enable_signaling(). High latency. > > The tread finally agreed the solution would be to keep 1), add early > warnings for the pitfalls and if possible provide helpers to flatten to > avoid container recursion. Hm ok seems ok. It's definitely an area where we don't have great solutions :-/ -Daniel > > /Thomas > > > > > > /me back to being completely burried > > > > I do hope I can find some more time to review a few more of Christian's > > patches this week though :-/ > > > > Cheers, Daniel > > > > > 3) Most but not all of the remaining resv shared fences will have been > > > finished in 2) We can't easily tell which so we have a couple of shared > > > fences left. > > > 4) Add all fences resulting from 1) 2) and 3) into the per-memory-type > > > dma-fence-chain. > > > 5) hand the resulting dma-fence-chain representing the end of migration > > > over to ttm's resource manager. > > > > > > Now this means we have a dma-fence-chain disguised as a dma-fence out > > > in the wild, and it could in theory reappear as a 3) fence for another > > > migration unless a very careful audit is done, or as an input to the > > > dma-fence-array used for that single dependency. > > > > > > > That somehow doesn't seem to make sense because each individual step > > > > of > > > > the migration needs to wait for those dependencies as well even when > > > > it > > > > runs in parallel. > > > > > > > > > But that's not really the point, the point was that an (at least to > > > > > me) seemingly harmless usage pattern, be it real or fictious, ends > > > > > up > > > > > giving you severe internal- or cross-driver headaches. > > > > Yeah, we probably should document that better. But in general I don't > > > > see much reason to allow mixing containers. The dma_fence_array and > > > > dma_fence_chain objects have some distinct use cases and and using > > > > them > > > > to build up larger dependency structures sounds really questionable. > > > Yes, I tend to agree to some extent here. Perhaps add warnings when > > > adding a chain or array as an input to array and when accidently > > > joining chains, and provide helpers for flattening if needed. > > > > > > /Thomas > > > > > > > > > > Christian. > > > > > > > > > /Thomas > > > > > > > > > > > > > > > > Regards, > > > > > > Christian. > > > > > > > > > > > > > > > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch

3 years

Re: [Linaro-mm-sig] [RFC PATCH v4 0/2] RDMA/rxe: Add dma-buf support

by Jason Gunthorpe

On Fri, Dec 10, 2021 at 08:29:24PM +0900, Shunsuke Mie wrote: > Hi Jason, > Thank you for replying. > > 2021年12月8日(水) 2:14 Jason Gunthorpe <jgg(a)ziepe.ca>: > > > > On Fri, Dec 03, 2021 at 12:51:44PM +0900, Shunsuke Mie wrote: > > > Hi maintainers, > > > > > > Could you please review this patch series? > > > > Why is it RFC? > > > > I'm confused why this is useful? > > > > This can't do copy from MMIO memory, so it shouldn't be compatible > > with things like Gaudi - does something prevent this? > I think if an export of the dma-buf supports vmap, CPU is able to access the > mmio memory. > > Is it wrong? If this is wrong, there is no advantages this changes.. I don't know what the dmabuf folks did, but yes, it is wrong. IOMEM must be touched using only special accessors, some platforms crash if you don't do this. Even x86 will crash if you touch it with something like an XMM optimized memcpy. Christian? If the vmap succeeds what rules must the caller use to access the memory? Jason

3 years

Re: [Linaro-mm-sig] [PATCH 0/2] Add SMBus features to Tegra I2C

by Dmitry Osipenko

09.12.2021 18:05, Akhil R пишет: > Add support for SMBus Alert and SMBus block read functions to > i2c-tegra driver > > Akhil R (2): > dt-bindings: i2c: tegra: Add SMBus feature properties > i2c: tegra: Add SMBus block read and SMBus alert functions > > .../devicetree/bindings/i2c/nvidia,tegra20-i2c.txt | 4 ++ > drivers/i2c/busses/i2c-tegra.c | 54 +++++++++++++++++++++- > 2 files changed, 57 insertions(+), 1 deletion(-) > How this was tested? This series must include the DT patch. If there is no real user in upstream for this feature, then I don't think that we should bother at all about it.

3 years

Re: [Linaro-mm-sig] [PATCH 1/2] dt-bindings: i2c: tegra: Add SMBus feature properties

by Rob Herring

On Thu, Dec 09, 2021 at 08:35:20PM +0530, Akhil R wrote: > Tegra I2C can use a gpio as an smbus-alert. Document the usage of > the same. > > Signed-off-by: Akhil R <akhilrajeev(a)nvidia.com> > --- > Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt > index 3f2f990..71ee79b 100644 > --- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt > +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt > @@ -70,6 +70,10 @@ Required properties: > - rx > - tx > > +optional properties: > +- smbalert-gpio: Must contain an entry for the gpio to be used as smbus alert. > + It will be used only if optional smbus-alert property is present. There's already a standard way to do this with interrupts. And GPIOs can be interrupts usually. > + > Example: > > i2c@7000c000 { > -- > 2.7.4 > >

3 years

Re: [Linaro-mm-sig] [RFC PATCH v4 0/2] RDMA/rxe: Add dma-buf support

by Christian König

Am 13.12.21 um 12:18 schrieb Shunsuke Mie: > 2021年12月10日(金) 22:29 Christian König <christian.koenig(a)amd.com>: >> Am 10.12.21 um 14:26 schrieb Jason Gunthorpe: >>> On Fri, Dec 10, 2021 at 01:47:37PM +0100, Christian König wrote: >>>> Am 10.12.21 um 13:42 schrieb Jason Gunthorpe: >>>>> On Fri, Dec 10, 2021 at 08:29:24PM +0900, Shunsuke Mie wrote: >>>>>> Hi Jason, >>>>>> Thank you for replying. >>>>>> >>>>>> 2021年12月8日(水) 2:14 Jason Gunthorpe <jgg(a)ziepe.ca>: >>>>>>> On Fri, Dec 03, 2021 at 12:51:44PM +0900, Shunsuke Mie wrote: >>>>>>>> Hi maintainers, >>>>>>>> >>>>>>>> Could you please review this patch series? >>>>>>> Why is it RFC? >>>>>>> >>>>>>> I'm confused why this is useful? >>>>>>> >>>>>>> This can't do copy from MMIO memory, so it shouldn't be compatible >>>>>>> with things like Gaudi - does something prevent this? >>>>>> I think if an export of the dma-buf supports vmap, CPU is able to access the >>>>>> mmio memory. >>>>>> >>>>>> Is it wrong? If this is wrong, there is no advantages this changes.. >>>>> I don't know what the dmabuf folks did, but yes, it is wrong. >>>>> >>>>> IOMEM must be touched using only special accessors, some platforms >>>>> crash if you don't do this. Even x86 will crash if you touch it with >>>>> something like an XMM optimized memcpy. >>>>> >>>>> Christian? If the vmap succeeds what rules must the caller use to >>>>> access the memory? >>>> See dma-buf-map.h and especially struct dma_buf_map. >>>> >>>> MMIO memory is perfectly supported here and actually the most common case. >>> Okay that looks sane, but this rxe RFC seems to ignore this >>> completely. It stuffs the vaddr directly into a umem which goes to all >>> manner of places in the driver. >>> >>> ?? >> Well, yes that can go boom pretty quickly. > Sorry, I was wrong. The dma_buf_map treats both iomem and vaddr region, but > this RFC only supports vaddr. Advantage of the partial support is we can use the > vaddr dma-buf in RXE without changing a rxe data copy implementation. Well that is most likely not a good idea. For example buffers for GPU drivers can be placed in both MMIO memory and system memory. If you don't want to provoke random failures you *MUST* be able to handle both if you want to use this. Regards, Christian. > > An example of a dma-buf pointing to a vaddr is some gpu drivers use RAM for > VRAM and we can get dma-buf for the region that indicates vaddr regions. > Specifically, the gpu driver using gpu/drm/drm_gem_cma_helper.c is one such > example. > >> Not sure what they want to use this for. > I'd like to use RDMA with RXE for that memory region. > > Best, > Shunsuke >> Christian. >> >>> Jason

3 years

Re: [Linaro-mm-sig] [PATCH 2/2] i2c: tegra: Add SMBus block read and SMBus alert functions

by Dmitry Osipenko

09.12.2021 18:05, Akhil R пишет: > +static int tegra_i2c_setup_smbalert(struct tegra_i2c_dev *i2c_dev) > +{ > + struct tegra_i2c_smbalert *smbalert = &i2c_dev->smbalert; > + struct gpio_desc *alert_gpiod; > + struct i2c_client *ara; > + > + alert_gpiod = devm_gpiod_get(i2c_dev->dev, "smbalert", GPIOD_IN); > + if (IS_ERR(alert_gpiod)) > + return PTR_ERR(alert_gpiod); > + > + smbalert->alert_data.irq = gpiod_to_irq(alert_gpiod); > + if (smbalert->alert_data.irq <= 0) > + return smbalert->alert_data.irq; Why GPIO is needed at all if what's actually needed is the interrupt?

3 years, 1 month

Re: [Linaro-mm-sig] [PATCH 2/2] i2c: tegra: Add SMBus block read and SMBus alert functions

by Dmitry Osipenko

09.12.2021 18:33, Andy Shevchenko пишет: > On Thu, Dec 9, 2021 at 5:30 PM Dmitry Osipenko <digetx(a)gmail.com> wrote: >> 09.12.2021 18:05, Akhil R пишет: >>> +static int tegra_i2c_setup_smbalert(struct tegra_i2c_dev *i2c_dev) >>> +{ >>> + struct tegra_i2c_smbalert *smbalert = &i2c_dev->smbalert; >>> + struct gpio_desc *alert_gpiod; >>> + struct i2c_client *ara; >>> + >>> + alert_gpiod = devm_gpiod_get(i2c_dev->dev, "smbalert", GPIOD_IN); >>> + if (IS_ERR(alert_gpiod)) >>> + return PTR_ERR(alert_gpiod); >>> + >>> + smbalert->alert_data.irq = gpiod_to_irq(alert_gpiod); >>> + if (smbalert->alert_data.irq <= 0) >>> + return smbalert->alert_data.irq; >> >> 0 is the error condition. > > I'm not sure what you implied here. gpiod_to_irq() returns 0 if and > only if it goes to the architectures where it might be possible to > have valid vIRQ 0, but this is not the case (at least I never heard of > a such) for GPIO controllers on such platforms. So, looking at the > above code I may tell that the '=' part is redundant. > Yes, removal of the '=' should be enough here.

3 years, 1 month

Re: [Linaro-mm-sig] [PATCH 2/2] i2c: tegra: Add SMBus block read and SMBus alert functions

by Dmitry Osipenko

3 years, 1 month

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