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Re: [PATCH 12/13] serial: linflexuart: Add DMA support

by Dan Carpenter

Hi Larisa, kernel test robot noticed the following build warnings: https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Larisa-Grigore/serial-linfle… base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing patch link: https://lore.kernel.org/r/20260216150205.212318-13-larisa.grigore%40oss.nxp… patch subject: [PATCH 12/13] serial: linflexuart: Add DMA support config: i386-randconfig-141-20260217 (https://download.01.org/0day-ci/archive/20260217/202602171109.6YSFXcJ3-lkp@…) compiler: gcc-14 (Debian 14.2.0-19) 14.2.0 smatch version: v0.5.0-8994-gd50c5a4c If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Reported-by: Dan Carpenter <dan.carpenter(a)linaro.org> | Closes: https://lore.kernel.org/r/202602171109.6YSFXcJ3-lkp@intel.com/ smatch warnings: drivers/tty/serial/fsl_linflexuart.c:1441 linflex_probe() warn: missing unwind goto? vim +1441 drivers/tty/serial/fsl_linflexuart.c 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1377 static int linflex_probe(struct platform_device *pdev) 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1378 { 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1379 struct device_node *np = pdev->dev.of_node; 1d3f5f07fafc71 Radu Pirea 2026-02-16 1380 struct linflex_port *lfport; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1381 struct uart_port *sport; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1382 struct resource *res; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1383 int ret; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1384 1d3f5f07fafc71 Radu Pirea 2026-02-16 1385 lfport = devm_kzalloc(&pdev->dev, sizeof(*lfport), GFP_KERNEL); 1d3f5f07fafc71 Radu Pirea 2026-02-16 1386 if (!lfport) 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1387 return -ENOMEM; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1388 1d3f5f07fafc71 Radu Pirea 2026-02-16 1389 sport = &lfport->port; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1390 sport->dev = &pdev->dev; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1391 0b34325c5f79f1 Larisa Grigore 2026-02-16 1392 lfport->dma_tx_chan = dma_request_chan(sport->dev, "tx"); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1393 if (IS_ERR(lfport->dma_tx_chan)) { 0b34325c5f79f1 Larisa Grigore 2026-02-16 1394 ret = PTR_ERR(lfport->dma_tx_chan); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1395 if (ret == -EPROBE_DEFER) 0b34325c5f79f1 Larisa Grigore 2026-02-16 1396 return ret; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1397 0b34325c5f79f1 Larisa Grigore 2026-02-16 1398 dev_info(sport->dev, 0b34325c5f79f1 Larisa Grigore 2026-02-16 1399 "DMA tx channel request failed, operating without tx DMA %ld\n", 0b34325c5f79f1 Larisa Grigore 2026-02-16 1400 PTR_ERR(lfport->dma_tx_chan)); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1401 lfport->dma_tx_chan = NULL; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1402 } 0b34325c5f79f1 Larisa Grigore 2026-02-16 1403 0b34325c5f79f1 Larisa Grigore 2026-02-16 1404 lfport->dma_rx_chan = dma_request_chan(sport->dev, "rx"); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1405 if (IS_ERR(lfport->dma_rx_chan)) { 0b34325c5f79f1 Larisa Grigore 2026-02-16 1406 ret = PTR_ERR(lfport->dma_rx_chan); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1407 if (ret == -EPROBE_DEFER) { 0b34325c5f79f1 Larisa Grigore 2026-02-16 1408 dma_release_channel(lfport->dma_tx_chan); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1409 return ret; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1410 } 0b34325c5f79f1 Larisa Grigore 2026-02-16 1411 0b34325c5f79f1 Larisa Grigore 2026-02-16 1412 dev_info(sport->dev, 0b34325c5f79f1 Larisa Grigore 2026-02-16 1413 "DMA rx channel request failed, operating without rx DMA %ld\n", 0b34325c5f79f1 Larisa Grigore 2026-02-16 1414 PTR_ERR(lfport->dma_rx_chan)); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1415 lfport->dma_rx_chan = NULL; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1416 } 1d3f5f07fafc71 Radu Pirea 2026-02-16 1417 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1418 ret = of_alias_get_id(np, "serial"); 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1419 if (ret < 0) { 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1420 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1421 goto linflex_probe_free_dma; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1422 } 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1423 if (ret >= UART_NR) { 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1424 dev_err(&pdev->dev, "driver limited to %d serial ports\n", 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1425 UART_NR); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1426 ret = -ENOMEM; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1427 goto linflex_probe_free_dma; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1428 } 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1429 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1430 sport->line = ret; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1431 8c6d7e5fd50b45 Yangtao Li 2023-07-12 1432 sport->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1433 if (IS_ERR(sport->membase)) { 0b34325c5f79f1 Larisa Grigore 2026-02-16 1434 ret = PTR_ERR(sport->membase); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1435 goto linflex_probe_free_dma; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1436 } 8c6d7e5fd50b45 Yangtao Li 2023-07-12 1437 sport->mapbase = res->start; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1438 4e8da86fc1f767 Zhang Shurong 2023-08-26 1439 ret = platform_get_irq(pdev, 0); 4e8da86fc1f767 Zhang Shurong 2023-08-26 1440 if (ret < 0) 4e8da86fc1f767 Zhang Shurong 2023-08-26 @1441 return ret; No clean up? 4e8da86fc1f767 Zhang Shurong 2023-08-26 1442 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1443 sport->iotype = UPIO_MEM; 4e8da86fc1f767 Zhang Shurong 2023-08-26 1444 sport->irq = ret; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1445 sport->ops = &linflex_pops; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1446 sport->flags = UPF_BOOT_AUTOCONF; 4151bbed79f98b Dmitry Safonov 2019-12-13 1447 sport->has_sysrq = IS_ENABLED(CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE); 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1448 1d3f5f07fafc71 Radu Pirea 2026-02-16 1449 ret = linflex_init_clk(lfport); 1d3f5f07fafc71 Radu Pirea 2026-02-16 1450 if (ret) 0b34325c5f79f1 Larisa Grigore 2026-02-16 1451 goto linflex_probe_free_dma; 1d3f5f07fafc71 Radu Pirea 2026-02-16 1452 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1453 linflex_ports[sport->line] = sport; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1454 1d3f5f07fafc71 Radu Pirea 2026-02-16 1455 platform_set_drvdata(pdev, lfport); 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1456 1d3f5f07fafc71 Radu Pirea 2026-02-16 1457 ret = uart_add_one_port(&linflex_reg, sport); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1458 if (ret) { 1d3f5f07fafc71 Radu Pirea 2026-02-16 1459 clk_bulk_disable_unprepare(LINFLEX_CLK_NUM, lfport->clks); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1460 goto linflex_probe_free_dma; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1461 } 0b34325c5f79f1 Larisa Grigore 2026-02-16 1462 0b34325c5f79f1 Larisa Grigore 2026-02-16 1463 return 0; 0b34325c5f79f1 Larisa Grigore 2026-02-16 1464 0b34325c5f79f1 Larisa Grigore 2026-02-16 1465 linflex_probe_free_dma: 0b34325c5f79f1 Larisa Grigore 2026-02-16 1466 if (lfport->dma_tx_chan) 0b34325c5f79f1 Larisa Grigore 2026-02-16 1467 dma_release_channel(lfport->dma_tx_chan); 0b34325c5f79f1 Larisa Grigore 2026-02-16 1468 if (lfport->dma_rx_chan) 0b34325c5f79f1 Larisa Grigore 2026-02-16 1469 dma_release_channel(lfport->dma_rx_chan); 1d3f5f07fafc71 Radu Pirea 2026-02-16 1470 1d3f5f07fafc71 Radu Pirea 2026-02-16 1471 return ret; 09864c1cdf5c53 Stefan-gabriel Mirea 2019-08-09 1472 } -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

1 week, 1 day

Re: [PATCH v2 3/3] dma-buf: heaps: cma: charge each cma heap's dmem

by Christian König

On 2/18/26 18:14, Eric Chanudet wrote: > The cma dma-buf heaps let userspace allocate buffers in CMA regions > without enforcing limits. Since each cma region registers in dmem, > charge against it when allocating a buffer in a cma heap. > > Signed-off-by: Eric Chanudet <echanude(a)redhat.com> > --- > drivers/dma-buf/heaps/cma_heap.c | 15 ++++++++++++++- > 1 file changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/dma-buf/heaps/cma_heap.c b/drivers/dma-buf/heaps/cma_heap.c > index 49cc45fb42dd7200c3c14384bcfdbe85323454b1..bbd4f9495808da19256d97bd6a4dca3e1b0a30a0 100644 > --- a/drivers/dma-buf/heaps/cma_heap.c > +++ b/drivers/dma-buf/heaps/cma_heap.c > @@ -27,6 +27,7 @@ > #include <linux/scatterlist.h> > #include <linux/slab.h> > #include <linux/vmalloc.h> > +#include <linux/cgroup_dmem.h> > > #define DEFAULT_CMA_NAME "default_cma_region" > > @@ -58,6 +59,7 @@ struct cma_heap_buffer { > pgoff_t pagecount; > int vmap_cnt; > void *vaddr; > + struct dmem_cgroup_pool_state *pool; > }; > > struct dma_heap_attachment { > @@ -276,6 +278,7 @@ static void cma_heap_dma_buf_release(struct dma_buf *dmabuf) > kfree(buffer->pages); > /* release memory */ > cma_release(cma_heap->cma, buffer->cma_pages, buffer->pagecount); > + dmem_cgroup_uncharge(buffer->pool, buffer->len); > kfree(buffer); > } > > @@ -319,9 +322,17 @@ static struct dma_buf *cma_heap_allocate(struct dma_heap *heap, > if (align > CONFIG_CMA_ALIGNMENT) > align = CONFIG_CMA_ALIGNMENT; > > + if (mem_accounting) { Since mem_accounting is a module parameter it is possible to make it changeable during runtime. IIRC it currently is read only, but maybe add a one line comment that the cma heap now depends on that. Apart from that the series looks totally sane to me. Regards, Christian. > + ret = dmem_cgroup_try_charge( > + cma_get_dmem_cgroup_region(cma_heap->cma), size, > + &buffer->pool, NULL); > + if (ret) > + goto free_buffer; > + } > + > cma_pages = cma_alloc(cma_heap->cma, pagecount, align, false); > if (!cma_pages) > - goto free_buffer; > + goto uncharge_cgroup; > > /* Clear the cma pages */ > if (PageHighMem(cma_pages)) { > @@ -376,6 +387,8 @@ static struct dma_buf *cma_heap_allocate(struct dma_heap *heap, > kfree(buffer->pages); > free_cma: > cma_release(cma_heap->cma, cma_pages, pagecount); > +uncharge_cgroup: > + dmem_cgroup_uncharge(buffer->pool, size); > free_buffer: > kfree(buffer); > >

1 week, 1 day

Re: [PATCH 09/13] dt-bindings: serial: fsl-linflexuart: add dma properties

by Krzysztof Kozlowski

On 18/02/2026 15:44, Larisa Ileana Grigore wrote: > On 2/16/2026 5:10 PM, Krzysztof Kozlowski wrote: >> On 16/02/2026 16:02, Larisa Grigore wrote: >>> From: Radu Pirea <radu-nicolae.pirea(a)nxp.com> >>> >>> Add 'dmas' and 'dma-names' properties to describe optional DMA support >>> for RX and TX channels in the LINFlexD UART controller. >> >> Same question as in other patch about existing devices. >> > I will update the bindings so that `dmas`/`dma-names` are optional for > S32G and not present on S32V234. Would this be acceptable? > Yes, with reason in the commit msg. Best regards, Krzysztof

1 week, 2 days

Re: [PATCH 08/13] dt-bindings: serial: fsl-linflexuart: add clock input properties

by Krzysztof Kozlowski

On 18/02/2026 14:57, Larisa Ileana Grigore wrote: > On 2/18/2026 3:29 PM, Krzysztof Kozlowski wrote: >> On 18/02/2026 14:26, Larisa Ileana Grigore wrote: >>> On 2/16/2026 5:10 PM, Krzysztof Kozlowski wrote: >>>> On 16/02/2026 16:02, Larisa Grigore wrote: >>>>> From: Radu Pirea <radu-nicolae.pirea(a)nxp.com> >>>>> >>>>> Add optional support for the two clock inputs used by the LINFlexD UART >>>>> controller: >>>>> - "lin": LIN_BAUD_CLK >>>>> - "ipg": LINFLEXD_CLK >>>>> >>>>> The clock inputs are kept optional to maintain compatibility with the >>>>> S32V234 platform. >>>> >>>> Does S32V234 have the clocks? I don't understand the "maintain >>>> compatibility" in this context. Either you have or you have not clocks, >>>> which should be expressed in schema (: false, see example schema). >>>> >>> Hello Krzysztof, >>> >>> Thanks for pointing this out! I will update both the schema and the >>> commit description. >>> S32V234 does not expose these clocks in its device tree—on this platform >>> the LINFlexD clocks are set up and enabled by U‑Boot, so they are not >>> available to the kernel. >> >> So there are clocks. DTS is being used by bootloader, so how bootloader >> is going to set up clocks for S32V234 if no one provides them? >> >> This looks like buggy/incomplete approach, although I understand that >> the original binding had the issue. >> > Indeed, I also believe the binding is not fully accurate on S32V234. As > I mentioned earlier, the LINFlexD clocks are not managed by Linux on > this platform. They, along with several other clocks, are usually > initialized by U‑Boot, and Linux does not handle them. That is likely > the reason they were omitted from the S32V234 binding. > I’m willing to correct this for the S32V234 compatible by making that > property optional, so we don’t break compatibility. > For S32G, I would prefer to avoid repeating the same oversight we had on > S32V234 and make the property required, since the IP, as you correctly > pointed out, does have dedicated clock inputs. > > How would you approach this? So the new device should require clocks, which can be left optional for the old one with explanation in the commit msg. Linux is not the only consumer of bindings and DTS. Best regards, Krzysztof

1 week, 2 days

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