- Linaro-mm-sig - lists.linaro.org

[PATCH 7/9] async: Add support for explicit fine-grained barriers

by Chris Wilson

The current async-domain model supports running a multitude of independent tasks with a coarse synchronisation point. This is sufficient for its original purpose of allowing independent drivers to run concurrently during various phases (booting, early resume, late resume etc), and keep the asynchronous domain out of the synchronous kernel domains. However, for greater exploitation, drivers themselves want to schedule multiple tasks within a phase (or between phases) and control the order of execution within those tasks relative to each other. To enable this, we extend the synchronisation scheme based upon kfences and back every task with one. Any task may now wait upon the kfence before being scheduled, and equally the kfence may be used to wait on the task itself (rather than waiting on the cookie for all previous tasks to be completed). Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Shuah Khan <shuahkh(a)osg.samsung.com> Cc: Tejun Heo <tj(a)kernel.org> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Andrew Morton <akpm(a)linux-foundation.org> Cc: Ingo Molnar <mingo(a)kernel.org> Cc: Kees Cook <keescook(a)chromium.org> Cc: Thomas Gleixner <tglx(a)linutronix.de> Cc: "Paul E. McKenney" <paulmck(a)linux.vnet.ibm.com> Cc: Dan Williams <dan.j.williams(a)intel.com> Cc: Andrey Ryabinin <aryabinin(a)virtuozzo.com> Cc: Davidlohr Bueso <dave(a)stgolabs.net> Cc: Nikolay Aleksandrov <nikolay(a)cumulusnetworks.com> Cc: "David S. Miller" <davem(a)davemloft.net> Cc: "Peter Zijlstra (Intel)" <peterz(a)infradead.org> Cc: Rasmus Villemoes <linux(a)rasmusvillemoes.dk> Cc: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> Cc: Dmitry Vyukov <dvyukov(a)google.com> Cc: Alexander Potapenko <glider(a)google.com> Cc: linux-kernel(a)vger.kernel.org Cc: linux-media(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Cc: linaro-mm-sig(a)lists.linaro.org --- include/linux/async.h | 60 +++++++++- kernel/async.c | 244 +++++++++++++++++++++---------------- lib/test-async-domain.c | 311 +++++++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 505 insertions(+), 110 deletions(-) diff --git a/include/linux/async.h b/include/linux/async.h index 6b0226bdaadc..45d6c8323b60 100644 --- a/include/linux/async.h +++ b/include/linux/async.h @@ -13,38 +13,88 @@ #define __ASYNC_H__ #include <linux/types.h> +#include <linux/kfence.h> #include <linux/list.h> typedef u64 async_cookie_t; typedef void (*async_func_t) (void *data, async_cookie_t cookie); + +struct async_work { + struct kfence fence; + /* private */ +}; + struct async_domain { struct list_head pending; unsigned registered:1; }; +#define ASYNC_DOMAIN_INIT(_name, _r) { \ + .pending = LIST_HEAD_INIT(_name.pending), \ + .registered = _r \ +} + /* * domain participates in global async_synchronize_full */ #define ASYNC_DOMAIN(_name) \ - struct async_domain _name = { .pending = LIST_HEAD_INIT(_name.pending), \ - .registered = 1 } + struct async_domain _name = ASYNC_DOMAIN_INIT(_name, 1) /* * domain is free to go out of scope as soon as all pending work is * complete, this domain does not participate in async_synchronize_full */ #define ASYNC_DOMAIN_EXCLUSIVE(_name) \ - struct async_domain _name = { .pending = LIST_HEAD_INIT(_name.pending), \ - .registered = 0 } + struct async_domain _name = ASYNC_DOMAIN_INIT(_name, 0) + +extern void init_async_domain(struct async_domain *domain, bool registered); extern async_cookie_t async_schedule(async_func_t func, void *data); extern async_cookie_t async_schedule_domain(async_func_t func, void *data, struct async_domain *domain); -void async_unregister_domain(struct async_domain *domain); +extern void async_unregister_domain(struct async_domain *domain); extern void async_synchronize_full(void); extern void async_synchronize_full_domain(struct async_domain *domain); extern void async_synchronize_cookie(async_cookie_t cookie); extern void async_synchronize_cookie_domain(async_cookie_t cookie, struct async_domain *domain); + extern bool current_is_async(void); + +extern struct async_work * +async_work_create(async_func_t func, void *data, gfp_t gfp); + +static inline struct async_work *async_work_get(struct async_work *work) +{ + kfence_get(&work->fence); + return work; +} + +static inline int +async_work_after(struct async_work *work, struct kfence *fence) +{ + return kfence_add(&work->fence, fence, GFP_KERNEL); +} + +static inline int +async_work_before(struct async_work *work, struct kfence *fence) +{ + return kfence_add(fence, &work->fence, GFP_KERNEL); +} + +static inline void async_work_wait(struct async_work *work) +{ + kfence_wait(&work->fence); +} + +static inline void async_work_put(struct async_work *work) +{ + kfence_put(&work->fence); +} + +extern async_cookie_t queue_async_work(struct async_domain *domain, + struct async_work *work, + gfp_t gfp); +extern async_cookie_t schedule_async_work(struct async_work *work); + #endif diff --git a/kernel/async.c b/kernel/async.c index 1fa1f39b5a74..83007c39a113 100644 --- a/kernel/async.c +++ b/kernel/async.c @@ -2,6 +2,7 @@ * async.c: Asynchronous function calls for boot performance * * (C) Copyright 2009 Intel Corporation + * (C) Copyright 2016 Intel Corporation * Author: Arjan van de Ven <arjan(a)linux.intel.com> * * This program is free software; you can redistribute it and/or @@ -62,28 +63,31 @@ asynchronous and synchronous parts of the kernel. #include "workqueue_internal.h" -static async_cookie_t next_cookie = 1; - #define MAX_WORK 32768 -#define ASYNC_COOKIE_MAX ULLONG_MAX /* infinity cookie */ - -static LIST_HEAD(async_global_pending); /* pending from all registered doms */ -static ASYNC_DOMAIN(async_dfl_domain); -static DEFINE_SPINLOCK(async_lock); struct async_entry { - struct list_head domain_list; - struct list_head global_list; - struct work_struct work; - async_cookie_t cookie; - async_func_t func; - void *data; - struct async_domain *domain; + struct async_work base; + struct work_struct work; + + struct list_head pending_link[2]; + + async_cookie_t cookie; + async_func_t func; + void *data; }; -static DECLARE_WAIT_QUEUE_HEAD(async_done); +static LIST_HEAD(async_global_pending); /* pending from all registered doms */ +static ASYNC_DOMAIN(async_dfl_domain); +static DEFINE_SPINLOCK(async_lock); +static unsigned async_pending_count; -static atomic_t entry_count; +static async_cookie_t assign_cookie(void) +{ + static async_cookie_t next_cookie; + if (++next_cookie == 0) + next_cookie = 1; + return next_cookie; +} /** * DOC: kfence overview @@ -166,6 +170,8 @@ static atomic_t entry_count; */ #define KFENCE_CHECKED_BIT 0 +#define ASYNC_WORK_BIT 1 +#define ASYNC_QUEUED_BIT 2 static void kfence_free(struct kref *kref) { @@ -173,7 +179,7 @@ static void kfence_free(struct kref *kref) WARN_ON(atomic_read(&fence->pending) > 0); - if (fence->flags) { + if (fence->flags && !test_bit(ASYNC_WORK_BIT, &fence->flags)) { kfence_notify_t fn = (kfence_notify_t)fence->flags; fn(fence); } else @@ -229,6 +235,13 @@ static void __kfence_signal(struct kfence *fence, if (!atomic_dec_and_test(&fence->pending)) return; + if (test_bit(ASYNC_WORK_BIT, &fence->flags)) { + struct async_entry *entry = + container_of(fence, typeof(*entry), base.fence); + queue_work(system_unbound_wq, &entry->work); + return; + } + if (fence->flags) { kfence_notify_t fn = (kfence_notify_t)fence->flags; fn(fence); @@ -322,7 +335,7 @@ EXPORT_SYMBOL_GPL(kfence_create); void kfence_init(struct kfence *fence, kfence_notify_t fn) { __kfence_init(fence); - BUG_ON((unsigned long)fn & KFENCE_CHECKED_BIT); + BUG_ON((unsigned long)fn & (KFENCE_CHECKED_BIT | ASYNC_WORK_BIT)); fence->flags = (unsigned long)fn; } EXPORT_SYMBOL_GPL(kfence_init); @@ -656,36 +669,10 @@ int kfence_add_delay(struct kfence *fence, } EXPORT_SYMBOL_GPL(kfence_add_delay); -static async_cookie_t lowest_in_progress(struct async_domain *domain) -{ - struct list_head *pending; - async_cookie_t ret = ASYNC_COOKIE_MAX; - unsigned long flags; - - spin_lock_irqsave(&async_lock, flags); - - if (domain) - pending = &domain->pending; - else - pending = &async_global_pending; - - if (!list_empty(pending)) - ret = list_first_entry(pending, struct async_entry, - domain_list)->cookie; - - spin_unlock_irqrestore(&async_lock, flags); - return ret; -} - -/* - * pick the first pending entry and run it - */ static void async_run_entry_fn(struct work_struct *work) { - struct async_entry *entry = - container_of(work, struct async_entry, work); - unsigned long flags; - ktime_t uninitialized_var(calltime), delta, rettime; + struct async_entry *entry = container_of(work, typeof(*entry), work); + ktime_t uninitialized_var(calltime); /* 1) run (and print duration) */ if (initcall_debug && system_state == SYSTEM_BOOTING) { @@ -696,8 +683,7 @@ static void async_run_entry_fn(struct work_struct *work) } entry->func(entry->data, entry->cookie); if (initcall_debug && system_state == SYSTEM_BOOTING) { - rettime = ktime_get(); - delta = ktime_sub(rettime, calltime); + ktime_t delta = ktime_sub(ktime_get(), calltime); pr_debug("initcall %lli_%pF returned 0 after %lld usecs\n", (long long)entry->cookie, entry->func, @@ -705,69 +691,71 @@ static void async_run_entry_fn(struct work_struct *work) } /* 2) remove self from the pending queues */ - spin_lock_irqsave(&async_lock, flags); - list_del_init(&entry->domain_list); - list_del_init(&entry->global_list); - - /* 3) free the entry */ - kfree(entry); - atomic_dec(&entry_count); + spin_lock_irq(&async_lock); + list_del(&entry->pending_link[0]); + list_del(&entry->pending_link[1]); + async_pending_count--; + spin_unlock_irq(&async_lock); - spin_unlock_irqrestore(&async_lock, flags); + /* 3) wake up any waiters */ + atomic_dec(&entry->base.fence.pending); + __kfence_wake_up_all(&entry->base.fence, NULL); - /* 4) wake up any waiters */ - wake_up(&async_done); + kfence_put(&entry->base.fence); } -static async_cookie_t __async_schedule(async_func_t func, void *data, struct async_domain *domain) +struct async_work *async_work_create(async_func_t func, void *data, gfp_t gfp) { struct async_entry *entry; - unsigned long flags; - async_cookie_t newcookie; - /* allow irq-off callers */ - entry = kzalloc(sizeof(struct async_entry), GFP_ATOMIC); + entry = kmalloc(sizeof(*entry), gfp); + if (!entry) + return NULL; - /* - * If we're out of memory or if there's too much work - * pending already, we execute synchronously. - */ - if (!entry || atomic_read(&entry_count) > MAX_WORK) { - kfree(entry); - spin_lock_irqsave(&async_lock, flags); - newcookie = next_cookie++; - spin_unlock_irqrestore(&async_lock, flags); + __kfence_init(&entry->base.fence); - /* low on memory.. run synchronously */ - func(data, newcookie); - return newcookie; - } - INIT_LIST_HEAD(&entry->domain_list); - INIT_LIST_HEAD(&entry->global_list); INIT_WORK(&entry->work, async_run_entry_fn); entry->func = func; entry->data = data; - entry->domain = domain; - spin_lock_irqsave(&async_lock, flags); + __set_bit(ASYNC_WORK_BIT, &entry->base.fence.flags); - /* allocate cookie and queue */ - newcookie = entry->cookie = next_cookie++; + return &entry->base; +} +EXPORT_SYMBOL_GPL(async_work_create); - list_add_tail(&entry->domain_list, &domain->pending); - if (domain->registered) - list_add_tail(&entry->global_list, &async_global_pending); +async_cookie_t queue_async_work(struct async_domain *domain, + struct async_work *work, + gfp_t gfp) +{ + struct async_entry *entry = container_of(work, typeof(*entry), base); + unsigned long flags; - atomic_inc(&entry_count); + if (WARN_ON(test_and_set_bit(ASYNC_QUEUED_BIT, + &entry->base.fence.flags))) + return 0; + + spin_lock_irqsave(&async_lock, flags); + entry->cookie = assign_cookie(); + list_add_tail(&entry->pending_link[0], &domain->pending); + INIT_LIST_HEAD(&entry->pending_link[1]); + if (domain->registered) + list_add_tail(&entry->pending_link[1], &async_global_pending); + async_pending_count++; spin_unlock_irqrestore(&async_lock, flags); /* mark that this task has queued an async job, used by module init */ current->flags |= PF_USED_ASYNC; - /* schedule for execution */ - queue_work(system_unbound_wq, &entry->work); + kfence_signal(kfence_get(&entry->base.fence)); - return newcookie; + return entry->cookie; +} +EXPORT_SYMBOL_GPL(queue_async_work); + +async_cookie_t schedule_async_work(struct async_work *work) +{ + return queue_async_work(&async_dfl_domain, work, GFP_KERNEL); } /** @@ -780,7 +768,7 @@ static async_cookie_t __async_schedule(async_func_t func, void *data, struct asy */ async_cookie_t async_schedule(async_func_t func, void *data) { - return __async_schedule(func, data, &async_dfl_domain); + return async_schedule_domain(func, data, &async_dfl_domain); } EXPORT_SYMBOL_GPL(async_schedule); @@ -799,7 +787,27 @@ EXPORT_SYMBOL_GPL(async_schedule); async_cookie_t async_schedule_domain(async_func_t func, void *data, struct async_domain *domain) { - return __async_schedule(func, data, domain); + struct async_work *work; + async_cookie_t cookie = 0; + + work = NULL; + if (READ_ONCE(async_pending_count) < MAX_WORK) + work = async_work_create(func, data, GFP_ATOMIC); + if (work) { + cookie = queue_async_work(domain, work, GFP_ATOMIC); + async_work_put(work); + } + if (!cookie) { + unsigned long flags; + + spin_lock_irqsave(&async_lock, flags); + cookie = assign_cookie(); + spin_unlock_irqrestore(&async_lock, flags); + + func(data, cookie); + } + + return cookie; } EXPORT_SYMBOL_GPL(async_schedule_domain); @@ -825,10 +833,8 @@ EXPORT_SYMBOL_GPL(async_synchronize_full); */ void async_unregister_domain(struct async_domain *domain) { - spin_lock_irq(&async_lock); - WARN_ON(!domain->registered || !list_empty(&domain->pending)); + WARN_ON(!list_empty(&domain->pending)); domain->registered = 0; - spin_unlock_irq(&async_lock); } EXPORT_SYMBOL_GPL(async_unregister_domain); @@ -841,7 +847,7 @@ EXPORT_SYMBOL_GPL(async_unregister_domain); */ void async_synchronize_full_domain(struct async_domain *domain) { - async_synchronize_cookie_domain(ASYNC_COOKIE_MAX, domain); + async_synchronize_cookie_domain(0, domain); } EXPORT_SYMBOL_GPL(async_synchronize_full_domain); @@ -856,19 +862,49 @@ EXPORT_SYMBOL_GPL(async_synchronize_full_domain); */ void async_synchronize_cookie_domain(async_cookie_t cookie, struct async_domain *domain) { - ktime_t uninitialized_var(starttime), delta, endtime; + ktime_t uninitialized_var(starttime); + struct list_head *pending; + + pending = domain ? &domain->pending : &async_global_pending; if (initcall_debug && system_state == SYSTEM_BOOTING) { pr_debug("async_waiting @ %i\n", task_pid_nr(current)); starttime = ktime_get(); } - wait_event(async_done, lowest_in_progress(domain) >= cookie); + do { + struct kfence *fence = NULL; + unsigned long flags; - if (initcall_debug && system_state == SYSTEM_BOOTING) { - endtime = ktime_get(); - delta = ktime_sub(endtime, starttime); + spin_lock_irqsave(&async_lock, flags); + if (!list_empty(pending)) { + struct async_entry *entry; + + if (cookie) { + entry = list_first_entry(pending, + struct async_entry, + pending_link[!domain]); + if ((s64)(cookie - entry->cookie) > 0) + fence = kfence_get(&entry->base.fence); + } else { + entry = list_last_entry(pending, + struct async_entry, + pending_link[!domain]); + cookie = entry->cookie; + fence = kfence_get(&entry->base.fence); + } + } + spin_unlock_irqrestore(&async_lock, flags); + + if (!fence) + break; + + kfence_wait(fence); + kfence_put(fence); + } while (1); + if (initcall_debug && system_state == SYSTEM_BOOTING) { + ktime_t delta = ktime_sub(ktime_get(), starttime); pr_debug("async_continuing @ %i after %lli usec\n", task_pid_nr(current), (long long)ktime_to_ns(delta) >> 10); @@ -901,3 +937,11 @@ bool current_is_async(void) return worker && worker->current_func == async_run_entry_fn; } EXPORT_SYMBOL_GPL(current_is_async); + +void init_async_domain(struct async_domain *domain, bool registered) +{ + memset(domain, 0, sizeof(*domain)); + INIT_LIST_HEAD(&domain->pending); + domain->registered = registered; +} +EXPORT_SYMBOL_GPL(init_async_domain); diff --git a/lib/test-async-domain.c b/lib/test-async-domain.c index 558a71414fb6..24c55537c678 100644 --- a/lib/test-async-domain.c +++ b/lib/test-async-domain.c @@ -21,6 +21,269 @@ static void task_B(void *data, async_cookie_t cookie) smp_store_mb(*result, 'B'); } +static int __init test_x(const char *name, + struct async_domain *domain, + async_func_t func, + const long expected) +{ + struct async_work *A; + long result = 0; + + A = async_work_create(func, &result, GFP_KERNEL); + if (!A) + return -ENOMEM; + + queue_async_work(domain, A, GFP_KERNEL); + async_work_wait(A); + async_work_put(A); + + if (READ_ONCE(result) != expected) { + pr_warn("%s expected %c [%ld], got %ld\n", + name, (char)expected, expected, result); + return -EINVAL; + } + + return 0; +} + +static int __init test_A(struct async_domain *domain) +{ + return test_x(__func__, domain, task_A, 'A'); +} + +static int __init test_B(struct async_domain *domain) +{ + return test_x(__func__, domain, task_B, 'B'); +} + +static int __init test_x_fence(const char *name, + struct async_domain *domain, + async_func_t func, + const long expected) +{ + struct async_work *A; + struct kfence *fence; + long result = 0; + + A = async_work_create(func, &result, GFP_KERNEL); + if (!A) + return -ENOMEM; + + fence = kfence_create(GFP_KERNEL); + if (!fence) + return -ENOMEM; + + queue_async_work(domain, A, GFP_KERNEL); + + kfence_add(fence, &A->fence, GFP_KERNEL); + kfence_signal(fence); + + kfence_wait(fence); + + async_work_put(A); + kfence_put(fence); + + if (READ_ONCE(result) != expected) { + pr_warn("%s expected %c [%ld], got %ld\n", + name, (char)expected, expected, result); + return -EINVAL; + } + + return 0; +} + +static int __init test_A_fence(struct async_domain *domain) +{ + return test_x_fence(__func__, domain, task_A, 'A'); +} + +static int __init test_B_fence(struct async_domain *domain) +{ + return test_x_fence(__func__, domain, task_B, 'B'); +} + +static int __init test_x_fence_y(const char *name, + struct async_domain *domain, + async_func_t x, + async_func_t y, + const long expected) +{ + struct async_work *A, *B; + struct kfence *fence; + long result = 0; + + A = async_work_create(x, &result, GFP_KERNEL); + if (!A) + return -ENOMEM; + + B = async_work_create(y, &result, GFP_KERNEL); + if (!B) + return -ENOMEM; + + fence = kfence_create(GFP_KERNEL); + if (!fence) + return -ENOMEM; + + kfence_add(fence, &A->fence, GFP_KERNEL); + kfence_signal(fence); + + queue_async_work(domain, A, GFP_KERNEL); + async_work_put(A); + + async_work_after(B, fence); + queue_async_work(domain, B, GFP_KERNEL); + kfence_put(fence); + + async_work_wait(B); + async_work_put(B); + + if (READ_ONCE(result) != expected) { + pr_warn("%s expected %c [%ld], got %ld\n", + name, (char)expected, expected, result); + return -EINVAL; + } + + return 0; +} + +static int __init test_A_fence_B(struct async_domain *domain) +{ + return test_x_fence_y(__func__, domain, task_A, task_B, 'B'); +} + +static int __init test_B_fence_A(struct async_domain *domain) +{ + return test_x_fence_y(__func__, domain, task_B, task_A, 'A'); +} + +struct long_context { + struct kfence *barrier; + long *src; + long result; +}; + +static void task_wait(void *data, async_cookie_t cookie) +{ + struct long_context *ctx = data; + + kfence_wait(ctx->barrier); + smp_store_mb(ctx->result, READ_ONCE(*ctx->src)); +} + +static int __init test_pause(struct async_domain *domain) +{ + struct long_context ctx; + struct async_work *A, *B; + const long expected = 'B'; + long out_B = 'A'; + + ctx.result = 0; + ctx.src = &out_B; + + A = async_work_create(task_wait, &ctx, GFP_KERNEL); + if (!A) + return -ENOMEM; + + B = async_work_create(task_B, &out_B, GFP_KERNEL); + if (!B) + return -ENOMEM; + + ctx.barrier = kfence_get(&B->fence); + + queue_async_work(domain, A, GFP_KERNEL); + queue_async_work(domain, B, GFP_KERNEL); + async_work_put(B); + + async_work_wait(A); + async_work_put(A); + + if (READ_ONCE(ctx.result) != expected) { + pr_warn("%s expected %c [%ld], got %ld\n", + __func__, (char)expected, expected, ctx.result); + return -EINVAL; + } + + kfence_put(ctx.barrier); + + return 0; +} + +static void task_signal(void *data, async_cookie_t cookie) +{ + struct long_context *ctx = data; + + kfence_signal(ctx->barrier); +} + +static int __init test_manual(struct async_domain *domain) +{ + struct long_context ctx; + struct async_work *A, *B, *C; + const long expected = 'B'; + long out_B = 'A'; + + ctx.result = 0; + ctx.src = &out_B; + ctx.barrier = kfence_create(GFP_KERNEL); + + A = async_work_create(task_wait, &ctx, GFP_KERNEL); + if (!A) + return -ENOMEM; + + B = async_work_create(task_B, &out_B, GFP_KERNEL); + if (!B) + return -ENOMEM; + + C = async_work_create(task_signal, &ctx, GFP_KERNEL); + if (!B) + return -ENOMEM; + + async_work_after(C, &B->fence); + + queue_async_work(domain, A, GFP_KERNEL); + queue_async_work(domain, B, GFP_KERNEL); + queue_async_work(domain, C, GFP_KERNEL); + + async_work_wait(A); + + async_work_put(C); + async_work_put(B); + async_work_put(A); + kfence_put(ctx.barrier); + + if (READ_ONCE(ctx.result) != expected) { + pr_warn("%s expected %c [%ld], got %ld\n", + __func__, (char)expected, expected, ctx.result); + return -EINVAL; + } + + return 0; +} + +static int __init test_sync(struct async_domain *domain) +{ + struct async_work *B; + const long expected = 'B'; + long result = 0; + + B = async_work_create(task_B, &result, GFP_KERNEL); + if (!B) + return -ENOMEM; + + queue_async_work(domain, B, GFP_KERNEL); + async_work_put(B); + + async_synchronize_full_domain(domain); + + if (READ_ONCE(result) != expected) { + pr_warn("%s expected %c [%ld], got %ld\n", + __func__, (char)expected, expected, result); + return -EINVAL; + } + + return 0; +} + static int __init test_implicit(struct async_domain *domain) { const long expected = 'B'; @@ -99,24 +362,62 @@ static int __init test_async_domain_init(void) pr_info("Testing async-domains\n"); - ret = test_implicit(&domain); + ret = test_A(&domain); if (ret) return ret; + ret = test_A_fence(&domain); + if (ret) + goto err; + + ret = test_A_fence_B(&domain); + if (ret) + goto err; + + ret = test_B(&domain); + if (ret) + goto err; + + ret = test_B_fence(&domain); + if (ret) + goto err; + + ret = test_B_fence_A(&domain); + if (ret) + goto err; + + ret = test_pause(&domain); + if (ret) + goto err; + + ret = test_manual(&domain); + if (ret) + goto err; + + ret = test_sync(&domain); + if (ret) + goto err; + + ret = test_implicit(&domain); + if (ret) + goto err; + ret = test_registered(&domain); if (ret) - return ret; + goto err; ret = perf_nop(1, 100); if (ret) - return ret; + goto err; ret = perf_nop(128, 1000); if (ret) - return ret; + goto err; +err: + async_synchronize_full_domain(&domain); async_unregister_domain(&domain); - return 0; + return ret; } static void __exit test_async_domain_cleanup(void) -- 2.8.1

8 years, 11 months

1
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[PATCH 6/9] async: Add a convenience wrapper for waiting on implicit dma-buf

by Chris Wilson

dma-buf implicitly track their (DMA) rendering using a reservation_object, which tracks ether the last write (in an exclusive fence) or the current renders (with a set of shared fences). To wait upon a reservation object in conjunction with other sources, kfence_add_reservation() extracts the DMA fences from the object and adds the individual waits for the kfence. Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Shuah Khan <shuahkh(a)osg.samsung.com> Cc: Tejun Heo <tj(a)kernel.org> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Andrew Morton <akpm(a)linux-foundation.org> Cc: Ingo Molnar <mingo(a)kernel.org> Cc: Kees Cook <keescook(a)chromium.org> Cc: Thomas Gleixner <tglx(a)linutronix.de> Cc: "Paul E. McKenney" <paulmck(a)linux.vnet.ibm.com> Cc: Dan Williams <dan.j.williams(a)intel.com> Cc: Andrey Ryabinin <aryabinin(a)virtuozzo.com> Cc: Davidlohr Bueso <dave(a)stgolabs.net> Cc: Nikolay Aleksandrov <nikolay(a)cumulusnetworks.com> Cc: "David S. Miller" <davem(a)davemloft.net> Cc: "Peter Zijlstra (Intel)" <peterz(a)infradead.org> Cc: Rasmus Villemoes <linux(a)rasmusvillemoes.dk> Cc: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> Cc: Dmitry Vyukov <dvyukov(a)google.com> Cc: Alexander Potapenko <glider(a)google.com> Cc: linux-kernel(a)vger.kernel.org Cc: linux-media(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Cc: linaro-mm-sig(a)lists.linaro.org --- include/linux/kfence.h | 5 ++++ kernel/async.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 65 insertions(+), 5 deletions(-) diff --git a/include/linux/kfence.h b/include/linux/kfence.h index 1abec5e6b23c..2f01eb052e4d 100644 --- a/include/linux/kfence.h +++ b/include/linux/kfence.h @@ -17,6 +17,7 @@ struct completion; struct fence; enum hrtimer_mode; +struct reservation_object; struct kfence { wait_queue_head_t wait; @@ -34,6 +35,10 @@ extern int kfence_add_completion(struct kfence *fence, extern int kfence_add_dma(struct kfence *fence, struct fence *dma, gfp_t gfp); +extern int kfence_add_reservation(struct kfence *fence, + struct reservation_object *resv, + bool write, + gfp_t gfp); extern int kfence_add_delay(struct kfence *fence, clockid_t clock, enum hrtimer_mode mode, ktime_t delay, u64 slack, diff --git a/kernel/async.c b/kernel/async.c index 5d02445e36b7..1fa1f39b5a74 100644 --- a/kernel/async.c +++ b/kernel/async.c @@ -54,9 +54,10 @@ asynchronous and synchronous parts of the kernel. #include <linux/kfence.h> #include <linux/ktime.h> #include <linux/export.h> -#include <linux/wait.h> +#include <linux/reservation.h> #include <linux/sched.h> #include <linux/slab.h> +#include <linux/wait.h> #include <linux/workqueue.h> #include "workqueue_internal.h" @@ -123,11 +124,17 @@ static atomic_t entry_count; * allowing multiple pending / signals to be sent before the kfence is * complete. * - * kfence_add() / kfence_add_completion() / kfence_add_dma() + * kfence_add() / kfence_add_completion() + * / kfence_add_dma() + * + * sets the kfence to wait upon another fence or completion respectively. To + * wait upon DMA activity, either use * - * sets the kfence to wait upon another fence, completion, or DMA fence - * respectively. To set the fence to wait for at least a certain period of - * time, or until after a certain point in time, use + * kfence_add_dma() or kfence_add_reservation() + * + * depending on the manner of DMA activity tracking. To set the fence to wait + * for at least a certain period of time, or until after a certain point in + * time, use * * kfence_add_timer() * @@ -547,6 +554,54 @@ int kfence_add_dma(struct kfence *fence, struct fence *dma, gfp_t gfp) EXPORT_SYMBOL_GPL(kfence_add_dma); /** + * kfence_add_reservation - set the fence to wait upon a reservation_object + * @fence: this kfence + * @resv: target reservation_object (collection of DMA fences) to wait upon + * @write: Wait for read or read/write access + * @gfp: the allowed allocation type + * + * kfence_add_reservation() causes the @fence to wait upon completion of the + * reservation object (a collection of DMA fences), either for read access + * or for read/write access. + * + * Returns 1 if the @fence was successfully to the waitqueues of @resv, 0 + * if @resev was already signaled (and so not added), or a negative error code. + */ +int kfence_add_reservation(struct kfence *fence, + struct reservation_object *resv, + bool write, + gfp_t gfp) +{ + struct fence *excl, **shared; + unsigned count, i; + int ret; + + ret = reservation_object_get_fences_rcu(resv, &excl, &count, &shared); + if (ret) + return ret; + + if (write) { + for (i = 0; i < count; i++) { + ret |= kfence_add_dma(fence, shared[i], gfp); + if (ret < 0) + goto out; + } + } + + if (excl) + ret |= kfence_add_dma(fence, excl, gfp); + +out: + fence_put(excl); + for (i = 0; i < count; i++) + fence_put(shared[i]); + kfree(shared); + + return ret; +} +EXPORT_SYMBOL_GPL(kfence_add_reservation); + +/** * kfence_add_delay - set the fence to wait for a period of time * @fence: this kfence * @clock: which clock to program -- 2.8.1

8 years, 11 months

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[PATCH 4/9] async: Extend kfences for listening on DMA fences

by Chris Wilson

dma-buf provides an interfaces for receiving notifications from DMA hardware. kfence provides a useful interface for collecting such fences and combining them with other events. Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Shuah Khan <shuahkh(a)osg.samsung.com> Cc: Tejun Heo <tj(a)kernel.org> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Andrew Morton <akpm(a)linux-foundation.org> Cc: Ingo Molnar <mingo(a)kernel.org> Cc: Kees Cook <keescook(a)chromium.org> Cc: Thomas Gleixner <tglx(a)linutronix.de> Cc: "Paul E. McKenney" <paulmck(a)linux.vnet.ibm.com> Cc: Dan Williams <dan.j.williams(a)intel.com> Cc: Andrey Ryabinin <aryabinin(a)virtuozzo.com> Cc: Davidlohr Bueso <dave(a)stgolabs.net> Cc: Nikolay Aleksandrov <nikolay(a)cumulusnetworks.com> Cc: "David S. Miller" <davem(a)davemloft.net> Cc: "Peter Zijlstra (Intel)" <peterz(a)infradead.org> Cc: Rasmus Villemoes <linux(a)rasmusvillemoes.dk> Cc: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> Cc: Dmitry Vyukov <dvyukov(a)google.com> Cc: Alexander Potapenko <glider(a)google.com> Cc: linux-kernel(a)vger.kernel.org Cc: linux-media(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Cc: linaro-mm-sig(a)lists.linaro.org --- include/linux/kfence.h | 4 ++++ kernel/async.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 65 insertions(+), 2 deletions(-) diff --git a/include/linux/kfence.h b/include/linux/kfence.h index 82096bfafaa1..d71f30c626ae 100644 --- a/include/linux/kfence.h +++ b/include/linux/kfence.h @@ -15,6 +15,7 @@ #include <linux/wait.h> struct completion; +struct fence; struct kfence { wait_queue_head_t wait; @@ -29,6 +30,9 @@ extern int kfence_add(struct kfence *fence, struct kfence *after, gfp_t gfp); extern int kfence_add_completion(struct kfence *fence, struct completion *x, gfp_t gfp); +extern int kfence_add_dma(struct kfence *fence, + struct fence *dma, + gfp_t gfp); extern void kfence_pending(struct kfence *fence); extern void kfence_signal(struct kfence *fence); extern void kfence_wait(struct kfence *fence); diff --git a/kernel/async.c b/kernel/async.c index db22b890711e..01552d23a916 100644 --- a/kernel/async.c +++ b/kernel/async.c @@ -50,6 +50,7 @@ asynchronous and synchronous parts of the kernel. #include <linux/async.h> #include <linux/atomic.h> +#include <linux/fence.h> #include <linux/kfence.h> #include <linux/ktime.h> #include <linux/export.h> @@ -122,9 +123,10 @@ static atomic_t entry_count; * allowing multiple pending / signals to be sent before the kfence is * complete. * - * kfence_add() / kfence_add_completion() + * kfence_add() / kfence_add_completion() / kfence_add_dma() * - * sets the kfence to wait upon another fence, or completion respectively. + * sets the kfence to wait upon another fence, completion, or DMA fence + * respectively. * * Unlike completions, kfences are expected to live inside more complex graphs * and form the basis for parallel execution of interdependent and so are @@ -484,6 +486,63 @@ int kfence_add_completion(struct kfence *fence, struct completion *x, gfp_t gfp) } EXPORT_SYMBOL_GPL(kfence_add_completion); +struct dma_fence_cb { + struct fence_cb base; + struct kfence *fence; +}; + +static void dma_kfence_wake(struct fence *dma, struct fence_cb *data) +{ + struct dma_fence_cb *cb = container_of(data, typeof(*cb), base); + kfence_signal(cb->fence); + kfence_put(cb->fence); + kfree(cb); +} + +/** + * kfence_add_dma - set the fence to wait upon a DMA fence + * @fence: this kfence + * @dma: target DMA fence to wait upon + * @gfp: the allowed allocation type + * + * kfence_add_dma() causes the @fence to wait upon completion of a DMA fence. + * + * Returns 1 if the @fence was successfully to the waitqueue of @dma, 0 + * if @dma was already signaled (and so not added), or a negative error code. + */ +int kfence_add_dma(struct kfence *fence, struct fence *dma, gfp_t gfp) +{ + struct dma_fence_cb *cb; + int ret; + + if (!dma || fence_is_signaled(dma)) + return 0; + + cb = kmalloc(sizeof(*cb), gfp); + if (!cb) { + if (!gfpflags_allow_blocking(gfp)) + return -ENOMEM; + + return fence_wait(dma, false); + } + + cb->fence = kfence_get(fence); + kfence_pending(fence); + + ret = fence_add_callback(dma, &cb->base, dma_kfence_wake); + if (ret == 0) { + /* signal fence add and is pending */ + ret = 1; + } else { + dma_kfence_wake(dma, &cb->base); + if (ret == -ENOENT) /* fence already signaled */ + ret = 0; + } + + return ret; +} +EXPORT_SYMBOL_GPL(kfence_add_dma); + static async_cookie_t lowest_in_progress(struct async_domain *domain) { struct list_head *pending; -- 2.8.1

8 years, 11 months

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[PATCH v4 0/4] Generic zpos property

by Benjamin Gaignard

version 4: make sure that normalized zpos value is stay in the defined property range and warn user if not. Fix NULL pointer bug in rcar-du while setting zpos value. No changes in the other drivers. version 3: use kmalloc_array instead of kmalloc. Correct normalize_zpos computation (comeback to Mareck original code) version 2: add a zpos property into drm_plane structure to simplify code. This allow to get/set zpos value in core and not in drivers code. Fix various remarks. version 1: refactor Marek's patches to have per plane zpos property instead of only one in core. Benjamin Gaignard (3): drm: add generic zpos property drm: sti: use generic zpos for plane drm: rcar: use generic code for managing zpos plane property Marek Szyprowski (1): drm/exynos: use generic code for managing zpos plane property Documentation/DocBook/gpu.tmpl | 10 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_atomic.c | 4 + drivers/gpu/drm/drm_atomic_helper.c | 6 + drivers/gpu/drm/drm_blend.c | 230 ++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_crtc_internal.h | 3 + drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 - drivers/gpu/drm/exynos/exynos_drm_plane.c | 67 ++------- drivers/gpu/drm/exynos/exynos_mixer.c | 6 +- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 - drivers/gpu/drm/rcar-du/rcar_du_kms.c | 5 - drivers/gpu/drm/rcar-du/rcar_du_plane.c | 9 +- drivers/gpu/drm/rcar-du/rcar_du_plane.h | 2 - drivers/gpu/drm/sti/sti_mixer.c | 9 +- drivers/gpu/drm/sti/sti_plane.c | 80 ++++------- drivers/gpu/drm/sti/sti_plane.h | 2 - include/drm/drm_crtc.h | 30 ++++ 18 files changed, 331 insertions(+), 139 deletions(-) create mode 100644 drivers/gpu/drm/drm_blend.c Cc: Inki Dae <inki.dae(a)samsung.com> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Ville Syrjala <ville.syrjala(a)linux.intel.com> Cc: Joonyoung Shim <jy0922.shim(a)samsung.com> Cc: Seung-Woo Kim <sw0312.kim(a)samsung.com> Cc: Andrzej Hajda <a.hajda(a)samsung.com> Cc: Krzysztof Kozlowski <k.kozlowski(a)samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie(a)samsung.com> Cc: Tobias Jakobi <tjakobi(a)math.uni-bielefeld.de> Cc: Gustavo Padovan <gustavo(a)padovan.org> Cc: vincent.abriou(a)st.com Cc: fabien.dessenne(a)st.com Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> -- 1.9.1

8 years, 11 months

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[PATCH 0/3] dma-buf: debugfs fixes

by Mathias Krause

This small series is the v2 of the patch posted initially here: http://www.spinics.net/lists/linux-media/msg101347.html It not only fixes the type mix-up and addresses Daniel's remark (patch 1), it also smoothes out the error handling in dma_buf_init_debugfs() (patch 2) and removes the then unneeded function dma_buf_debugfs_create_file() (patch 3). Please apply! Mathias Krause (3): dma-buf: propagate errors from dma_buf_describe() on debugfs read dma-buf: remove dma_buf directory on bufinfo file creation errors dma-buf: remove dma_buf_debugfs_create_file() drivers/dma-buf/dma-buf.c | 44 ++++++++++++++------------------------------ include/linux/dma-buf.h | 2 -- 2 files changed, 14 insertions(+), 32 deletions(-) -- 1.7.10.4

8 years, 11 months

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Re: [Linaro-mm-sig] [Mesa-dev] [RFC] New dma_buf -> EGLImage EGL extension - Final spec published!

by Rob Clark

So, if we wanted to extend this to support the fourcc-modifiers that we have on the kernel side for compressed/tiled/etc formats, what would be the right approach? A new version of the existing extension or a new EGL_EXT_image_dma_buf_import2 extension, or ?? BR, -R On Mon, Feb 25, 2013 at 6:54 AM, Tom Cooksey <tom.cooksey(a)arm.com> wrote: > Hi All, > > The final spec has had enum values assigned and been published on Khronos: > > http://www.khronos.org/registry/egl/extensions/EXT/EGL_EXT_image_dma_buf_im… > > Thanks to all who've provided input. > > > Cheers, > > Tom > > > >> -----Original Message----- >> From: mesa-dev-bounces+tom.cooksey=arm.com(a)lists.freedesktop.org [mailto:mesa-dev- >> bounces+tom.cooksey=arm.com(a)lists.freedesktop.org] On Behalf Of Tom Cooksey >> Sent: 04 October 2012 13:10 >> To: mesa-dev(a)lists.freedesktop.org; linaro-mm-sig(a)lists.linaro.org; dri- >> devel(a)lists.freedesktop.org; linux-media(a)vger.kernel.org >> Subject: [Mesa-dev] [RFC] New dma_buf -> EGLImage EGL extension - New draft! >> >> Hi All, >> >> After receiving a fair bit of feedback (thanks!), I've updated the >> EGL_EXT_image_dma_buf_import spec >> and expanded it to resolve a number of the issues. Please find the latest draft below and let >> me >> know any additional feedback you might have, either on the lists or by private e-mail - I >> don't mind >> which. >> >> I think the only remaining issue now is if we need a mechanism whereby an application can >> query >> which drm_fourcc.h formats EGL supports or if just failing with EGL_BAD_MATCH when the >> application >> has use one EGL doesn't support is sufficient. Any thoughts? >> >> >> Cheers, >> >> Tom >> >> >> --------------------8<-------------------- >> >> >> Name >> >> EXT_image_dma_buf_import >> >> Name Strings >> >> EGL_EXT_image_dma_buf_import >> >> Contributors >> >> Jesse Barker >> Rob Clark >> Tom Cooksey >> >> Contacts >> >> Jesse Barker (jesse 'dot' barker 'at' linaro 'dot' org) >> Tom Cooksey (tom 'dot' cooksey 'at' arm 'dot' com) >> >> Status >> >> DRAFT >> >> Version >> >> Version 4, October 04, 2012 >> >> Number >> >> EGL Extension ??? >> >> Dependencies >> >> EGL 1.2 is required. >> >> EGL_KHR_image_base is required. >> >> The EGL implementation must be running on a Linux kernel supporting the >> dma_buf buffer sharing mechanism. >> >> This extension is written against the wording of the EGL 1.2 Specification. >> >> Overview >> >> This extension allows creating an EGLImage from a Linux dma_buf file >> descriptor or multiple file descriptors in the case of multi-plane YUV >> images. >> >> New Types >> >> None >> >> New Procedures and Functions >> >> None >> >> New Tokens >> >> Accepted by the <target> parameter of eglCreateImageKHR: >> >> EGL_LINUX_DMA_BUF_EXT >> >> Accepted as an attribute in the <attrib_list> parameter of >> eglCreateImageKHR: >> >> EGL_LINUX_DRM_FOURCC_EXT >> EGL_DMA_BUF_PLANE0_FD_EXT >> EGL_DMA_BUF_PLANE0_OFFSET_EXT >> EGL_DMA_BUF_PLANE0_PITCH_EXT >> EGL_DMA_BUF_PLANE1_FD_EXT >> EGL_DMA_BUF_PLANE1_OFFSET_EXT >> EGL_DMA_BUF_PLANE1_PITCH_EXT >> EGL_DMA_BUF_PLANE2_FD_EXT >> EGL_DMA_BUF_PLANE2_OFFSET_EXT >> EGL_DMA_BUF_PLANE2_PITCH_EXT >> EGL_YUV_COLOR_SPACE_HINT_EXT >> EGL_SAMPLE_RANGE_HINT_EXT >> EGL_YUV_CHROMA_HORIZONTAL_SITING_HINT_EXT >> EGL_YUV_CHROMA_VERTICAL_SITING_HINT_EXT >> >> Accepted as the value for the EGL_YUV_COLOR_SPACE_HINT_EXT attribute: >> >> EGL_ITU_REC601_EXT >> EGL_ITU_REC709_EXT >> EGL_ITU_REC2020_EXT >> >> Accepted as the value for the EGL_SAMPLE_RANGE_HINT_EXT attribute: >> >> EGL_YUV_FULL_RANGE_EXT >> EGL_YUV_NARROW_RANGE_EXT >> >> Accepted as the value for the EGL_YUV_CHROMA_HORIZONTAL_SITING_HINT_EXT & >> EGL_YUV_CHROMA_VERTICAL_SITING_HINT_EXT attributes: >> >> EGL_YUV_CHROMA_SITING_0_EXT >> EGL_YUV_CHROMA_SITING_0_5_EXT >> >> >> Additions to Chapter 2 of the EGL 1.2 Specification (EGL Operation) >> >> Add to section 2.5.1 "EGLImage Specification" (as defined by the >> EGL_KHR_image_base specification), in the description of >> eglCreateImageKHR: >> >> "Values accepted for <target> are listed in Table aaa, below. >> >> +-------------------------+--------------------------------------------+ >> | <target> | Notes | >> +-------------------------+--------------------------------------------+ >> | EGL_LINUX_DMA_BUF_EXT | Used for EGLImages imported from Linux | >> | | dma_buf file descriptors | >> +-------------------------+--------------------------------------------+ >> Table aaa. Legal values for eglCreateImageKHR <target> parameter >> >> ... >> >> If <target> is EGL_LINUX_DMA_BUF_EXT, <dpy> must be a valid display, <ctx> >> must be EGL_NO_CONTEXT, and <buffer> must be NULL, cast into the type >> EGLClientBuffer. The details of the image is specified by the attributes >> passed into eglCreateImageKHR. Required attributes and their values are as >> follows: >> >> * EGL_WIDTH & EGL_HEIGHT: The logical dimensions of the buffer in pixels >> >> * EGL_LINUX_DRM_FOURCC_EXT: The pixel format of the buffer, as specified >> by drm_fourcc.h and used as the pixel_format parameter of the >> drm_mode_fb_cmd2 ioctl. >> >> * EGL_DMA_BUF_PLANE0_FD_EXT: The dma_buf file descriptor of plane 0 of >> the image. >> >> * EGL_DMA_BUF_PLANE0_OFFSET_EXT: The offset from the start of the >> dma_buf of the first sample in plane 0, in bytes. >> >> * EGL_DMA_BUF_PLANE0_PITCH_EXT: The number of bytes between the start of >> subsequent rows of samples in plane 0. May have special meaning for >> non-linear formats. >> >> For images in an RGB color-space or those using a single-plane YUV format, >> only the first plane's file descriptor, offset & pitch should be specified. >> For semi-planar YUV formats, the chroma samples are stored in plane 1 and >> for fully planar formats, U-samples are stored in plane 1 and V-samples are >> stored in plane 2. Planes 1 & 2 are specified by the following attributes, >> which have the same meanings as defined above for plane 0: >> >> * EGL_DMA_BUF_PLANE1_FD_EXT >> * EGL_DMA_BUF_PLANE1_OFFSET_EXT >> * EGL_DMA_BUF_PLANE1_PITCH_EXT >> * EGL_DMA_BUF_PLANE2_FD_EXT >> * EGL_DMA_BUF_PLANE2_OFFSET_EXT >> * EGL_DMA_BUF_PLANE2_PITCH_EXT >> >> In addition to the above required attributes, the application may also >> provide hints as to how the data should be interpreted by the GL. If any of >> these hints are not specified, the GL will guess based on the pixel format >> passed as the EGL_LINUX_DRM_FOURCC_EXT attribute or may fall-back to some >> default value. Not all GLs will be able to support all combinations of >> these hints and are free to use whatever settings they choose to achieve >> the closest possible match. >> >> * EGL_YUV_COLOR_SPACE_HINT_EXT: The color-space the data is in. Only >> relevant for images in a YUV format, ignored when specified for an >> image in an RGB format. Accepted values are: >> EGL_ITU_REC601_EXT, EGL_ITU_REC709_EXT & EGL_ITU_REC2020_EXT. >> >> * EGL_YUV_CHROMA_HORIZONTAL_SITING_HINT_EXT & >> EGL_YUV_CHROMA_VERTICAL_SITING_HINT_EXT: Where chroma samples are >> sited relative to luma samples when the image is in a sub-sampled >> format. When the image is not using chroma sub-sampling, the luma and >> chroma samples are assumed to be co-sited. Siting is split into the >> vertical and horizontal and is in a fixed range. A siting of zero >> means the first luma sample is taken from the same position in that >> dimension as the chroma sample. This is best illustrated in the >> diagram below: >> >> (0.5, 0.5) (0.0, 0.5) (0.0, 0.0) >> + + + + + + + + * + * + >> x x x x >> + + + + + + + + + + + + >> >> + + + + + + + + * + * + >> x x x x >> + + + + + + + + + + + + >> >> Luma samples (+), Chroma samples (x) Chrome & Luma samples (*) >> >> Note this attribute is ignored for RGB images and non sub-sampled >> YUV images. Accepted values are: EGL_YUV_CHROMA_SITING_0_EXT (0.0) >> & EGL_YUV_CHROMA_SITING_0_5_EXT (0.5) >> >> * EGL_SAMPLE_RANGE_HINT_EXT: The numerical range of samples. Only >> relevant for images in a YUV format, ignored when specified for >> images in an RGB format. Accepted values are: EGL_YUV_FULL_RANGE_EXT >> (0-256) & EGL_YUV_NARROW_RANGE_EXT (16-235). >> >> >> If eglCreateImageKHR is successful for a EGL_LINUX_DMA_BUF_EXT target, the >> EGL takes ownership of the file descriptor and is responsible for closing >> it, which it may do at any time while the EGLDisplay is initialized." >> >> >> Add to the list of error conditions for eglCreateImageKHR: >> >> "* If <target> is EGL_LINUX_DMA_BUF_EXT and <buffer> is not NULL, the >> error EGL_BAD_PARAMETER is generated. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT, and the list of attributes is >> incomplete, EGL_BAD_PARAMETER is generated. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT, and the EGL_LINUX_DRM_FOURCC_EXT >> attribute is set to a format not supported by the EGL, EGL_BAD_MATCH >> is generated. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT, and the EGL_LINUX_DRM_FOURCC_EXT >> attribute indicates a single-plane format, EGL_BAD_ATTRIBUTE is >> generated if any of the EGL_DMA_BUF_PLANE1_* or EGL_DMA_BUF_PLANE2_* >> attributes are specified. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT and the value specified for >> EGL_YUV_COLOR_SPACE_HINT_EXT is not EGL_ITU_REC601_EXT, >> EGL_ITU_REC709_EXT or EGL_ITU_REC2020_EXT, EGL_BAD_ATTRIBUTE is >> generated. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT and the value specified for >> EGL_SAMPLE_RANGE_HINT_EXT is not EGL_YUV_FULL_RANGE_EXT or >> EGL_YUV_NARROW_RANGE_EXT, EGL_BAD_ATTRIBUTE is generated. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT and the value specified for >> EGL_YUV_CHROMA_HORIZONTAL_SITING_HINT_EXT or >> EGL_YUV_CHROMA_VERTICAL_SITING_HINT_EXT is not >> EGL_YUV_CHROMA_SITING_0_EXT or EGL_YUV_CHROMA_SITING_0_5_EXT, >> EGL_BAD_ATTRIBUTE is generated. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT and one or more of the values >> specified for a plane's pitch or offset isn't supported by EGL, >> EGL_BAD_ACCESS is generated. >> >> * If <target> is EGL_LINUX_DMA_BUF_EXT and eglCreateImageKHR fails, >> EGL does not retain ownership of the file descriptor and it is the >> responsibility of the application to close it." >> >> >> Issues >> >> 1. Should this be a KHR or EXT extension? >> >> ANSWER: EXT. Khronos EGL working group not keen on this extension as it is >> seen as contradicting the EGLStream direction the specification is going in. >> The working group recommends creating additional specs to allow an EGLStream >> producer/consumer connected to v4l2/DRM or any other Linux interface. >> >> 2. Should this be a generic any platform extension, or a Linux-only >> extension which explicitly states the handles are dma_buf fds? >> >> ANSWER: There's currently no intention to port this extension to any OS not >> based on the Linux kernel. Consequently, this spec can be explicitly written >> against Linux and the dma_buf API. >> >> 3. Does ownership of the file descriptor pass to the EGL library? >> >> ANSWER: If eglCreateImageKHR is successful, EGL assumes ownership of the >> file descriptors and is responsible for closing them. >> >> 4. How are the different YUV color spaces handled (BT.709/BT.601)? >> >> ANSWER: The pixel formats defined in drm_fourcc.h only specify how the data >> is laid out in memory. It does not define how that data should be >> interpreted. Added a new EGL_YUV_COLOR_SPACE_HINT_EXT attribute to allow the >> application to specify which color space the data is in to allow the GL to >> choose an appropriate set of co-efficients if it needs to convert that data >> to RGB for example. >> >> 5. What chroma-siting is used for sub-sampled YUV formats? >> >> ANSWER: The chroma siting is not specified by either the v4l2 or DRM APIs. >> This is similar to the color-space issue (4) in that the chroma siting >> doesn't affect how the data is stored in memory. However, the GL will need >> to know the siting in order to filter the image correctly. While the visual >> impact of getting the siting wrong is minor, provision should be made to >> allow an application to specify the siting if desired. Added additional >> EGL_YUV_CHROMA_HORIZONTAL_SITING_HINT_EXT & >> EGL_YUV_CHROMA_VERTICAL_SITING_HINT_EXT attributes to allow the siting to >> be specified using a set of pre-defined values (0 or 0.5). >> >> 6. How can an application query which formats the EGL implementation >> supports? >> >> PROPOSAL: Don't provide a query mechanism but instead add an error condition >> that EGL_BAD_MATCH is raised if the EGL implementation doesn't support that >> particular format. >> >> 7. Which image formats should be supported and how is format specified? >> >> Seem to be two options 1) specify a new enum in this specification and >> enumerate all possible formats. 2) Use an existing enum already in Linux, >> either v4l2_mbus_pixelcode and/or those formats listed in drm_fourcc.h? >> >> ANSWER: Go for option 2) and just use values defined in drm_fourcc.h. >> >> 8. How can AYUV images be handled? >> >> ANSWER: At least on fourcc.org and in drm_fourcc.h, there only seems to be >> a single AYUV format and that is a packed format, so everything, including >> the alpha component would be in the first plane. >> >> 9. How can you import interlaced images? >> >> ANSWER: Interlaced frames are usually stored with the top & bottom fields >> interleaved in a single buffer. As the fields would need to be displayed as >> at different times, the application would create two EGLImages from the same >> buffer, one for the top field and another for the bottom. Both EGLImages >> would set the pitch to 2x the buffer width and the second EGLImage would use >> a suitable offset to indicate it started on the second line of the buffer. >> This should work regardless of whether the data is packed in a single plane, >> semi-planar or multi-planar. >> >> If each interlaced field is stored in a separate buffer then it should be >> trivial to create two EGLImages, one for each field's buffer. >> >> 10. How are semi-planar/planar formats handled that have a different >> width/height for Y' and CbCr such as YUV420? >> >> ANSWER: The spec says EGL_WIDTH & EGL_HEIGHT specify the *logical* width and >> height of the buffer in pixels. For pixel formats with sub-sampled Chroma >> values, it should be trivial for the EGL implementation to calculate the >> width/height of the Chroma sample buffers using the logical width & height >> and by inspecting the pixel format passed as the EGL_LINUX_DRM_FOURCC_EXT >> attribute. I.e. If the pixel format says it's YUV420, the Chroma buffer's >> width = EGL_WIDTH/2 & height =EGL_HEIGHT/2. >> >> 11. How are Bayer formats handled? >> >> ANSWER: As of Linux 2.6.34, drm_fourcc.h does not include any Bayer formats. >> However, future kernel versions may add such formats in which case they >> would be handled in the same way as any other format. >> >> 12. Should the spec support buffers which have samples in a "narrow range"? >> >> Content sampled from older analogue sources typically don't use the full >> (0-256) range of the data type storing the sample and instead use a narrow >> (16-235) range to allow some headroom & toeroom in the signals to avoid >> clipping signals which overshoot slightly during processing. This is >> sometimes known as signals using "studio swing". >> >> ANSWER: Add a new attribute to define if the samples use a narrow 16-235 >> range or the full 0-256 range. >> >> 13. Specifying the color space and range seems cumbersome, why not just >> allow the application to specify the full YUV->RGB color conversion matrix? >> >> ANSWER: Some hardware may not be able to use an arbitrary conversion matrix >> and needs to select an appropriate pre-defined matrix based on the color >> space and the sample range. >> >> 14. How do you handle EGL implementations which have restrictions on pitch >> and/or offset? >> >> ANSWER: Buffers being imported using dma_buf pretty much have to be >> allocated by a kernel-space driver. As such, it is expected that a system >> integrator would make sure all devices which allocate buffers suitable for >> exporting make sure they use a pitch supported by all possible importers. >> However, it is still possible eglCreateImageKHR can fail due to an >> unsupported pitch. Added a new error to the list indicating this. >> >> 15. Should this specification also describe how to export an existing >> EGLImage as a dma_buf file descriptor? >> >> ANSWER: No. Importing and exporting buffers are two separate operations and >> importing an existing dma_buf fd into an EGLImage is useful functionality in >> itself. Agree that exporting an EGLImage as a dma_buf fd is useful, E.g. it >> could be used by an OpenMAX IL implementation's OMX_UseEGLImage function to >> give access to the buffer backing an EGLImage to video hardware. However, >> exporting can be split into a separate extension specification. >> >> >> Revision History >> >> #4 (Tom Cooksey, October 04, 2012) >> - Fixed issue numbering! >> - Added issues 8 - 15. >> - Promoted proposal for Issue 3 to be the answer. >> - Added an additional attribute to allow an application to specify the color >> space as a hint which should address issue 4. >> - Added an additional attribute to allow an application to specify the chroma >> siting as a hint which should address issue 5. >> - Added an additional attribute to allow an application to specify the sample >> range as a hint which should address the new issue 12. >> - Added language to end of error section clarifying who owns the fd passed >> to eglCreateImageKHR if an error is generated. >> >> #3 (Tom Cooksey, August 16, 2012) >> - Changed name from EGL_EXT_image_external and re-written language to >> explicitly state this for use with Linux & dma_buf. >> - Added a list of issues, including some still open ones. >> >> #2 (Jesse Barker, May 30, 2012) >> - Revision to split eglCreateImageKHR functionality from export >> Functionality. >> - Update definition of EGLNativeBufferType to be a struct containing a list >> of handles to support multi-buffer/multi-planar formats. >> >> #1 (Jesse Barker, March 20, 2012) >> - Initial draft. >> >> >> >> >> _______________________________________________ >> mesa-dev mailing list >> mesa-dev(a)lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/mesa-dev > > > > > _______________________________________________ > mesa-dev mailing list > mesa-dev(a)lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev

8 years, 11 months

2
8
0 0

[PATCH] dma-buf: propagate errors from dma_buf_describe() on debugfs read

by Mathias Krause

The callback function dma_buf_describe() returns an int not void so the function pointer cast in dma_buf_show() is wrong. dma_buf_describe() can also fail when acquiring the mutex gets interrupted so always returning 0 in dma_buf_show() is wrong, too. Fix both issues by casting the function pointer to the correct type and propagate its return value. This type mismatch was caught by the PaX RAP plugin. Signed-off-by: Mathias Krause <minipli(a)googlemail.com> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: PaX Team <pageexec(a)freemail.hu> --- drivers/dma-buf/dma-buf.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index 6355ab38d630..0f2a4592fdd2 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -881,10 +881,9 @@ static int dma_buf_describe(struct seq_file *s) static int dma_buf_show(struct seq_file *s, void *unused) { - void (*func)(struct seq_file *) = s->private; + int (*func)(struct seq_file *) = s->private; - func(s); - return 0; + return func(s); } static int dma_buf_debug_open(struct inode *inode, struct file *file) -- 1.7.10.4

8 years, 11 months

2
2
0 0

[PATCH 0/5] Ion cleanup

by Laura Abbott

Hi, This is some clean up of old Ion interfaces and APIs. These are interfaces that mostly existed before dma_buf was well integrated into the kernel along with reservations for board files. If there are objections to deletion I expect it to turn into a discussion about what other APIs need to be extended. Thanks, Laura Laura Abbott (5): staging: android: ion: Get rid of ion_sg_table staging: android: ion: Drop ion_phys interface staging: android: ion: Get rid of map_dma/unmap_dma staging: android: ion: Drop ion_carveout_allocate definitions staging: android: ion: Get rid of ion_reserve drivers/staging/android/ion/ion.c | 103 ++---------------------- drivers/staging/android/ion/ion.h | 41 ---------- drivers/staging/android/ion/ion_carveout_heap.c | 33 +------- drivers/staging/android/ion/ion_chunk_heap.c | 17 +--- drivers/staging/android/ion/ion_cma_heap.c | 34 +------- drivers/staging/android/ion/ion_priv.h | 30 +------ drivers/staging/android/ion/ion_system_heap.c | 44 +--------- 7 files changed, 19 insertions(+), 283 deletions(-) -- 2.5.5

8 years, 11 months

1
5
0 0

Re: [Linaro-mm-sig] [RFC][PATCH 6/6] staging: android: ion: Introduce new ioctls for dynamic heaps

by Laura Abbott

On 06/08/2016 08:34 AM, Brian Starkey wrote: > Hi, > > I'm finding "usage_id" a bit confusing - there's not a very clear > distinction between usage_id and heap ID. > > For instance, ION_IOC_USAGE_CNT claims to return the number of usage > IDs, but seems to return the number of heaps (i.e. number heap IDs, some > of which might be usage_ids). > > Similarly, alloc2 claims to allocate by usage_id, but will just as > happily allocate by heap ID. > > Maybe this should just be described as a single heap ID namespace, where > some IDs represent groups of heap IDs. > For now I'm just going to focus on comments not about the heap ID mapping because I'm leaning towards dropping the heap ID mapping. > I've a few inline comments below. > > -Brian > > On Mon, Jun 06, 2016 at 11:23:33AM -0700, Laura Abbott wrote: >> From: Laura Abbott <labbott(a)fedoraproject.org> >> >> >> The Ion ABI for heaps is limiting to work with for more complex systems. >> Heaps have to be registered at boot time with known ids available to >> userspace. This becomes a tight ABI which is prone to breakage. >> >> Introduce a new mechanism for registering heap ids dynamically. A base >> set of heap ids are registered at boot time but there is no knowledge >> of fallbacks. Fallback information can be remapped and changed >> dynamically. Information about available heaps can also be queried with >> an ioctl to avoid the need to have heap ids be an ABI with userspace. >> >> Signed-off-by: Laura Abbott <labbott(a)redhat.com> >> --- >> drivers/staging/android/ion/ion-ioctl.c | 109 +++++++++++++++++-- >> drivers/staging/android/ion/ion.c | 184 ++++++++++++++++++++++++++++++-- >> drivers/staging/android/ion/ion_priv.h | 15 +++ >> drivers/staging/android/uapi/ion.h | 135 +++++++++++++++++++++++ >> 4 files changed, 426 insertions(+), 17 deletions(-) >> >> diff --git a/drivers/staging/android/ion/ion-ioctl.c b/drivers/staging/android/ion/ion-ioctl.c >> index 45b89e8..169cad8 100644 >> --- a/drivers/staging/android/ion/ion-ioctl.c >> +++ b/drivers/staging/android/ion/ion-ioctl.c >> @@ -22,6 +22,49 @@ >> #include "ion_priv.h" >> #include "compat_ion.h" >> >> +union ion_ioctl_arg { >> + struct ion_fd_data fd; >> + struct ion_allocation_data allocation; >> + struct ion_handle_data handle; >> + struct ion_custom_data custom; >> + struct ion_abi_version abi_version; >> + struct ion_new_alloc_data allocation2; >> + struct ion_usage_id_map id_map; >> + struct ion_usage_cnt usage_cnt; >> + struct ion_heap_query query; >> +}; >> + >> +static int validate_ioctl_arg(unsigned int cmd, union ion_ioctl_arg *arg) >> +{ >> + int ret = 0; >> + >> + switch (cmd) { >> + case ION_IOC_ABI_VERSION: >> + ret = arg->abi_version.reserved != 0; >> + break; >> + case ION_IOC_ALLOC2: >> + ret = arg->allocation2.reserved0 != 0; >> + ret |= arg->allocation2.reserved1 != 0; >> + ret |= arg->allocation2.reserved2 != 0; >> + break; >> + case ION_IOC_ID_MAP: >> + ret = arg->id_map.reserved0 != 0; >> + ret |= arg->id_map.reserved1 != 0; >> + break; >> + case ION_IOC_USAGE_CNT: >> + ret = arg->usage_cnt.reserved != 0; >> + break; >> + case ION_IOC_HEAP_QUERY: >> + ret = arg->query.reserved0 != 0; >> + ret |= arg->query.reserved1 != 0; >> + ret |= arg->query.reserved2 != 0; >> + break; >> + default: >> + break; >> + } >> + return ret ? -EINVAL : 0; >> +} >> + >> /* fix up the cases where the ioctl direction bits are incorrect */ >> static unsigned int ion_ioctl_dir(unsigned int cmd) >> { >> @@ -42,14 +85,7 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) >> struct ion_handle *cleanup_handle = NULL; >> int ret = 0; >> unsigned int dir; >> - >> - union { >> - struct ion_fd_data fd; >> - struct ion_allocation_data allocation; >> - struct ion_handle_data handle; >> - struct ion_custom_data custom; >> - struct ion_abi_version abi_version; >> - } data; >> + union ion_ioctl_arg data; >> >> dir = ion_ioctl_dir(cmd); >> >> @@ -60,7 +96,12 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) >> if (copy_from_user(&data, (void __user *)arg, _IOC_SIZE(cmd))) >> return -EFAULT; >> >> + ret = validate_ioctl_arg(cmd, &data); >> + if (ret) >> + return ret; >> + >> switch (cmd) { >> + /* Old ioctl */ >> case ION_IOC_ALLOC: >> { >> struct ion_handle *handle; >> @@ -77,6 +118,7 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) >> cleanup_handle = handle; >> break; >> } >> + /* Old ioctl */ >> case ION_IOC_FREE: >> { >> struct ion_handle *handle; >> @@ -92,6 +134,7 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) >> mutex_unlock(&client->lock); >> break; >> } >> + /* Old ioctl */ >> case ION_IOC_SHARE: >> case ION_IOC_MAP: >> { >> @@ -106,6 +149,7 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) >> ret = data.fd.fd; >> break; >> } >> + /* Old ioctl */ >> case ION_IOC_IMPORT: >> { >> struct ion_handle *handle; >> @@ -117,11 +161,13 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) >> data.handle.handle = handle->id; >> break; >> } >> + /* Old ioctl */ >> case ION_IOC_SYNC: >> { >> ret = ion_sync_for_device(client, data.fd.fd); >> break; >> } >> + /* Old ioctl */ >> case ION_IOC_CUSTOM: >> { >> if (!dev->custom_ioctl) >> @@ -135,6 +181,53 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) >> data.abi_version.abi_version = ION_ABI_VERSION; >> break; >> } >> + case ION_IOC_ALLOC2: >> + { >> + struct ion_handle *handle; >> + >> + handle = ion_alloc2(client, data.allocation2.len, >> + data.allocation2.align, >> + data.allocation2.usage_id, >> + data.allocation2.flags); >> + if (IS_ERR(handle)) >> + return PTR_ERR(handle); >> + >> + if (data.allocation2.flags & ION_FLAG_NO_HANDLE) { >> + data.allocation2.fd = ion_share_dma_buf_fd(client, >> + handle); >> + ion_handle_put(handle); >> + if (data.allocation2.fd < 0) >> + ret = data.allocation2.fd; >> + } else { >> + data.allocation2.handle = handle->id; >> + >> + cleanup_handle = handle; >> + } >> + break; >> + } >> + case ION_IOC_ID_MAP: >> + { >> + ret = ion_map_usage_ids(client, >> + (unsigned int __user *)data.id_map.usage_ids, >> + data.id_map.cnt); >> + if (ret > 0) >> + data.id_map.new_id = ret; >> + break; >> + } >> + case ION_IOC_USAGE_CNT: >> + { >> + down_read(&client->dev->lock); >> + data.usage_cnt.cnt = client->dev->heap_cnt; >> + up_read(&client->dev->lock); >> + break; >> + } >> + case ION_IOC_HEAP_QUERY: >> + { >> + ret = ion_query_heaps(client, >> + (struct ion_heap_data __user *)data.query.heaps, >> + data.query.cnt); >> + break; >> + } >> default: >> return -ENOTTY; >> } >> diff --git a/drivers/staging/android/ion/ion.c b/drivers/staging/android/ion/ion.c >> index 129707f..c096cb9 100644 >> --- a/drivers/staging/android/ion/ion.c >> +++ b/drivers/staging/android/ion/ion.c >> @@ -459,6 +459,48 @@ static struct ion_handle *__ion_alloc(struct ion_client *client, size_t len, >> return handle; >> } >> >> +struct ion_handle *ion_alloc2(struct ion_client *client, size_t len, >> + size_t align, unsigned int usage_id, >> + unsigned int flags) >> +{ >> + struct ion_device *dev = client->dev; >> + struct ion_heap *heap; >> + struct ion_handle *handle = ERR_PTR(-ENODEV); >> + >> + down_read(&dev->lock); >> + heap = idr_find(&dev->idr, usage_id); >> + if (!heap) { >> + handle = ERR_PTR(-EINVAL); >> + goto out; >> + } >> + >> + if (heap->type == ION_USAGE_ID_MAP) { >> + int i; >> + >> + for (i = 0; i < heap->fallback_cnt; i++){ >> + heap = idr_find(&dev->idr, heap->fallbacks[i]); >> + if (!heap) >> + continue; >> + >> + /* Don't recurse for now? */ >> + if (heap->type == ION_USAGE_ID_MAP) >> + continue; >> + >> + handle = __ion_alloc(client, len, align, heap, flags); >> + if (IS_ERR(handle)) >> + continue; >> + else >> + break; >> + } >> + } else { >> + handle = __ion_alloc(client, len, align, heap, flags); >> + } >> +out: >> + up_read(&dev->lock); >> + return handle; >> +} >> +EXPORT_SYMBOL(ion_alloc2); >> + >> struct ion_handle *ion_alloc(struct ion_client *client, size_t len, >> size_t align, unsigned int heap_mask, >> unsigned int flags) >> @@ -1243,6 +1285,55 @@ int ion_sync_for_device(struct ion_client *client, int fd) >> return 0; >> } >> >> +struct ion_query_data { >> + struct ion_heap_data __user *buffer; >> + int cnt; >> + int max_cnt; >> +}; >> + >> +int __ion_query(int id, void *p, void *data) >> +{ >> + struct ion_heap *heap = p; >> + struct ion_query_data *query = data; >> + struct ion_heap_data hdata = {0}; >> + >> + if (query->cnt >= query->max_cnt) >> + return -ENOSPC; >> + >> + strncpy(hdata.name, heap->name, 20); > > Why 20? > Arbitrary limit for a fixed size buffer. As noted below I need to make this a consistent #define. >> + hdata.name[sizeof(hdata.name) - 1] = '\0'; >> + hdata.type = heap->type; >> + hdata.usage_id = heap->id; >> + >> + return copy_to_user(&query->buffer[query->cnt++], &hdata, sizeof(hdata)); >> +} >> + >> +int ion_query_heaps(struct ion_client *client, >> + struct ion_heap_data __user *buffer, >> + int cnt) >> +{ >> + struct ion_device *dev = client->dev; >> + struct ion_query_data data; >> + int ret; >> + >> + data.buffer = buffer; >> + data.cnt = 0; >> + data.max_cnt = cnt; >> + >> + down_read(&dev->lock); >> + if (data.max_cnt < 0 || data.max_cnt > dev->heap_cnt) { > > Is the check against heap_cnt necessary? You could update the cnt > field in ion_heap_query to say how many were actually copied. > This was mostly a paranoid check to reduce risk of accidentally giving userspace access to something it shouldn't. Updating the count is still a good idea in case userspace wants fewer than are available. > I think you could probably drop ION_IOC_USAGE_COUNT by giving > ION_IOC_HEAP_QUERY similar semantics to the DRM ioctls: > - First call with buffer pointer = NULL, kernel sets cnt to space > required > - Userspace allocates buffer and calls the ioctl again, kernel fills > the buffer > I'm not that familiar with the DRM ioctls but this sounds like a good suggestion. One less ioctl to worry about. >> + ret = -EINVAL; >> + goto out; >> + } >> + ret = idr_for_each(&dev->idr, __ion_query, &data); >> +out: >> + up_read(&dev->lock); >> + >> + return ret; >> +} >> + >> + >> + >> static int ion_release(struct inode *inode, struct file *file) >> { >> struct ion_client *client = file->private_data; >> @@ -1407,13 +1498,69 @@ static int debug_shrink_get(void *data, u64 *val) >> DEFINE_SIMPLE_ATTRIBUTE(debug_shrink_fops, debug_shrink_get, >> debug_shrink_set, "%llu\n"); >> >> +int ion_map_usage_ids(struct ion_client *client, >> + unsigned int __user *usage_ids, >> + int cnt) >> +{ >> + struct ion_heap *heap = kzalloc(sizeof(*heap), GFP_KERNEL); >> + unsigned int *fallbacks; >> + int i; >> + int ret; >> + >> + if (!heap) >> + return -ENOMEM; >> + >> + fallbacks = kzalloc(sizeof(unsigned int)*cnt, GFP_KERNEL); >> + if (!fallbacks) { >> + ret = -ENOMEM; >> + goto out1; >> + } >> + >> + ret = copy_from_user(fallbacks, usage_ids, sizeof(unsigned int)*cnt); >> + if (ret) >> + goto out2; >> + >> + down_read(&client->dev->lock); >> + for (i = 0; i < cnt; i++) { >> + if (idr_find(&client->dev->idr, fallbacks[i]) == NULL) { >> + ret = -EINVAL; >> + goto out3; >> + } >> + } >> + up_read(&client->dev->lock); >> + >> + /* >> + * This is a racy check since the lock is dropped before the heap >> + * is actually added. It's okay though because ids are never actually >> + * deleted. Worst case some user gets an error back and an indication >> + * to fix races in their code. >> + */ >> + >> + heap->fallbacks = fallbacks; >> + heap->fallback_cnt = cnt; >> + heap->type = ION_USAGE_ID_MAP; >> + heap->id = ION_DYNAMIC_HEAP_ASSIGN; > > It would be nice for userspace to be able to give these usage heaps > meaningful names - That could be their intended usage ("camera", > "display") or their properties ("contiguous", "sram"). > >> + ion_device_add_heap(client->dev, heap); >> + return heap->id; >> +out3: >> + up_read(&client->dev->lock); >> +out2: >> + kfree(fallbacks); >> +out1: >> + kfree(heap); >> + return ret; >> +} >> + >> int ion_device_add_heap(struct ion_device *dev, struct ion_heap *heap) >> { >> struct dentry *debug_file; >> int ret; >> >> - if (!heap->ops->allocate || !heap->ops->free || !heap->ops->map_dma || >> - !heap->ops->unmap_dma) { >> + if (heap->type != ION_USAGE_ID_MAP && >> + (!heap->ops->allocate || >> + !heap->ops->free || >> + !heap->ops->map_dma || >> + !heap->ops->unmap_dma)) { >> pr_err("%s: can not add heap with invalid ops struct.\n", >> __func__); >> return -EINVAL; >> @@ -1425,18 +1572,36 @@ int ion_device_add_heap(struct ion_device *dev, struct ion_heap *heap) >> if (heap->flags & ION_HEAP_FLAG_DEFER_FREE) >> ion_heap_init_deferred_free(heap); >> >> - if ((heap->flags & ION_HEAP_FLAG_DEFER_FREE) || heap->ops->shrink) >> + if ((heap->flags & ION_HEAP_FLAG_DEFER_FREE) || (heap->ops && heap->ops->shrink)) >> ion_heap_init_shrinker(heap); >> >> heap->dev = dev; >> down_write(&dev->lock); >> >> - ret = idr_alloc(&dev->idr, heap, heap->id, heap->id + 1, GFP_KERNEL); >> - if (ret < 0 || ret != heap->id) { >> - pr_info("%s: Failed to add heap id, expected %d got %d\n", >> - __func__, heap->id, ret); >> - up_write(&dev->lock); >> - return ret < 0 ? ret : -EINVAL; >> + if (heap->id == ION_DYNAMIC_HEAP_ASSIGN) { >> + ret = idr_alloc(&dev->idr, heap, >> + ION_DYNAMIC_HEAP_ASSIGN + 1, 0, GFP_KERNEL); >> + if (ret < 0) >> + goto out_unlock; >> + >> + heap->id = ret; >> + } else { >> + ret = idr_alloc(&dev->idr, heap, heap->id, heap->id + 1, >> + GFP_KERNEL); >> + if (ret < 0 || ret != heap->id) { >> + pr_info("%s: Failed to add heap id, expected %d got %d\n", >> + __func__, heap->id, ret); >> + ret = ret < 0 ? ret : -EINVAL; >> + goto out_unlock; >> + } >> + } >> + >> + if (!heap->name) { >> + heap->name = kasprintf(GFP_KERNEL, "heap%d", heap->id); >> + if (!heap->name) { >> + ret = -ENOMEM; >> + goto out_unlock; >> + } >> } >> >> debug_file = debugfs_create_file(heap->name, 0664, >> @@ -1467,6 +1632,7 @@ int ion_device_add_heap(struct ion_device *dev, struct ion_heap *heap) >> } >> } >> dev->heap_cnt++; >> +out_unlock: >> up_write(&dev->lock); >> return 0; >> } >> diff --git a/drivers/staging/android/ion/ion_priv.h b/drivers/staging/android/ion/ion_priv.h >> index b09d751..e03e940 100644 >> --- a/drivers/staging/android/ion/ion_priv.h >> +++ b/drivers/staging/android/ion/ion_priv.h >> @@ -255,6 +255,9 @@ struct ion_heap { >> wait_queue_head_t waitqueue; >> struct task_struct *task; >> >> + unsigned int *fallbacks; >> + int fallback_cnt; >> + >> int (*debug_show)(struct ion_heap *heap, struct seq_file *, void *); >> }; >> >> @@ -381,6 +384,10 @@ size_t ion_heap_freelist_shrink(struct ion_heap *heap, >> size_t ion_heap_freelist_size(struct ion_heap *heap); >> >> >> +int ion_map_usage_ids(struct ion_client *client, >> + unsigned int __user *usage_ids, >> + int cnt); >> + >> /** >> * functions for creating and destroying the built in ion heaps. >> * architectures can add their own custom architecture specific >> @@ -495,4 +502,12 @@ struct ion_handle *ion_handle_get_by_id(struct ion_client *client, >> >> int ion_handle_put(struct ion_handle *handle); >> >> +struct ion_handle *ion_alloc2(struct ion_client *client, size_t len, >> + size_t align, unsigned int usage_id, >> + unsigned int flags); >> + >> +int ion_query_heaps(struct ion_client *client, >> + struct ion_heap_data __user *buffer, >> + int cnt); >> + >> #endif /* _ION_PRIV_H */ >> diff --git a/drivers/staging/android/uapi/ion.h b/drivers/staging/android/uapi/ion.h >> index 145005f..d36b4e4 100644 >> --- a/drivers/staging/android/uapi/ion.h >> +++ b/drivers/staging/android/uapi/ion.h >> @@ -45,10 +45,17 @@ enum ion_heap_type { >> * must be last so device specific heaps always >> * are at the end of this enum >> */ >> + ION_USAGE_ID_MAP, > > A short description for this would be nice > >> }; >> >> #define ION_NUM_HEAP_IDS (sizeof(unsigned int) * 8) >> >> +/* >> + * This isn't completely random. The old Ion heap ID namespace goes up to >> + * 32 bits so take the first one after that to use as a dynamic setting >> + */ >> +#define ION_DYNAMIC_HEAP_ASSIGN 33 >> + > > The old comment says 32, but the implementation looks like 16. > > Either way, shouldn't that be 32? If the previous max was 31, > 32 is next available - but in ion_device_add_heap() you use > ION_DYNAMIC_HEAP_ASSIGN + 1, which makes the first dynamically-assigned > ID 34. > >> /** >> * allocation flags - the lower 16 bits are used by core ion, the upper 16 >> * bits are reserved for use by the heaps themselves. >> @@ -65,6 +72,11 @@ enum ion_heap_type { >> * caches must be managed >> * manually >> */ >> +#define ION_FLAG_NO_HANDLE 3 /* >> + * Return only an fd associated with >> + * this buffer and not a handle >> + */ >> + >> >> /** >> * DOC: Ion Userspace API >> @@ -142,6 +154,96 @@ struct ion_abi_version { >> __u32 reserved; >> }; >> >> +/** >> + * struct ion_new_alloc_data - metadata to/from usersapce allocation v2 >> + * @len: size of the allocation >> + * @align: required alignment of the allocation >> + * @usage_id: mapping to heap id to allocate. Will try fallbacks >> + * if specified in the heap mapping >> + * @flags: flags passed to heap >> + * @handle: pointer that will be populated with a cookie to use to >> + * refer to this allocation >> + * @fd: optionally, may return just an fd with no handle >> + * reference >> + */ >> +struct ion_new_alloc_data { >> + __u64 len; >> + __u64 align; >> + __u32 usage_id; >> + __u32 flags; >> + /* >> + * I'd like to add a flag to just return the fd instead of just >> + * a handle for those who want to skip the next step. >> + */ >> + union { >> + __u32 fd; >> + __u32 handle; >> + }; >> + /* >> + * Allocation has a definite problem of 'creep' so give more than >> + * enough extra bits for expansion >> + */ >> + __u32 reserved0; >> + __u32 reserved1; >> + __u32 reserved2; >> +}; >> + >> +/** >> + * struct ion_usage_id_map - metadata to create a new usage map >> + * @usage_id - userspace allocated array of existing usage ids >> + * @cnt - number of ids to be mapped >> + * @new_id - will be populated with the new usage id >> + */ >> +struct ion_usage_id_map { >> + /* Array of usage ids provided by user */ >> + __u64 usage_ids; >> + __u32 cnt; >> + >> + /* Returned on success */ >> + __u32 new_id; >> + /* Fields for future growth */ >> + __u32 reserved0; >> + __u32 reserved1; >> +}; >> + >> +/** >> + * struct ion_usage_cnt - meta data for the count of heaps >> + * @cnt - returned count of number of heaps present >> + */ >> +struct ion_usage_cnt { >> + __u32 cnt; /* cnt returned */ >> + __u32 reserved; >> +}; >> + >> +/** >> + * struct ion_heap_data - data about a heap >> + * @name - first 32 characters of the heap name >> + * @type - heap type >> + * @usage_id - usage id for the heap >> + */ >> +struct ion_heap_data { >> + char name[32]; I realized I upped this to 32 and didn't update the code. I'm going to make this consistent. >> + __u32 type; >> + __u32 usage_id; > > For heaps with type ION_USAGE_ID_MAP I think userspace would want a way > to turn a usage_id back into a list of fallbacks to figure out that > usage_id == 34 means "only contiguous buffers" for instance. > Otherwise only the process that made the mapping can ever know what its > for. > >> + __u32 reserved0; >> + __u32 reserved1; >> + __u32 reserved2; >> +}; >> + >> +/** >> + * struct ion_heap_query - collection of data about all heaps >> + * @cnt - total number of heaps to be copied >> + * @heaps - buffer to copy heap data >> + */ >> +struct ion_heap_query { >> + __u32 cnt; /* Total number of heaps to be copied */ >> + __u64 heaps; /* buffer to be populated */ > > I guess this field needs explicit alignment to 64 bits > Yes, I was going by the suggestion in botching-up-ioctls.txt https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Docume… >> + __u32 reserved0; >> + __u32 reserved1; >> + __u32 reserved2; >> +}; >> + >> + >> #define ION_IOC_MAGIC 'I' >> >> /** >> @@ -216,5 +318,38 @@ struct ion_abi_version { >> #define ION_IOC_ABI_VERSION _IOR(ION_IOC_MAGIC, 8, \ >> struct ion_abi_version) >> >> +/** >> + * DOC: ION_IOC_ALLOC2 - allocate memory via new API >> + * >> + * Same concept as ION_IOC_ALLOC except with updated ABI. Can return an fd >> + * directly in addition to a handle >> + */ >> +#define ION_IOC_ALLOC2 _IOWR(ION_IOC_MAGIC, 9, \ >> + struct ion_new_alloc_data) >> + >> +/** >> + * DOC: ION_IOC_ID_MAP - remap an array of heap IDs >> + * >> + * Takes an ion_usage_id_map structure populated with information about >> + * fallback information. Returns a new usage id for use in allocation. > > Can you mention the implied priority of the fallbacks here? > >> + */ >> +#define ION_IOC_ID_MAP _IOWR(ION_IOC_MAGIC, 10, \ >> + struct ion_usage_id_map) >> +/** >> + * DOC: ION_IOC_USAGE_CNT - returns a count of the number of usage ids >> + * >> + * Takes an ion_usage_cnt structure and returns the total number of usage >> + * ids available. > > Number of usage IDs or number of heaps? > >> + */ >> +#define ION_IOC_USAGE_CNT _IOR(ION_IOC_MAGIC, 11, \ >> + struct ion_usage_cnt) >> +/** >> + * DOC: ION_IOC_HEAP_QUERY - information about available heaps >> + * >> + * Takes an ion_heap_query structure and populates information about >> + * availble Ion heaps. >> + */ >> +#define ION_IOC_HEAP_QUERY _IOWR(ION_IOC_MAGIC, 12, \ >> + struct ion_heap_query) >> >> #endif /* _UAPI_LINUX_ION_H */ >> -- >> 2.5.5 >>

8 years, 12 months

2
1
0 0

Re: [Linaro-mm-sig] [RFC][PATCH 0/6] ion: improved ABI

by Laura Abbott

On 06/08/2016 08:15 AM, Brian Starkey wrote: > Hi Laura, > > On Mon, Jun 06, 2016 at 11:23:27AM -0700, Laura Abbott wrote: >> The ABI for Ion's ioctl interface are a pain to work with. The heap IDs >> are a 32-bit non-discoverable namespace that form part of the ABI. There's >> no way to determine what ABI version is in use which leads to problems >> if the ABI changes or needs to be updated. >> >> This series is a first approach to give a better ABI for Ion. This includes: >> >> - Following the advice in botching-up-ioctls.txt >> - Ioctl for ABI version >> - Dynamic assignment of heap ids >> - queryable heap ids >> - Runtime mapping of heap ids, including fallbacks. This avoids the need to >> encode the fallbacks as an ABI. >> >> I'm most interested in feedback if this ABI is actually an improvement and >> usable. The heap id map/query interface seems error prone but I didn't have >> a cleaner solution. There aren't any kernel APIs for the new features as the >> focus was on a userspace API but I anticipate that following easily once >> the userspace API is established. >> > > If I understand it right, the big improvement here is that userspace can > find out what heap IDs are available, and what type of heap they > correspond to? This seems good. > > I'm not sure about how userspace is meant to use the usage mappings > though. Who calls ION_IOC_ID_MAP? > The thought was daemons (surfaceflinger, mediaserver etc.) would set this up. > (also, map/mapping is pretty overloaded. How about groups/groupings?) > That's a good suggestion. > If I assume that the thing calling ION_IOC_ID_MAP is the same thing > doing the allocating, then there doesn't seem to be much need for > creating mappings. The combined mapper/allocator would necessarily need > some knowledge about which types can satisfy which usage, and so could > follow something like this: > 1. The heaps can be queried, finding their IDs and types > 2. A mask of heap IDs can be created which satisfies a "usage", based > on the queried types > 3. Allocation operations can then simply use this constructed mask > > On the other hand, if I assume that the thing doing the allocating is > different to the thing doing the usage mapping (i.e. the allocator > doesn't need to know about heap _types_, only usages); then I can't see > a way for the allocator to figure out which usage_id it's meant to > allocate with - which puts it right back to the old problem of opaque > heap IDs (-> opaque usage_ids), except it's worse because they can > change dynamically. > I see your point about the mapping. My thought was that whoever was doing the mapping would have a way to pass information to the allocator or the allocator could do a query. Relying on the passing of information may not be plausible and I realize there isn't enough information from a query to determine what usage id to use. I like the suggestion of just using the query. One of the goals I initially had with this series was to get rid of the heap mask. The 32-bit heap mask became a name space that needed to be controlled across all targets and the fallbacks were difficult to change. The problem that actually wants to be solved is giving userspace enough information to determine what heap masks to allocate from. Just a query ioctl should be able to give that information as long as the requirement is that userspace clients match on the heap name + type only and not rely on the heap ids being constant (I don't think I made that clear with this version of the query ioctl so I'll make sure to clarify). The platform registration can adjust the priority order of the heap ids as necessary. Different names should be able to take care of any changes to the platform configuration. I'll think about this more when I work on v2. Thanks, Laura > Thanks, > Brian > >> >> Thanks, >> Laura >> >> P.S. Not to turn this into a bike shedding session but if you have suggestions >> for a name for this framework other than Ion I would be interested to hear >> them. Too many other things are already named Ion. >> >> Laura Abbott (6): >> staging: android: ion: return error value for ion_device_add_heap >> staging: android: ion: Switch to using an idr to manage heaps >> staging: android: ion: Drop heap type masks >> staging: android: ion: Pull out ion ioctls to a separate file >> staging: android: ion: Add an ioctl for ABI checking >> staging: android: ion: Introduce new ioctls for dynamic heaps >> >> drivers/staging/android/ion/Makefile | 3 +- >> drivers/staging/android/ion/ion-ioctl.c | 243 ++++++++++++++++++ >> drivers/staging/android/ion/ion.c | 438 ++++++++++++++++---------------- >> drivers/staging/android/ion/ion_priv.h | 109 +++++++- >> drivers/staging/android/uapi/ion.h | 164 +++++++++++- >> 5 files changed, 728 insertions(+), 229 deletions(-) >> create mode 100644 drivers/staging/android/ion/ion-ioctl.c >> >> -- 2.5.5

8 years, 12 months

1
0
0 0

[RFC][PATCH 0/6] ion: improved ABI

by Laura Abbott

The ABI for Ion's ioctl interface are a pain to work with. The heap IDs are a 32-bit non-discoverable namespace that form part of the ABI. There's no way to determine what ABI version is in use which leads to problems if the ABI changes or needs to be updated. This series is a first approach to give a better ABI for Ion. This includes: - Following the advice in botching-up-ioctls.txt - Ioctl for ABI version - Dynamic assignment of heap ids - queryable heap ids - Runtime mapping of heap ids, including fallbacks. This avoids the need to encode the fallbacks as an ABI. I'm most interested in feedback if this ABI is actually an improvement and usable. The heap id map/query interface seems error prone but I didn't have a cleaner solution. There aren't any kernel APIs for the new features as the focus was on a userspace API but I anticipate that following easily once the userspace API is established. Thanks, Laura P.S. Not to turn this into a bike shedding session but if you have suggestions for a name for this framework other than Ion I would be interested to hear them. Too many other things are already named Ion. Laura Abbott (6): staging: android: ion: return error value for ion_device_add_heap staging: android: ion: Switch to using an idr to manage heaps staging: android: ion: Drop heap type masks staging: android: ion: Pull out ion ioctls to a separate file staging: android: ion: Add an ioctl for ABI checking staging: android: ion: Introduce new ioctls for dynamic heaps drivers/staging/android/ion/Makefile | 3 +- drivers/staging/android/ion/ion-ioctl.c | 243 ++++++++++++++++++ drivers/staging/android/ion/ion.c | 438 ++++++++++++++++---------------- drivers/staging/android/ion/ion_priv.h | 109 +++++++- drivers/staging/android/uapi/ion.h | 164 +++++++++++- 5 files changed, 728 insertions(+), 229 deletions(-) create mode 100644 drivers/staging/android/ion/ion-ioctl.c -- 2.5.5

8 years, 12 months

2
11
0 0

Re: [Linaro-mm-sig] [RFC][PATCH 0/6] ion: improved ABI

by Laura Abbott

On 06/06/2016 11:59 PM, Chen Feng wrote: > The idea is good, define the heap ids in header file is inconvenient. > > But if we query the heaps information from user-space. > > It need to maintain this ids and name userspace one by one. The code may > be complicated in different module user-space. > > In android, the gralloc and other lib will all use ion to alloc memory. > > This will make it more difficult to maintain user-space code. > This was a concern I had had as well. Anything that involves dynamic probing is going to involve more tracking. Do you think some library code in libion would help? Thanks, Laura > > But beyond this, The new alloc2 with not-handle flag is good. > And the pull out of ioctl interface is also a good cleanup. > > On 2016/6/7 2:23, Laura Abbott wrote: >> >> The ABI for Ion's ioctl interface are a pain to work with. The heap IDs >> are a 32-bit non-discoverable namespace that form part of the ABI. There's >> no way to determine what ABI version is in use which leads to problems >> if the ABI changes or needs to be updated. >> >> This series is a first approach to give a better ABI for Ion. This includes: >> >> - Following the advice in botching-up-ioctls.txt >> - Ioctl for ABI version >> - Dynamic assignment of heap ids >> - queryable heap ids >> - Runtime mapping of heap ids, including fallbacks. This avoids the need to >> encode the fallbacks as an ABI. >> >> I'm most interested in feedback if this ABI is actually an improvement and >> usable. The heap id map/query interface seems error prone but I didn't have >> a cleaner solution. There aren't any kernel APIs for the new features as the >> focus was on a userspace API but I anticipate that following easily once >> the userspace API is established. >> >> >> Thanks, >> Laura >> >> P.S. Not to turn this into a bike shedding session but if you have suggestions >> for a name for this framework other than Ion I would be interested to hear >> them. Too many other things are already named Ion. >> >> Laura Abbott (6): >> staging: android: ion: return error value for ion_device_add_heap >> staging: android: ion: Switch to using an idr to manage heaps >> staging: android: ion: Drop heap type masks >> staging: android: ion: Pull out ion ioctls to a separate file >> staging: android: ion: Add an ioctl for ABI checking >> staging: android: ion: Introduce new ioctls for dynamic heaps >> >> drivers/staging/android/ion/Makefile | 3 +- >> drivers/staging/android/ion/ion-ioctl.c | 243 ++++++++++++++++++ >> drivers/staging/android/ion/ion.c | 438 ++++++++++++++++---------------- >> drivers/staging/android/ion/ion_priv.h | 109 +++++++- >> drivers/staging/android/uapi/ion.h | 164 +++++++++++- >> 5 files changed, 728 insertions(+), 229 deletions(-) >> create mode 100644 drivers/staging/android/ion/ion-ioctl.c >> >

8 years, 12 months

1
0
0 0

[RFC][PATCH 0/3] Clean up Ion mapping/caching

by Laura Abbott

Hi, This series cleans up Ion a bit to be more in line with existing standards for caching and dma mapping. The most controversial part of this is probably going to be the first patch. Ion takes quite a few liberties with how the DMA APIs are used for cache syncing. dma_sync_sg is used without calling dma_map first. There isn't a good way to get the cache synchronization with the DMA APIs. The behavior of Ion is closer to the DRM framework which uses its own private cache APIs for synchronization so I took that approach. Assuming the approach of the first patch is appropriate, the next two patches are fairly simple. dma_buf added support for a sync ioctl. Ion has a similar ioctl already so this fixes the Ion APIs to be compatible with the dma_buf ioctl. My plan would be to put a timeline on deprecation for the old Ion sync ioctl. The map_dma_buf calls were also missing calls to the underlying DMA APIs so the final patch in the series adds the appropriate calls. Feedback is appreciated. Thanks, Laura Laura Abbott (3): staging: ion: Move away from the DMA APIs for cache flushing staging: ion: Add support for syncing with DMA_BUF_IOCTL_SYNC staging: ion: Add dma_map/dma_unmap calls to dma_buf calls drivers/staging/android/ion/Kconfig | 14 ++++- drivers/staging/android/ion/Makefile | 3 + drivers/staging/android/ion/ion-arm.c | 83 ++++++++++++++++++++++++ drivers/staging/android/ion/ion-arm64.c | 46 ++++++++++++++ drivers/staging/android/ion/ion-x86.c | 34 ++++++++++ drivers/staging/android/ion/ion.c | 84 +++++++++++++------------ drivers/staging/android/ion/ion_carveout_heap.c | 5 +- drivers/staging/android/ion/ion_chunk_heap.c | 7 +-- drivers/staging/android/ion/ion_page_pool.c | 3 +- drivers/staging/android/ion/ion_priv.h | 14 ++--- drivers/staging/android/ion/ion_system_heap.c | 5 +- 11 files changed, 235 insertions(+), 63 deletions(-) create mode 100644 drivers/staging/android/ion/ion-arm.c create mode 100644 drivers/staging/android/ion/ion-arm64.c create mode 100644 drivers/staging/android/ion/ion-x86.c -- 2.5.5

9 years

5
7
0 0

[GIT PULL]: minor dma-buf updates for 4.7

by Sumit Semwal

Hi Linus, A tiny pull request with mostly cosmetic changes in dma-buf for 4.7; may I request you to please pull? The following changes since commit 852f42a69b93dc71507adedeed876d57b8c2c2fa: Merge branch 'uuid' (lib/uuid fixes from Andy) (2016-05-30 15:27:07 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/sumits/dma-buf.git tags/dma-buf-for-4.7 for you to fetch changes up to b02da6f8236148009c22167cd7013d5ce04a2d37: dma-buf: use vma_pages() (2016-05-31 22:17:05 +0530) ---------------------------------------------------------------- Minor dma-buf updates for 4.7: - use of vma_pages instead of explicit computation. - DocBook and headerdoc updates for dma-buf. ---------------------------------------------------------------- Luis de Bethencourt (1): fence: add missing descriptions for fence Muhammad Falak R Wani (1): dma-buf: use vma_pages() Rob Clark (3): dma-buf: headerdoc fixes reservation: add headerdoc comments doc: update/fixup dma-buf related DocBook Documentation/DocBook/device-drivers.tmpl | 36 ++++++++++++++-- drivers/dma-buf/dma-buf.c | 7 +-- drivers/dma-buf/reservation.c | 72 +++++++++++++++++++++++++++++-- include/linux/dma-buf.h | 13 ++++-- include/linux/fence.h | 2 + include/linux/reservation.h | 53 +++++++++++++++++++++++ 6 files changed, 169 insertions(+), 14 deletions(-) Thanks and best regards, Sumit.

9 years

1
0
0 0

[PATCH v3 0/4] Generic zpos property

by Benjamin Gaignard

version 3: use kmalloc_array instead of kmalloc. Correct normalize_zpos computation (comeback to Mareck original code) version 2: add a zpos property into drm_plane structure to simplify code. This allow to get/set zpos value in core and not in drivers code. Fix various remarks. version 1: refactor Marek's patches to have per plane zpos property instead of only one in core. Benjamin Gaignard (2): drm: sti: use generic zpos for plane drm: rcar: use generic code for managing zpos plane property Marek Szyprowski (2): drm: add generic zpos property drm/exynos: use generic code for managing zpos plane property Documentation/DocBook/gpu.tmpl | 10 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_atomic.c | 4 + drivers/gpu/drm/drm_atomic_helper.c | 6 + drivers/gpu/drm/drm_blend.c | 226 ++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_crtc_internal.h | 3 + drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 - drivers/gpu/drm/exynos/exynos_drm_plane.c | 67 ++------- drivers/gpu/drm/exynos/exynos_mixer.c | 6 +- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 - drivers/gpu/drm/rcar-du/rcar_du_kms.c | 5 - drivers/gpu/drm/rcar-du/rcar_du_plane.c | 9 +- drivers/gpu/drm/rcar-du/rcar_du_plane.h | 2 - drivers/gpu/drm/sti/sti_mixer.c | 9 +- drivers/gpu/drm/sti/sti_plane.c | 80 ++++------- drivers/gpu/drm/sti/sti_plane.h | 2 - include/drm/drm_crtc.h | 28 ++++ 18 files changed, 325 insertions(+), 139 deletions(-) create mode 100644 drivers/gpu/drm/drm_blend.c Cc: Inki Dae <inki.dae(a)samsung.com> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Ville Syrjala <ville.syrjala(a)linux.intel.com> Cc: Joonyoung Shim <jy0922.shim(a)samsung.com> Cc: Seung-Woo Kim <sw0312.kim(a)samsung.com> Cc: Andrzej Hajda <a.hajda(a)samsung.com> Cc: Krzysztof Kozlowski <k.kozlowski(a)samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie(a)samsung.com> Cc: Tobias Jakobi <tjakobi(a)math.uni-bielefeld.de> Cc: Gustavo Padovan <gustavo(a)padovan.org> Cc: vincent.abriou(a)st.com Cc: fabien.dessenne(a)st.com Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> -- 1.9.1

9 years

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[PATCH 1/4] drm: add generic zpos property

by Benjamin Gaignard

From: Marek Szyprowski <m.szyprowski(a)samsung.com> This patch adds support for generic plane's zpos property property with well-defined semantics: - added zpos properties to plane and plane state structures - added helpers for normalizing zpos properties of given set of planes - well defined semantics: planes are sorted by zpos values and then plane id value if zpos equals Normalized zpos values are calculated automatically when generic muttable zpos property has been initialized. Drivers can simply use plane_state->normalized_zpos in their atomic_check and/or plane_update callbacks without any additional calls to DRM core. Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> Compare to Marek's original patch zpos property is now specific to each plane and no more to the core. Normalize function take care of the range of per plane defined range before set normalized_zpos. Signed-off-by: Benjamin Gaignard <benjamin.gaignard(a)linaro.org> Cc: Inki Dae <inki.dae(a)samsung.com> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Ville Syrjala <ville.syrjala(a)linux.intel.com> Cc: Joonyoung Shim <jy0922.shim(a)samsung.com> Cc: Seung-Woo Kim <sw0312.kim(a)samsung.com> Cc: Andrzej Hajda <a.hajda(a)samsung.com> Cc: Krzysztof Kozlowski <k.kozlowski(a)samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie(a)samsung.com> Cc: Tobias Jakobi <tjakobi(a)math.uni-bielefeld.de> Cc: Gustavo Padovan <gustavo(a)padovan.org> Cc: vincent.abriou(a)st.com Cc: fabien.dessenne(a)st.com Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> --- Documentation/DocBook/gpu.tmpl | 10 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_atomic.c | 4 + drivers/gpu/drm/drm_atomic_helper.c | 6 + drivers/gpu/drm/drm_blend.c | 229 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_crtc_internal.h | 3 + include/drm/drm_crtc.h | 28 +++++ 7 files changed, 281 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/drm_blend.c diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl index 9dd48f7..0df6abb 100644 --- a/Documentation/DocBook/gpu.tmpl +++ b/Documentation/DocBook/gpu.tmpl @@ -2151,6 +2151,16 @@ void intel_crt_init(struct drm_device *dev) the underlying hardware).</td> </tr> <tr> + <td valign="top" > "zpos" </td> + <td valign="top" >RANGE</td> + <td valign="top" >Min= driver dependent, Max= driver dependent</td> + <td valign="top" >Plane</td> + <td valign="top" >Plane's 'z' position during blending operation (0 for background, highest for frontmost). + If two planes assigned to same CRTC have equal zpos values, the plane with higher plane + id is treated as closer to front. Can be IMMUTABLE if driver doesn't support changing + planes' order. Exact value range is driver dependent.</td> + </tr> + <tr> <td rowspan="20" valign="top" >i915</td> <td rowspan="2" valign="top" >Generic</td> <td valign="top" >"Broadcast RGB"</td> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 2bd3e5a..df88253 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -2,7 +2,7 @@ # Makefile for the drm device driver. This driver provides support for the # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. -drm-y := drm_auth.o drm_bufs.o drm_cache.o \ +drm-y := drm_auth.o drm_bufs.o drm_blend.o drm_cache.o \ drm_context.o drm_dma.o \ drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_drv.o drm_vm.o \ diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 86e89db..bd457ca 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -700,6 +700,8 @@ int drm_atomic_plane_set_property(struct drm_plane *plane, state->src_h = val; } else if (property == config->rotation_property) { state->rotation = val; + } else if (property == plane->zpos_property) { + state->zpos = val; } else if (plane->funcs->atomic_set_property) { return plane->funcs->atomic_set_property(plane, state, property, val); @@ -756,6 +758,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane, *val = state->src_h; } else if (property == config->rotation_property) { *val = state->rotation; + } else if (property == plane->zpos_property) { + *val = state->zpos; } else if (plane->funcs->atomic_get_property) { return plane->funcs->atomic_get_property(plane, state, property, val); } else { diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 997fd21..f10652f 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -32,6 +32,8 @@ #include <drm/drm_atomic_helper.h> #include <linux/fence.h> +#include "drm_crtc_internal.h" + /** * DOC: overview * @@ -587,6 +589,10 @@ drm_atomic_helper_check_planes(struct drm_device *dev, struct drm_plane_state *plane_state; int i, ret = 0; + ret = drm_atomic_helper_normalize_zpos(dev, state); + if (ret) + return ret; + for_each_plane_in_state(state, plane, plane_state, i) { const struct drm_plane_helper_funcs *funcs; diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c new file mode 100644 index 0000000..eef59bb --- /dev/null +++ b/drivers/gpu/drm/drm_blend.c @@ -0,0 +1,229 @@ +/* + * Copyright (C) 2016 Samsung Electronics Co.Ltd + * Authors: + * Marek Szyprowski <m.szyprowski(a)samsung.com> + * + * DRM core plane blending related functions + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that copyright + * notice and this permission notice appear in supporting documentation, and + * that the name of the copyright holders not be used in advertising or + * publicity pertaining to distribution of the software without specific, + * written prior permission. The copyright holders make no representations + * about the suitability of this software for any purpose. It is provided "as + * is" without express or implied warranty. + * + * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THIS SOFTWARE. + */ +#include <drm/drmP.h> +#include <drm/drm_atomic.h> +#include <drm/drm_crtc.h> +#include <linux/export.h> +#include <linux/slab.h> +#include <linux/sort.h> + +#include "drm_internal.h" + +/** + * drm_plane_create_zpos_property - create mutable zpos property + * @plane: drm plane + * @min: minimal possible value of zpos property + * @max: maximal possible value of zpos property + * + * This function initializes generic mutable zpos property and enables support + * for it in drm core. Drivers can then attach this property to planes to enable + * support for configurable planes arrangement during blending operation. + * Once mutable zpos property has been enabled, the DRM core will automatically + * calculate drm_plane_state->normalized_zpos values. Usually min should be set + * to 0 and max to maximal number of planes for given crtc - 1. + * + * If zpos of some planes cannot be changed (like fixed background or + * cursor/topmost planes), driver should adjust min/max values and assign those + * planes immutable zpos property with lower or higher values (for more + * information, see drm_mode_create_zpos_immutable_property() function). In such + * case driver should also assign proper initial zpos values for all planes in + * its plane_reset() callback, so the planes will be always sorted properly. + * + * Returns: + * Zero on success, negative errno on failure. + */ +int drm_plane_create_zpos_property(struct drm_plane *plane, + unsigned int min, unsigned int max) +{ + struct drm_property *prop; + + prop = drm_property_create_range(plane->dev, 0, "zpos", min, max); + if (!prop) + return -ENOMEM; + + drm_object_attach_property(&plane->base, prop, min); + + plane->zpos_property = prop; + return 0; +} +EXPORT_SYMBOL(drm_plane_create_zpos_property); + +/** + * drm_plane_create_zpos_immutable_property - create immuttable zpos property + * @plane: drm plane + * @min: minimal possible value of zpos property + * @max: maximal possible value of zpos property + * + * This function initializes generic immutable zpos property and enables + * support for it in drm core. Using this property driver lets userspace + * to get the arrangement of the planes for blending operation and notifies + * it that the hardware (or driver) doesn't support changing of the planes' + * order. + * + * Returns: + * Zero on success, negative errno on failure. + */ +int drm_plane_create_zpos_immutable_property(struct drm_plane *plane, + unsigned int min, unsigned int max) +{ + struct drm_property *prop; + + prop = drm_property_create_range(plane->dev, DRM_MODE_PROP_IMMUTABLE, + "zpos", min, max); + if (!prop) + return -ENOMEM; + + drm_object_attach_property(&plane->base, prop, min); + + plane->zpos_property = prop; + return 0; +} +EXPORT_SYMBOL(drm_plane_create_zpos_immutable_property); + +static int drm_atomic_state_zpos_cmp(const void *a, const void *b) +{ + const struct drm_plane_state *sa = *(struct drm_plane_state **)a; + const struct drm_plane_state *sb = *(struct drm_plane_state **)b; + + if (sa->zpos != sb->zpos) + return sa->zpos - sb->zpos; + else + return sa->plane->base.id - sb->plane->base.id; +} + +/** + * drm_atomic_helper_crtc_normalize_zpos - calculate normalized zpos values + * @crtc: crtc with planes, which have to be considered for normalization + * @crtc_state: new atomic state to apply + * + * This function checks new states of all planes assigned to given crtc and + * calculates normalized zpos value for them. Planes are compared first by their + * zpos values, then by plane id (if zpos equals). Plane with lowest zpos value + * is at the bottom. The plane_state->normalized_zpos is then filled with unique + * values from 0 to number of active planes in crtc minus one. + * + * RETURNS + * Zero for success or -errno + */ +int drm_atomic_helper_crtc_normalize_zpos(struct drm_crtc *crtc, + struct drm_crtc_state *crtc_state) +{ + struct drm_atomic_state *state = crtc_state->state; + struct drm_device *dev = crtc->dev; + int total_planes = dev->mode_config.num_total_plane; + struct drm_plane_state **states; + struct drm_plane *plane; + int i, zpos, n = 0; + int ret = 0; + + DRM_DEBUG_ATOMIC("[CRTC:%d:%s] calculating normalized zpos values\n", + crtc->base.id, crtc->name); + + states = kmalloc(total_planes * sizeof(*states), GFP_KERNEL); + if (!states) + return -ENOMEM; + + /* + * Normalization process might create new states for planes which + * normalized_zpos has to be recalculated. + */ + drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) { + struct drm_plane_state *plane_state = + drm_atomic_get_plane_state(state, plane); + if (IS_ERR(plane_state)) { + ret = PTR_ERR(plane_state); + goto done; + } + states[n++] = plane_state; + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] processing zpos value %d\n", + plane->base.id, plane->name, + plane_state->zpos); + } + + sort(states, n, sizeof(*states), drm_atomic_state_zpos_cmp, NULL); + + for (i = 0, zpos = 0; i < n; i++, zpos++) { + plane = states[i]->plane; + + zpos = max_t(int, zpos, states[i]->zpos); + + states[i]->normalized_zpos = zpos; + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] normalized zpos value %d\n", + plane->base.id, plane->name, zpos); + } + crtc_state->zpos_changed = true; + +done: + kfree(states); + return ret; +} +EXPORT_SYMBOL(drm_atomic_helper_crtc_normalize_zpos); + +/** + * drm_atomic_helper_normalize_zpos - calculate normalized zpos values for all + * crtcs + * @dev: DRM device + * @state: atomic state of DRM device + * + * This function calculates normalized zpos value for all modified planes in + * the provided atomic state of DRM device. For more information, see + * drm_atomic_helper_crtc_normalize_zpos() function. + * + * RETURNS + * Zero for success or -errno + */ +int drm_atomic_helper_normalize_zpos(struct drm_device *dev, + struct drm_atomic_state *state) +{ + struct drm_crtc *crtc; + struct drm_crtc_state *crtc_state; + struct drm_plane *plane; + struct drm_plane_state *plane_state; + int i, ret = 0; + + for_each_plane_in_state(state, plane, plane_state, i) { + crtc = plane_state->crtc; + if (!crtc) + continue; + if (plane->state->zpos != plane_state->zpos) { + crtc_state = + drm_atomic_get_existing_crtc_state(state, crtc); + crtc_state->zpos_changed = true; + } + } + + for_each_crtc_in_state(state, crtc, crtc_state, i) { + if (crtc_state->plane_mask != crtc->state->plane_mask || + crtc_state->zpos_changed) { + ret = drm_atomic_helper_crtc_normalize_zpos(crtc, + crtc_state); + if (ret) + return ret; + } + } + return 0; +} +EXPORT_SYMBOL(drm_atomic_helper_normalize_zpos); diff --git a/drivers/gpu/drm/drm_crtc_internal.h b/drivers/gpu/drm/drm_crtc_internal.h index a78c138..37d9068 100644 --- a/drivers/gpu/drm/drm_crtc_internal.h +++ b/drivers/gpu/drm/drm_crtc_internal.h @@ -42,3 +42,6 @@ int drm_atomic_get_property(struct drm_mode_object *obj, int drm_mode_atomic_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); +/* drm_blend.c */ +int drm_atomic_helper_normalize_zpos(struct drm_device *dev, + struct drm_atomic_state *state); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index d1559cd..921c93f 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -305,6 +305,7 @@ struct drm_plane_helper_funcs; * @mode_changed: crtc_state->mode or crtc_state->enable has been changed * @active_changed: crtc_state->active has been toggled. * @connectors_changed: connectors to this crtc have been updated + * @zpos_changed: zpos values of planes on this crtc have been updated * @color_mgmt_changed: color management properties have changed (degamma or * gamma LUT or CSC matrix) * @plane_mask: bitmask of (1 << drm_plane_index(plane)) of attached planes @@ -340,6 +341,7 @@ struct drm_crtc_state { bool mode_changed : 1; bool active_changed : 1; bool connectors_changed : 1; + bool zpos_changed : 1; bool color_mgmt_changed : 1; /* attached planes bitmask: @@ -1263,6 +1265,9 @@ struct drm_connector { * plane (in 16.16) * @src_w: width of visible portion of plane (in 16.16) * @src_h: height of visible portion of plane (in 16.16) + * @zpos: priority of the given plane on crtc (optional) + * @normalized_zpos: normalized value of zpos: unique, range from 0 to N-1 + * for given crtc * @state: backpointer to global drm_atomic_state */ struct drm_plane_state { @@ -1283,6 +1288,10 @@ struct drm_plane_state { /* Plane rotation */ unsigned int rotation; + /* Plane zpos */ + unsigned int zpos; + unsigned int normalized_zpos; + struct drm_atomic_state *state; }; @@ -1516,6 +1525,7 @@ enum drm_plane_type { * @properties: property tracking for this plane * @type: type of plane (overlay, primary, cursor) * @state: current atomic state for this plane + * @zpos_property: zpos property for this plane */ struct drm_plane { struct drm_device *dev; @@ -1546,6 +1556,8 @@ struct drm_plane { const struct drm_plane_helper_funcs *helper_private; struct drm_plane_state *state; + + struct drm_property *zpos_property; }; /** @@ -2554,6 +2566,22 @@ extern struct drm_property *drm_mode_create_rotation_property(struct drm_device extern unsigned int drm_rotation_simplify(unsigned int rotation, unsigned int supported_rotations); +int drm_plane_atomic_set_zpos_property(struct drm_plane *plane, + struct drm_plane_state *state, + struct drm_property *property, + uint64_t val); + +int drm_plane_atomic_get_zpos_property(struct drm_plane *plane, + const struct drm_plane_state *state, + struct drm_property *property, + uint64_t *val); + +int drm_plane_create_zpos_property(struct drm_plane *plane, + unsigned int min, unsigned int max); +int drm_plane_create_zpos_immutable_property(struct drm_plane *plane, + unsigned int min, + unsigned int max); + /* Helpers */ static inline struct drm_plane *drm_plane_find(struct drm_device *dev, -- 1.9.1

9 years

5
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Re: [Linaro-mm-sig] [PATCH v2] dma-buf: use vma_pages().

by Eric Engestrom

On Mon, May 23, 2016 at 05:08:42PM +0530, Muhammad Falak R Wani wrote: > Replace explicit computation of vma page count by a call to > vma_pages(). > Also, include <linux/mm.h> All good! Reviewed-by: Eric Engestrom <eric.engestrom(a)imgtec.com>

9 years

1
0
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Re: [Linaro-mm-sig] [PATCH] dma-buf: use vma_pages().

by Eric Engestrom

On Sat, May 21, 2016 at 06:53:32PM +0530, Muhammad Falak R Wani wrote: > Replace explicit computation of vma page count by a call to > vma_pages() > > Signed-off-by: Muhammad Falak R Wani <falakreyaz(a)gmail.com> > --- Good change, but this function is defined in mm.h Please add: #include <linux/mm.h> With that fixed: Reviewed-by: Eric Engestrom <eric.engestrom(a)imgtec.com>

9 years

1
0
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[PATCH v8 0/3] Secure Memory Allocation Framework

by Benjamin Gaignard

version 8 chanegs: - rework of the structures used within ioctl by adding a version field and padding to be futur proof - rename fake secure moduel to test secure module - fix the various remarks done on the previous patcheset version 7 changes: - rebased on kernel 4.6-rc7 - simplify secure module API - add vma ops to be able to detect mmap/munmap calls - add ioctl to get number and allocator names - update libsmaf with adding tests https://git.linaro.org/people/benjamin.gaignard/libsmaf.git - add debug log in fake secure module version 6 changes: - rebased on kernel 4.5-rc4 - fix mmapping bug while requested allocation size isn't a a multiple of PAGE_SIZE (add a test for this in libsmaf) version 5 changes: - rebased on kernel 4.3-rc6 - rework locking schema and make handle status use an atomic_t - add a fake secure module to allow performing tests without trusted environment version 4 changes: - rebased on kernel 4.3-rc3 - fix missing EXPORT_SYMBOL for smaf_create_handle() version 3 changes: - Remove ioctl for allocator selection instead provide the name of the targeted allocator with allocation request. Selecting allocator from userland isn't the prefered way of working but is needed when the first user of the buffer is a software component. - Fix issues in case of error while creating smaf handle. - Fix module license. - Update libsmaf and tests to care of the SMAF API evolution https://git.linaro.org/people/benjamin.gaignard/libsmaf.git version 2 changes: - Add one ioctl to allow allocator selection from userspace. This is required for the uses case where the first user of the buffer is a software IP which can't perform dma_buf attachement. - Add name and ranking to allocator structure to be able to sort them. - Create a tiny library to test SMAF: https://git.linaro.org/people/benjamin.gaignard/libsmaf.git - Fix one issue when try to secure buffer without secure module registered The outcome of the previous RFC about how do secure data path was the need of a secure memory allocator (https://lkml.org/lkml/2015/5/5/551) SMAF goal is to provide a framework that allow allocating and securing memory by using dma_buf. Each platform have it own way to perform those two features so SMAF design allow to register helper modules to perform them. To be sure to select the best allocation method for devices SMAF implement deferred allocation mechanism: memory allocation is only done when the first device effectively required it. Allocator modules have to implement a match() to let SMAF know if they are compatibles with devices needs. This patch set provide an example of allocator module which use dma_{alloc/free/mmap}_attrs() and check if at least one device have coherent_dma_mask set to DMA_BIT_MASK(32) in match function. I have named smaf-cma.c like it is done for drm_gem_cma_helper.c even if a better name could be found for this file. Secure modules are responsibles of granting and revoking devices access rights on the memory. Secure module is also called to check if CPU map memory into kernel and user address spaces. An example of secure module implementation can be found here: http://git.linaro.org/people/benjamin.gaignard/optee-sdp.git This code isn't yet part of the patch set because it depends on generic TEE which is still under discussion (https://lwn.net/Articles/644646/) For allocation part of SMAF code I get inspirated by Sumit Semwal work about constraint aware allocator. Benjamin Gaignard (3): create SMAF module SMAF: add CMA allocator SMAF: add test secure module drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/smaf/Kconfig | 17 + drivers/smaf/Makefile | 3 + drivers/smaf/smaf-cma.c | 188 ++++++++++ drivers/smaf/smaf-core.c | 818 +++++++++++++++++++++++++++++++++++++++++ drivers/smaf/smaf-testsecure.c | 90 +++++ include/linux/smaf-allocator.h | 45 +++ include/linux/smaf-secure.h | 65 ++++ include/uapi/linux/smaf.h | 85 +++++ 10 files changed, 1314 insertions(+) create mode 100644 drivers/smaf/Kconfig create mode 100644 drivers/smaf/Makefile create mode 100644 drivers/smaf/smaf-cma.c create mode 100644 drivers/smaf/smaf-core.c create mode 100644 drivers/smaf/smaf-testsecure.c create mode 100644 include/linux/smaf-allocator.h create mode 100644 include/linux/smaf-secure.h create mode 100644 include/uapi/linux/smaf.h -- 1.9.1

9 years

1
3
0 0

[PATCH v8 00/11] Add DRM for stih4xx platforms

by Benjamin Gaignard

This series of patches add the support of DRM/KMS drivers for STMicroelectronics chipsets stih416 and stih407. version 8: - Allow driver to be build as kernel module. - Use Universal Plane instead of legacy code. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v8 version 7: - rebased on top of drm-next (2014-07-24) patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v7 version 6: - rebased on top of new component framework API. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v6 version 5: - Rework sti_drm_drv probes functions to support deferred probe. This allow hdmi to delayed framebuffer creation until I2C is available. - Add ops functions in sti_layer structure to simpify GDP and VID code. - Add NOTES file to describe how the DRM concepts are mapped on hardware. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v5 version 4: - Remove depency between TVout it subdevices HDMI and HDA - Rework and simplify VTG and VTAC code - Fix numbers of typo and indentation - Remove debug (will be push in separate patches) - Fix remarks done in previous patcheset patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v4 version 3: - Correctly split code between probe and bind funtions - Squash some commits - remove HQ-VDP device code to have a smaller patcheset, we will introduce it later. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v3 version 2: - Use componentized device instead of register sub-devices in master driver probe function - Fix Makefile and Kconfig to only allow built-in compilation patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v2 version 1: - First path submission Hardware is split in two main blocks: Compositor and TVout. Each of them includes specific hardware IPs and the display timing are controlled by a specific Video Timing Generator hardware IP (VTG). Compositor is made of the follow hardware IPs: - GDP (Generic Display Pipeline) which is an entry point for graphic (RGB) buffers - VDP (Video Diplay Pipeline) which is an entry point for video (YUV) buffers - HQVDP (High Quality Video Display Processor) that supports scaling, deinterlacing and some miscellaneous image quality improvements. It fetches the Video decoded buffers from memory, processes them and pushes them to the Compositor through a HW dedicated bus. - Mixer is responsible of mixing all the entries depending of their respective z-order and layout TVout is divided in 3 parts: - HDMI to generate HDMI signals, depending of chipset version HDMI phy can change. - HDA to generate signals for HD analog TV - VIP to control/switch data path coming from Compositor On stih416 compositor and Tvout are on different dies so a Video Trafic Advance inter-die Communication mechanism (VTAC) is needed. +---------------------------------------------+ +----------------------------------------+ | +-------------------------------+ +----+ | | +----+ +--------------------------+ | | | | | | | | | | | +---------+ +----+ | | | | +----+ +------+ | | | | | | | | | VIP |---->|HDMI| | | | | |GPD +------------->| | | | | | | | | | | | +----+ | | | | +----+ |Mixer |--|-->| | | | | |---|->| switcher| | | | | | | | | | | | | | | | | +----+ | | | | | | | | | | | | | | | |---->|HDA | | | | | +------+ | |VTAC|========>|VTAC| | +---------+ +----+ | | | | | | | | | | | | | | | | Compositor | | | | | | | | TVout | | | +-------------------------------+ | | | | | | +--------------------------+ | | ^ | | | | | | ^ | | | | | | | | | | | | +--------------+ | | | | | | +-------------+ | | | VTG (master) |----->| | | | | |----->| VTG (slave) | | | +--------------+ +----+ | | +----+ +-------------+ | |Digital die | | Analog Die| +---------------------------------------------+ +----------------------------------------+ On stih407 Compositor and Tvout are on the same die +-----------------------------------------------------------------+ | +-------------------------------+ +--------------------------+ | | | | | +---------+ +----+ | | | | +----+ +------+ | | | VIP |---->|HDMI| | | | | |GPD +------------->| | | | | | +----+ | | | | +----+ |Mixer |--|--|->| switcher| | | | | +----+ +-----+ | | | | | | +----+ | | | | |VDP +-->+HQVDP+--->| | | | | |---->|HDA | | | | | +----+ +-----+ +------+ | | +---------+ +----+ | | | | | | | | | | Compositor | | TVout | | | +-------------------------------+ +--------------------------+ | | ^ ^ | | | | | | +--------------+ | | | VTG | | | +--------------+ | |Digital die | +-----------------------------------------------------------------+ In addition of the drivers for the IPs listed before a thin I2C driver (hdmiddc) is used by HDMI driver to retrieve EDID for monitor. To unify interfaces of GDP and VDP we create a "layer" interface called by compositor to control both GPD and VDP. Hardware have memory contraints (alignment, contiguous) so we use CMA drm helpers functions to allocate frame buffer. File naming convention is: - sti_* for IPs drivers - sti_drm_* for drm functions implementation. Benjamin Gaignard (11): drm: sti: add bindings for DRM driver drm: sti: add VTG driver drm: sti: add VTAC drivers drm: sti: add HDMI driver drm: sti: add HDA driver drm: sti: add TVOut driver drm: sti: add GDP layer drm: sti: add VID layer drm: sti: add Mixer drm: sti: add Compositor drm: sti: Add DRM driver itself .../devicetree/bindings/gpu/st,stih4xx.txt | 189 +++++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sti/Kconfig | 14 + drivers/gpu/drm/sti/Makefile | 21 + drivers/gpu/drm/sti/NOTES | 58 ++ drivers/gpu/drm/sti/sti_compositor.c | 279 +++++++ drivers/gpu/drm/sti/sti_compositor.h | 90 +++ drivers/gpu/drm/sti/sti_drm_crtc.c | 423 +++++++++++ drivers/gpu/drm/sti/sti_drm_crtc.h | 22 + drivers/gpu/drm/sti/sti_drm_drv.c | 241 ++++++ drivers/gpu/drm/sti/sti_drm_drv.h | 29 + drivers/gpu/drm/sti/sti_drm_plane.c | 195 +++++ drivers/gpu/drm/sti/sti_drm_plane.h | 18 + drivers/gpu/drm/sti/sti_gdp.c | 549 ++++++++++++++ drivers/gpu/drm/sti/sti_gdp.h | 16 + drivers/gpu/drm/sti/sti_hda.c | 794 ++++++++++++++++++++ drivers/gpu/drm/sti/sti_hdmi.c | 810 +++++++++++++++++++++ drivers/gpu/drm/sti/sti_hdmi.h | 88 +++ drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.c | 336 +++++++++ drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.h | 14 + drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c | 211 ++++++ drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.h | 14 + drivers/gpu/drm/sti/sti_layer.c | 197 +++++ drivers/gpu/drm/sti/sti_layer.h | 123 ++++ drivers/gpu/drm/sti/sti_mixer.c | 249 +++++++ drivers/gpu/drm/sti/sti_mixer.h | 54 ++ drivers/gpu/drm/sti/sti_tvout.c | 648 +++++++++++++++++ drivers/gpu/drm/sti/sti_vid.c | 138 ++++ drivers/gpu/drm/sti/sti_vid.h | 12 + drivers/gpu/drm/sti/sti_vtac.c | 215 ++++++ drivers/gpu/drm/sti/sti_vtg.c | 366 ++++++++++ drivers/gpu/drm/sti/sti_vtg.h | 28 + 33 files changed, 6444 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/st,stih4xx.txt create mode 100644 drivers/gpu/drm/sti/Kconfig create mode 100644 drivers/gpu/drm/sti/Makefile create mode 100644 drivers/gpu/drm/sti/NOTES create mode 100644 drivers/gpu/drm/sti/sti_compositor.c create mode 100644 drivers/gpu/drm/sti/sti_compositor.h create mode 100644 drivers/gpu/drm/sti/sti_drm_crtc.c create mode 100644 drivers/gpu/drm/sti/sti_drm_crtc.h create mode 100644 drivers/gpu/drm/sti/sti_drm_drv.c create mode 100644 drivers/gpu/drm/sti/sti_drm_drv.h create mode 100644 drivers/gpu/drm/sti/sti_drm_plane.c create mode 100644 drivers/gpu/drm/sti/sti_drm_plane.h create mode 100644 drivers/gpu/drm/sti/sti_gdp.c create mode 100644 drivers/gpu/drm/sti/sti_gdp.h create mode 100644 drivers/gpu/drm/sti/sti_hda.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi.h create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.h create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.h create mode 100644 drivers/gpu/drm/sti/sti_layer.c create mode 100644 drivers/gpu/drm/sti/sti_layer.h create mode 100644 drivers/gpu/drm/sti/sti_mixer.c create mode 100644 drivers/gpu/drm/sti/sti_mixer.h create mode 100644 drivers/gpu/drm/sti/sti_tvout.c create mode 100644 drivers/gpu/drm/sti/sti_vid.c create mode 100644 drivers/gpu/drm/sti/sti_vid.h create mode 100644 drivers/gpu/drm/sti/sti_vtac.c create mode 100644 drivers/gpu/drm/sti/sti_vtg.c create mode 100644 drivers/gpu/drm/sti/sti_vtg.h -- 1.9.1

9 years, 1 month

3
14
0 0

[RFC 0/3] Unify IOMMU-based DMA-mapping code for ARM and ARM64

by Marek Szyprowski

Dear All, This is an initial RFC on the unification of IOMMU-based DMA-mapping code for ARM and ARM64 architectures. Right now ARM architecture still use my old code for IOMMU-based DMA-mapping glue, initially merged in commit 4ce63fcd919c32d22528e54dcd89506962933719 ("ARM: dma-mapping: add support for IOMMU mapper"). In meantime ARM64 got a new, slightly improved implementation provided by Robin Murphy in commit 13b8629f651164d71f4d38b821925f93ba4236c8 ("arm64: Add IOMMU dma_ops"). Both implementations are very similar thus their unification is desired to avoid duplicating future works and simplify code, which uses this layer on both architectures. In this patchset I've selected the new implementation (from ARM64 architecture) as a base. This means that ARM-specific, old interface (arm_iommu_* functions) for configuring IOMMU domains will be no longer available and its users have to be converted to new API. Besides lack of old interface, the second difference is additional requirements for IOMMU drivers. New code relies on the support for IOMMU_DOMAIN_DMA and default IOMMU domain, which is automatically attached by the IOMMU core. The new code also assumes that the IOMMU-based DMA-mapping ops are mainly configured from arch_setup_dma_ops() function, which means that the IOMMU driver should provide needed of_xlate callbacks and initialize IOMMU ops for device nodes. However it should be also possible to initialize IOMMU-based DMA-mapping ops for client devices directly from IOMMU drivers by calling common_iommu_setup_dma_ops() (some drivers used such approach). IOMMU drivers should be also aware of the fact that the default domain is attached via device_attach and then device_attach callback can be called once again with different domain without previous detach from default domain. For more information on this issue, see the following thread: https://lists.linaro.org/pipermail/linaro-mm-sig/2016-February/004625.html Currently there are 4 users of the old arm_iommu_* interface: 1. Exynos DRM driver 2. Rockchip DRM driver 3. OMAP3 ISP camera driver 4. Renesas VMSA-compatible IPMMU driver In this patchset I've converted Exynos DRM driver for the new API (patch 1). This required some changes in the memory management model inside the driver and removal of some hacks, which were used to setup IOMMU-based DMA-mapping ops on the 'exynos-drm' virtual device and common IOMMU domain for all Exynos DRM sub-devices, those changes have been posted separately here: http://www.spinics.net/lists/dri-devel/msg100861.html Rockchip DRM driver requires similar conversion. Converting OMAP3 ISP camera driver to new API requires adding support for IOMMU groups to OMAP IOMMU driver, because the new DMA/IOMMU code used IOMMU_DOMAIN_DMA type domains and default groups. Renesas IPMMU driver needs also to be extended with IOMMU_DOMAIN_DMA domain type support. It can also be prepared for IOMMU_OF_DECLARE and of_xlate callback-based initialization to let core to automatically setup of IOMMU-based DMA mapping implementation. Patch 2 moves existing code from arch/arm64 to drivers/iommu and introduces some minor changes in function names - mainly adding arch_ prefix to some dma-mapping internal functions, which stay in arch/arm64/ (functions of similar names are present in arch/arm). Patch 3 adapts ARM architecture for the common code. I would like to get your comments on the proposed approach. There is still some work that need to be done to convert remaining users of the old API and updating IOMMU drivers to the new API requirements. This change need to be tested on the all affected ARM sub-architectures. Right now patches were tested on only Exynos based boards: ARM 32bit: Exynos4412 and Exynos5422 boards and ARM 64 bit Exnyos 5433 (with some out-of-tree DTS). To ease testing I've prepared a branch with all the patches needed (there are all needed patches for Exynos subarch, which have been posted as separate patchsets): https://git.linaro.org/people/marek.szyprowski/linux-srpol.git v4.5-dma-iommu-unification Patches are based on Linux v4.5-rc4 vanilla tree. Best regards Marek Szyprowski Samsung R&D Institute Poland Patch summary: Marek Szyprowski (3): drm/exynos: rewrite IOMMU support code iommu: dma-iommu: move IOMMU/DMA-mapping code from ARM64 arch to drivers iommu: dma-iommu: use common implementation also on ARM architecture arch/arm/Kconfig | 22 +- arch/arm/include/asm/device.h | 9 - arch/arm/include/asm/dma-iommu.h | 37 - arch/arm/include/asm/dma-mapping.h | 59 +- arch/arm/mm/dma-mapping.c | 1158 +---------------------------- arch/arm64/include/asm/dma-mapping.h | 39 +- arch/arm64/mm/dma-mapping.c | 491 +----------- drivers/gpu/drm/exynos/Kconfig | 2 +- drivers/gpu/drm/exynos/exynos_drm_drv.c | 7 +- drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 +- drivers/gpu/drm/exynos/exynos_drm_iommu.c | 91 ++- drivers/gpu/drm/exynos/exynos_drm_iommu.h | 2 +- drivers/gpu/drm/rockchip/Kconfig | 1 + drivers/iommu/Kconfig | 1 + drivers/iommu/Makefile | 2 +- drivers/iommu/dma-iommu-ops.c | 471 ++++++++++++ drivers/media/platform/Kconfig | 1 + include/linux/dma-iommu.h | 14 + 18 files changed, 679 insertions(+), 1730 deletions(-) delete mode 100644 arch/arm/include/asm/dma-iommu.h create mode 100644 drivers/iommu/dma-iommu-ops.c -- 1.9.2

9 years, 1 month

5
13
0 0

Re: [Linaro-mm-sig] [RESEND] fence: add missing descriptions for fence

by Sumit Semwal

Hi Luis, On 12 April 2016 at 04:03, Luis de Bethencourt <luisbg(a)osg.samsung.com> wrote: > On 11/04/16 21:09, Gustavo Padovan wrote: >> Hi Luis, >> >> 2016-04-11 Luis de Bethencourt <luisbg(a)osg.samsung.com>: >> >>> The members child_list and active_list were added to the fence struct >>> without descriptions for the Documentation. Adding these. >>> Thanks for the patch; will get it queued for for-next. >>> Fixes: b55b54b5db33 ("staging/android: remove struct sync_pt") >>> Signed-off-by: Luis de Bethencourt <luisbg(a)osg.samsung.com> >>> Reviewed-by: Javier Martinez Canillas <javier(a)osg.samsung.com> >>> --- >>> Hi, >>> >>> Just resending this patch since it hasn't had any reviews in since >>> March 21st. >>> >>> Thanks, >>> Luis >>> >>> include/linux/fence.h | 2 ++ >>> 1 file changed, 2 insertions(+) >> >> Reviewed-by: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> >> >> Gustavo >> > > Thank you Gustavo. > > Nice seeing you around here :) > > Luis BR, Sumit.

9 years, 1 month

1
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0 0

Re: [Linaro-mm-sig] [RESEND] fence: add missing descriptions for fence

by Gustavo Padovan

Hi Luis, 2016-04-11 Luis de Bethencourt <luisbg(a)osg.samsung.com>: > The members child_list and active_list were added to the fence struct > without descriptions for the Documentation. Adding these. > > Fixes: b55b54b5db33 ("staging/android: remove struct sync_pt") > Signed-off-by: Luis de Bethencourt <luisbg(a)osg.samsung.com> > Reviewed-by: Javier Martinez Canillas <javier(a)osg.samsung.com> > --- > Hi, > > Just resending this patch since it hasn't had any reviews in since > March 21st. > > Thanks, > Luis > > include/linux/fence.h | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> Gustavo

9 years, 1 month

1
0
0 0

[PATCH 0/2] drm: add generic zpos property

by Benjamin Gaignard

The original patches have been done by Marek: https://lists.freedesktop.org/archives/dri-devel/2016-January/099572.html I have just adapt them to make zpos depend on plane and no more on drm core. Since zpos range can be define per plane normalize function takes care of the min and max before compute normalized zpos value. Benjamin Gaignard (2): drm: add generic zpos property drm: sti: use generic zpos for plane Documentation/DocBook/gpu.tmpl | 10 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_atomic.c | 4 + drivers/gpu/drm/drm_atomic_helper.c | 6 + drivers/gpu/drm/drm_blend.c | 242 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_crtc_internal.h | 3 + drivers/gpu/drm/sti/sti_mixer.c | 2 +- drivers/gpu/drm/sti/sti_plane.c | 82 +++++------- drivers/gpu/drm/sti/sti_plane.h | 2 - include/drm/drm_crtc.h | 17 +++ 10 files changed, 314 insertions(+), 56 deletions(-) create mode 100644 drivers/gpu/drm/drm_blend.c -- 1.9.1

9 years, 2 months

3
4
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[PATCH] dma-buf: Release module reference on creation failure

by Chris Wilson

If we fail to create the anon file, we need to remember to release the module reference on the owner. Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: linux-media(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Cc: linaro-mm-sig(a)lists.linaro.org --- drivers/dma-buf/dma-buf.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index 4a2c07ee6677..6f0f0b10a241 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -333,6 +333,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) struct reservation_object *resv = exp_info->resv; struct file *file; size_t alloc_size = sizeof(struct dma_buf); + int ret; if (!exp_info->resv) alloc_size += sizeof(struct reservation_object); @@ -356,8 +357,8 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) dmabuf = kzalloc(alloc_size, GFP_KERNEL); if (!dmabuf) { - module_put(exp_info->owner); - return ERR_PTR(-ENOMEM); + ret = -ENOMEM; + goto free_module; } dmabuf->priv = exp_info->priv; @@ -378,8 +379,8 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) file = anon_inode_getfile("dmabuf", &dma_buf_fops, dmabuf, exp_info->flags); if (IS_ERR(file)) { - kfree(dmabuf); - return ERR_CAST(file); + ret = PTR_ERR(file); + goto free_dmabuf; } file->f_mode |= FMODE_LSEEK; @@ -393,6 +394,12 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) mutex_unlock(&db_list.lock); return dmabuf; + +free_dmabuf: + kfree(dmabuf); +free_module: + module_put(exp_info->owner); + return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(dma_buf_export); -- 2.8.0.rc3

9 years, 2 months

2
1
0 0

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