Am 19.04.21 um 18:11 schrieb Michal Hocko:
> On Mon 19-04-21 17:44:13, Christian König wrote:
>> Am 19.04.21 um 17:19 schrieb Peter.Enderborg(a)sony.com:
>>> On 4/19/21 5:00 PM, Michal Hocko wrote:
>>>> On Mon 19-04-21 12:41:58, Peter.Enderborg(a)sony.com wrote:
>>>>> On 4/19/21 2:16 PM, Michal Hocko wrote:
>>>>>> On Sat 17-04-21 12:40:32, Peter Enderborg wrote:
>>>>>>> This adds a total used dma-buf memory. Details
>>>>>>> can be found in debugfs, however it is not for everyone
>>>>>>> and not always available. dma-buf are indirect allocated by
>>>>>>> userspace. So with this value we can monitor and detect
>>>>>>> userspace applications that have problems.
>>>>>> The changelog would benefit from more background on why this is needed,
>>>>>> and who is the primary consumer of that value.
>>>>>>
>>>>>> I cannot really comment on the dma-buf internals but I have two remarks.
>>>>>> Documentation/filesystems/proc.rst needs an update with the counter
>>>>>> explanation and secondly is this information useful for OOM situations
>>>>>> analysis? If yes then show_mem should dump the value as well.
>>>>>>
>>>>>> From the implementation point of view, is there any reason why this
>>>>>> hasn't used the existing global_node_page_state infrastructure?
>>>>> I fix doc in next version. Im not sure what you expect the commit message to include.
>>>> As I've said. Usual justification covers answers to following questions
>>>> - Why do we need it?
>>>> - Why the existing data is insuficient?
>>>> - Who is supposed to use the data and for what?
>>>>
>>>> I can see an answer for the first two questions (because this can be a
>>>> lot of memory and the existing infrastructure is not production suitable
>>>> - debugfs). But the changelog doesn't really explain who is going to use
>>>> the new data. Is this a monitoring to raise an early alarm when the
>>>> value grows? Is this for debugging misbehaving drivers? How is it
>>>> valuable for those?
>>>>
>>>>> The function of the meminfo is: (From Documentation/filesystems/proc.rst)
>>>>>
>>>>> "Provides information about distribution and utilization of memory."
>>>> True. Yet we do not export any random counters, do we?
>>>>
>>>>> Im not the designed of dma-buf, I think global_node_page_state as a kernel
>>>>> internal.
>>>> It provides a node specific and optimized counters. Is this a good fit
>>>> with your new counter? Or the NUMA locality is of no importance?
>>> Sounds good to me, if Christian Koenig think it is good, I will use that.
>>> It is only virtio in drivers that use the global_node_page_state if
>>> that matters.
>> DMA-buf are not NUMA aware at all. On which node the pages are allocated
>> (and if we use pages at all and not internal device memory) is up to the
>> exporter and importer.
> The question is not whether it is NUMA aware but whether it is useful to
> know per-numa data for the purpose the counter is supposed to serve.
No, not at all. The pages of a single DMA-buf could even be from
different NUMA nodes if the exporting driver decides that this is
somehow useful.
Christian.
Am 19.04.21 um 17:19 schrieb Peter.Enderborg(a)sony.com:
> On 4/19/21 5:00 PM, Michal Hocko wrote:
>> On Mon 19-04-21 12:41:58, Peter.Enderborg(a)sony.com wrote:
>>> On 4/19/21 2:16 PM, Michal Hocko wrote:
>>>> On Sat 17-04-21 12:40:32, Peter Enderborg wrote:
>>>>> This adds a total used dma-buf memory. Details
>>>>> can be found in debugfs, however it is not for everyone
>>>>> and not always available. dma-buf are indirect allocated by
>>>>> userspace. So with this value we can monitor and detect
>>>>> userspace applications that have problems.
>>>> The changelog would benefit from more background on why this is needed,
>>>> and who is the primary consumer of that value.
>>>>
>>>> I cannot really comment on the dma-buf internals but I have two remarks.
>>>> Documentation/filesystems/proc.rst needs an update with the counter
>>>> explanation and secondly is this information useful for OOM situations
>>>> analysis? If yes then show_mem should dump the value as well.
>>>>
>>>> From the implementation point of view, is there any reason why this
>>>> hasn't used the existing global_node_page_state infrastructure?
>>> I fix doc in next version. Im not sure what you expect the commit message to include.
>> As I've said. Usual justification covers answers to following questions
>> - Why do we need it?
>> - Why the existing data is insuficient?
>> - Who is supposed to use the data and for what?
>>
>> I can see an answer for the first two questions (because this can be a
>> lot of memory and the existing infrastructure is not production suitable
>> - debugfs). But the changelog doesn't really explain who is going to use
>> the new data. Is this a monitoring to raise an early alarm when the
>> value grows? Is this for debugging misbehaving drivers? How is it
>> valuable for those?
>>
>>> The function of the meminfo is: (From Documentation/filesystems/proc.rst)
>>>
>>> "Provides information about distribution and utilization of memory."
>> True. Yet we do not export any random counters, do we?
>>
>>> Im not the designed of dma-buf, I think global_node_page_state as a kernel
>>> internal.
>> It provides a node specific and optimized counters. Is this a good fit
>> with your new counter? Or the NUMA locality is of no importance?
> Sounds good to me, if Christian Koenig think it is good, I will use that.
> It is only virtio in drivers that use the global_node_page_state if
> that matters.
DMA-buf are not NUMA aware at all. On which node the pages are allocated
(and if we use pages at all and not internal device memory) is up to the
exporter and importer.
Christian.
>
>
>>> dma-buf is a device driver that provides a function so I might be
>>> on the outside. However I also see that it might be relevant for a OOM.
>>> It is memory that can be freed by killing userspace processes.
>>>
>>> The show_mem thing. Should it be a separate patch?
>> This is up to you but if you want to expose the counter then send it in
>> one series.
>>
Am Montag, dem 19.04.2021 um 07:17 +0000 schrieb Robin Gong:
> Hi Lucas,
>
> On 2021/04/14 Lucas Stach <l.stach(a)pengutronix.de> wrote:
> > Hi Robin,
> >
> > Am Mittwoch, dem 14.04.2021 um 14:33 +0000 schrieb Robin Gong:
> > > On 2020/05/20 17:43 Lucas Stach <l.stach(a)pengutronix.de> wrote:
> > > > Am Mittwoch, den 20.05.2020, 16:20 +0800 schrieb Shengjiu Wang:
> > > > > Hi
> > > > >
> > > > > On Tue, May 19, 2020 at 6:04 PM Lucas Stach
> > > > > <l.stach(a)pengutronix.de>
> > > > wrote:
> > > > > > Am Dienstag, den 19.05.2020, 17:41 +0800 schrieb Shengjiu Wang:
> > > > > > > There are two requirements that we need to move the request of
> > > > > > > dma channel from probe to open.
> > > > > >
> > > > > > How do you handle -EPROBE_DEFER return code from the channel
> > > > > > request if you don't do it in probe?
> > > > >
> > > > > I use the dma_request_slave_channel or dma_request_channel instead
> > > > > of dmaengine_pcm_request_chan_of. so there should be not
> > > > > -EPROBE_DEFER return code.
> > > >
> > > > This is a pretty weak argument. The dmaengine device might probe
> > > > after you try to get the channel. Using a function to request the
> > > > channel that doesn't allow you to handle probe deferral is IMHO a
> > > > bug and should be fixed, instead of building even more assumptions on top
> > of it.
> > > >
> > > > > > > - When dma device binds with power-domains, the power will be
> > > > > > > enabled when we request dma channel. If the request of dma
> > > > > > > channel happen on probe, then the power-domains will be always
> > > > > > > enabled after kernel boot up, which is not good for power
> > > > > > > saving, so we need to move the request of dma channel to
> > > > > > > .open();
> > > > > >
> > > > > > This is certainly something which could be fixed in the
> > > > > > dmaengine driver.
> > > > >
> > > > > Dma driver always call the pm_runtime_get_sync in
> > > > > device_alloc_chan_resources, the device_alloc_chan_resources is
> > > > > called when channel is requested. so power is enabled on channel
> > request.
> > > >
> > > > So why can't you fix the dmaengine driver to do that RPM call at a
> > > > later time when the channel is actually going to be used? This will
> > > > allow further power savings with other slave devices than the audio PCM.
> > > Hi Lucas,
> > > Thanks for your suggestion. I have tried to implement runtime
> > > autosuspend in fsl-edma driver on i.mx8qm/qxp with delay time (2 sec)
> > > for this feature as below (or you can refer to
> > > drivers/dma/qcom/hidma.c), and pm_runtime_get_sync/
> > > pm_runtime_put_autosuspend in all dmaengine driver interface like
> > > device_alloc_chan_resources/device_prep_slave_sg/device_prep_dma_cycli
> > > c/
> > > device_tx_status...
> > >
> > >
> > > pm_runtime_use_autosuspend(fsl_chan->dev);
> > > pm_runtime_set_autosuspend_delay(fsl_chan->dev,
> > 2000);
> > >
> > > That could resolve this audio case since the autosuspend could suspend
> > > runtime after
> > > 2 seconds if there is no further dma transfer but only channel
> > request(device_alloc_chan_resources).
> > > But unfortunately, it cause another issue. As you know, on our
> > > i.mx8qm/qxp, power domain done by scfw (drivers/firmware/imx/scu-pd.c)
> > over mailbox:
> > > imx_sc_pd_power()->imx_scu_call_rpc()->
> > > imx_scu_ipc_write()->mbox_send_message()
> > > which means have to 'waits for completion', meanwhile, some driver
> > > like tty will call dmaengine interfaces in non-atomic case as below,
> > >
> > > static int uart_write(struct tty_struct *tty, const unsigned char
> > > *buf, int count) {
> > > .......
> > > port = uart_port_lock(state, flags);
> > > ......
> > > __uart_start(tty); //call start_tx()->dmaengine_prep_slave_sg...
> > > uart_port_unlock(port, flags);
> > > return ret;
> > > }
> > >
> > > Thus dma runtime resume may happen in that timing window and cause
> > kernel alarm.
> > > I'm not sure whether there are similar limitations on other driver
> > > subsystem. But for me, It looks like the only way to resolve the
> > > contradiction between tty and scu-pd (hardware limitation on
> > > i.mx8qm/qxp) is to give up autosuspend and keep pm_runtime_get_sync
> > only in device_alloc_chan_resources because request channel is a safe
> > non-atomic phase.
> > > Do you have any idea? Thanks in advance.
> >
> > If you look closely at the driver you used as an example (hidma.c) it looks like
> > there is already something in there, which looks very much like what you need
> > here:
> >
> > In hidma_issue_pending() the driver tries to get the device to runtime resume.
> > If this doesn't work, maybe due to the power domain code not being able to
> > be called in atomic context, the actual work of waking up the dma hardware
> > and issuing the descriptor is shunted to a tasklet.
> >
> > If I'm reading this right, this is exactly what you need here to be able to call the
> > dmaengine code from atomic context: try the rpm get and issue immediately
> > when possible, otherwise shunt the work to a non- atomic context where you
> > can deal with the requirements of scu-pd.
> Yes, I can schedule_work to worker to runtime resume edma channel by calling scu-pd.
> But that means all dmaengine interfaces should be taken care, not only issue_pending()
> but also dmaengine_terminate_all()/dmaengine_pause()/dmaengine_resume()/
> dmaengine_tx_status(). Not sure why hidma only take care issue_pending. Maybe
> their user case is just for memcpy/memset so that no further complicate case as ALSA
> or TTY.
> Besides, for autosuspend in cyclic, we have to add pm_runtime_get_sync into interrupt
> handler as qcom/bam_dma.c. but how could resolve the scu-pd's non-atmoic limitation
> in interrupt handler?
Sure, this all needs some careful analysis on how those functions are
called and what to do about atomic callers, but it should be doable. I
don't see any fundamental issues here.
I don't see why you would ever need to wake the hardware in an
interrupt handler. Surely the hardware is already awake, as it wouldn't
signal an interrupt otherwise. And for the issue with scu-pd you only
care about the state transition of suspended->running. If the hardware
is already running/awake, the runtime pm state handling is nothing more
than bumping a refcount, which is atomic safe. Putting the HW in
suspend is already handled asynchronously in a worker, so this is also
atomic safe.
Regards,
Lucas
Am 17.04.21 um 16:21 schrieb Muchun Song:
> On Sat, Apr 17, 2021 at 9:44 PM <Peter.Enderborg(a)sony.com> wrote:
>> On 4/17/21 3:07 PM, Muchun Song wrote:
>>> On Sat, Apr 17, 2021 at 6:41 PM Peter Enderborg
>>> <peter.enderborg(a)sony.com> wrote:
>>>> This adds a total used dma-buf memory. Details
>>>> can be found in debugfs, however it is not for everyone
>>>> and not always available. dma-buf are indirect allocated by
>>>> userspace. So with this value we can monitor and detect
>>>> userspace applications that have problems.
>>>>
>>>> Signed-off-by: Peter Enderborg <peter.enderborg(a)sony.com>
>>>> ---
>>>> drivers/dma-buf/dma-buf.c | 13 +++++++++++++
>>>> fs/proc/meminfo.c | 5 ++++-
>>>> include/linux/dma-buf.h | 1 +
>>>> 3 files changed, 18 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
>>>> index f264b70c383e..197e5c45dd26 100644
>>>> --- a/drivers/dma-buf/dma-buf.c
>>>> +++ b/drivers/dma-buf/dma-buf.c
>>>> @@ -37,6 +37,7 @@ struct dma_buf_list {
>>>> };
>>>>
>>>> static struct dma_buf_list db_list;
>>>> +static atomic_long_t dma_buf_global_allocated;
>>>>
>>>> static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen)
>>>> {
>>>> @@ -79,6 +80,7 @@ static void dma_buf_release(struct dentry *dentry)
>>>> if (dmabuf->resv == (struct dma_resv *)&dmabuf[1])
>>>> dma_resv_fini(dmabuf->resv);
>>>>
>>>> + atomic_long_sub(dmabuf->size, &dma_buf_global_allocated);
>>>> module_put(dmabuf->owner);
>>>> kfree(dmabuf->name);
>>>> kfree(dmabuf);
>>>> @@ -586,6 +588,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info)
>>>> mutex_lock(&db_list.lock);
>>>> list_add(&dmabuf->list_node, &db_list.head);
>>>> mutex_unlock(&db_list.lock);
>>>> + atomic_long_add(dmabuf->size, &dma_buf_global_allocated);
>>>>
>>>> return dmabuf;
>>>>
>>>> @@ -1346,6 +1349,16 @@ void dma_buf_vunmap(struct dma_buf *dmabuf, struct dma_buf_map *map)
>>>> }
>>>> EXPORT_SYMBOL_GPL(dma_buf_vunmap);
>>>>
>>>> +/**
>>>> + * dma_buf_allocated_pages - Return the used nr of pages
>>>> + * allocated for dma-buf
>>>> + */
>>>> +long dma_buf_allocated_pages(void)
>>>> +{
>>>> + return atomic_long_read(&dma_buf_global_allocated) >> PAGE_SHIFT;
>>>> +}
>>>> +EXPORT_SYMBOL_GPL(dma_buf_allocated_pages);
>>> dma_buf_allocated_pages is only called from fs/proc/meminfo.c.
>>> I am confused why it should be exported. If it won't be called
>>> from the driver module, we should not export it.
>> Ah. I thought you did not want the GPL restriction. I don't have real
>> opinion about it. It's written to be following the rest of the module.
>> It is not needed for the usage of dma-buf in kernel module. But I
>> don't see any reason for hiding it either.
> The modules do not need dma_buf_allocated_pages, hiding it
> can prevent the module from calling it. So I think that
> EXPORT_SYMBOL_GPL is unnecessary. If one day someone
> want to call it from the module, maybe it’s not too late to export
> it at that time.
Yeah, that is a rather good point. Only symbols which should be used by
modules/drivers should be exported.
Christian.
>
>>
>>> Thanks.
>>>
>>>> +
>>>> #ifdef CONFIG_DEBUG_FS
>>>> static int dma_buf_debug_show(struct seq_file *s, void *unused)
>>>> {
>>>> diff --git a/fs/proc/meminfo.c b/fs/proc/meminfo.c
>>>> index 6fa761c9cc78..ccc7c40c8db7 100644
>>>> --- a/fs/proc/meminfo.c
>>>> +++ b/fs/proc/meminfo.c
>>>> @@ -16,6 +16,7 @@
>>>> #ifdef CONFIG_CMA
>>>> #include <linux/cma.h>
>>>> #endif
>>>> +#include <linux/dma-buf.h>
>>>> #include <asm/page.h>
>>>> #include "internal.h"
>>>>
>>>> @@ -145,7 +146,9 @@ static int meminfo_proc_show(struct seq_file *m, void *v)
>>>> show_val_kb(m, "CmaFree: ",
>>>> global_zone_page_state(NR_FREE_CMA_PAGES));
>>>> #endif
>>>> -
>>>> +#ifdef CONFIG_DMA_SHARED_BUFFER
>>>> + show_val_kb(m, "DmaBufTotal: ", dma_buf_allocated_pages());
>>>> +#endif
>>>> hugetlb_report_meminfo(m);
>>>>
>>>> arch_report_meminfo(m);
>>>> diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h
>>>> index efdc56b9d95f..5b05816bd2cd 100644
>>>> --- a/include/linux/dma-buf.h
>>>> +++ b/include/linux/dma-buf.h
>>>> @@ -507,4 +507,5 @@ int dma_buf_mmap(struct dma_buf *, struct vm_area_struct *,
>>>> unsigned long);
>>>> int dma_buf_vmap(struct dma_buf *dmabuf, struct dma_buf_map *map);
>>>> void dma_buf_vunmap(struct dma_buf *dmabuf, struct dma_buf_map *map);
>>>> +long dma_buf_allocated_pages(void);
>>>> #endif /* __DMA_BUF_H__ */
>>>> --
>>>> 2.17.1
>>>>
On Thu, Apr 15, 2021 at 05:40:24PM +0200, Thomas Hellström (Intel) wrote:
>
> On 4/15/21 4:40 PM, Daniel Vetter wrote:
> > On Thu, Apr 15, 2021 at 4:02 PM Thomas Hellström (Intel)
> > <thomas_os(a)shipmail.org> wrote:
> > >
> > > On 4/15/21 3:37 PM, Daniel Vetter wrote:
> > > > On Tue, Apr 13, 2021 at 09:57:06AM +0200, Christian König wrote:
> > > > > Am 13.04.21 um 09:50 schrieb Thomas Hellström:
> > > > > > Hi!
> > > > > >
> > > > > > During the dma_resv conversion of the i915 driver, we've been using ww
> > > > > > transaction lock lists to keep track of ww_mutexes that are locked
> > > > > > during the transaction so that they can be batch unlocked at suitable
> > > > > > locations. Including also the LMEM/VRAM eviction we've ended up with
> > > > > > two static lists per transaction context; one typically unlocked at the
> > > > > > end of transaction and one initialized before and unlocked after each
> > > > > > buffer object validate. This enables us to do sleeping locking at
> > > > > > eviction and keep objects locked on the eviction list until we
> > > > > > eventually succeed allocating memory (modulo minor flaws of course).
> > > > > >
> > > > > > It would be beneficial with the i915 TTM conversion to be able to
> > > > > > introduce a similar functionality that would work in ttm but also
> > > > > > cross-driver in, for example move_notify. It would also be beneficial
> > > > > > to be able to put any dma_resv ww mutex on the lists, and not require
> > > > > > it to be embedded in a particular object type.
> > > > > >
> > > > > > I started scetching on some utilities for this. For TTM, for example,
> > > > > > the idea would be to pass a list head for the ww transaction lock list
> > > > > > in the ttm_operation_ctx. A function taking a ww_mutex could then
> > > > > > either attach a grabbed lock to the list for batch unlocking, or be
> > > > > > responsible for unlocking when the lock's scope is exited. It's also
> > > > > > possible to create sublists if so desired. I believe the below would be
> > > > > > sufficient to cover the i915 functionality.
> > > > > >
> > > > > > Any comments and suggestions appreciated!
> > > > > ah yes Daniel and I haven been discussing something like this for years.
> > > > >
> > > > > I also came up with rough implementation, but we always ran into lifetime
> > > > > issues.
> > > > >
> > > > > In other words the ww_mutexes which are on the list would need to be kept
> > > > > alive until unlocked.
> > > > >
> > > > > Because of this we kind of backed up and said we would need this on the GEM
> > > > > level instead of working with dma_resv objects.
> > > > Yeah there's a few funny concerns here that make this awkward:
> > > > - For simplicity doing these helpers at the gem level should make things a
> > > > bit easier, because then we have a standard way to drop the reference.
> > > > It does mean that the only thing you can lock like this are gem objects,
> > > > but I think that's fine. At least for a first cut.
> > > >
> > > > - This is a bit awkward for vmwgfx, but a) Zack has mentioned he's looking
> > > > into adopting gem bo internally to be able to drop a pile of code and
> > > > stop making vmwgfx the only special-case we have b) drivers which don't
> > > > need this won't need this, so should be fine.
> > > >
> > > > The other awkward thing I guess is that ttm would need to use the
> > > > embedded kref from the gem bo, but that should be transparent I think.
> > > >
> > > > - Next up is dma-buf: For i915 we'd like to do the same eviction trick
> > > > also through p2p dma-buf callbacks, so that this works the same as
> > > > eviction/reservation within a gpu. But for these internal bo you might
> > > > not have a dma-buf, so we can't just lift the trick to the dma-buf
> > > > level. But I think if we pass e.g. a struct list_head and a callback to
> > > > unreference/unlock all the buffers in there to the exporter, plus
> > > > similar for the slowpath lock, then that should be doable without
> > > > glorious layering inversions between dma-buf and gem.
> > > >
> > > > I think for dma-buf it should even be ok if this requires that we
> > > > allocate an entire structure with kmalloc or something, allocating
> > > > memory while holding dma_resv is ok.
> > > Yes, the thing here with the suggested helpers is that you would just
> > > embed a trans_lockitem struct in the gem object (and defines the gem
> > > object ops). Otherwise and for passing to dma-buf this is pretty much
> > > exactly what you are suggesting, but the huge benefit of encapsulating
> > > the needed members like this is that when we need to change something we
> > > change it in just one place.
> > >
> > > For anything that doesn't have a gem object (dma-buf, vmwgfx or
> > > whatever) you have the choice of either allocating a struct
> > > trans_lockitem or embed it wherever you prefer. In particular, this is
> > > beneficial where you have a single dma-resv class ww-mutex sitting
> > > somewhere in the way and you don't want to needlessly have a gem object
> > > that embeds it.
> > The thing is, everyone who actually uses dma_resv_lock has a
> > gem_buffer_object underneath. So it feels a bit like flexibility for
> > no real need, and I think it would make it slightly more awkard for
> > gem drivers to neatly integrate into their cs path. The lockitem
> > struct works, but it is a bit cumbersome.
>
> Well that's partly because of it's impossible to use a standalone ww_mutex
> in a locking transaction that can only add gem objects to the list :/.
> Already in the i915 driver we have and may want to add various places where
> we have dead gem objects sitting because of this.
>
> Also, more importantly, If we pass a list down the dma-buf move_notify(), a
> trans_lockitem is pretty much exactly what we expect back (except of course
> for the private pointer). It would be odd if we'd expect all list items to
> be gem objects when it's a dma-buf interface?
>
> >
> > Also if we add some wrappers to e.g. add a gem_bo to the ctx, then if
> > we decide to slip the lockitem in there, we still only need to touch
> > the helper code, and not all drivers.
>
> Well, yes assuming we always have an embedding gem object for a dma_resv
> that might be true, but either way I don't really expect the gem helpers to
> look very different. We will need the ops anyway and a specialized context
> so if the only thing we're debating is whether or not to embed a struct in
> the gem object, unless you really insist on using the gem object initially,
> I suggest we try this and if it becomes awkward, just
> s/trans_lockitem/drm_gem_object/
Hm yeah I think you convinced me this is a bit a bikeshed :-) Maybe call
it dma_resv_lockitem or so if we go with top-level generic solution. And
then embed it wheterever we feel like.
The annoying thing with tha generic thing is that I'd like to avoid the
full callback pointer in all the gem objects, but maybe another ptr really
doesn't matter on this if we add a linked list anyway ...
-Daniel
>
> /Thomas
>
>
> > -Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
On Thu, Apr 15, 2021 at 4:02 PM Thomas Hellström (Intel)
<thomas_os(a)shipmail.org> wrote:
>
>
> On 4/15/21 3:37 PM, Daniel Vetter wrote:
> > On Tue, Apr 13, 2021 at 09:57:06AM +0200, Christian König wrote:
> >>
> >> Am 13.04.21 um 09:50 schrieb Thomas Hellström:
> >>> Hi!
> >>>
> >>> During the dma_resv conversion of the i915 driver, we've been using ww
> >>> transaction lock lists to keep track of ww_mutexes that are locked
> >>> during the transaction so that they can be batch unlocked at suitable
> >>> locations. Including also the LMEM/VRAM eviction we've ended up with
> >>> two static lists per transaction context; one typically unlocked at the
> >>> end of transaction and one initialized before and unlocked after each
> >>> buffer object validate. This enables us to do sleeping locking at
> >>> eviction and keep objects locked on the eviction list until we
> >>> eventually succeed allocating memory (modulo minor flaws of course).
> >>>
> >>> It would be beneficial with the i915 TTM conversion to be able to
> >>> introduce a similar functionality that would work in ttm but also
> >>> cross-driver in, for example move_notify. It would also be beneficial
> >>> to be able to put any dma_resv ww mutex on the lists, and not require
> >>> it to be embedded in a particular object type.
> >>>
> >>> I started scetching on some utilities for this. For TTM, for example,
> >>> the idea would be to pass a list head for the ww transaction lock list
> >>> in the ttm_operation_ctx. A function taking a ww_mutex could then
> >>> either attach a grabbed lock to the list for batch unlocking, or be
> >>> responsible for unlocking when the lock's scope is exited. It's also
> >>> possible to create sublists if so desired. I believe the below would be
> >>> sufficient to cover the i915 functionality.
> >>>
> >>> Any comments and suggestions appreciated!
> >> ah yes Daniel and I haven been discussing something like this for years.
> >>
> >> I also came up with rough implementation, but we always ran into lifetime
> >> issues.
> >>
> >> In other words the ww_mutexes which are on the list would need to be kept
> >> alive until unlocked.
> >>
> >> Because of this we kind of backed up and said we would need this on the GEM
> >> level instead of working with dma_resv objects.
> > Yeah there's a few funny concerns here that make this awkward:
> > - For simplicity doing these helpers at the gem level should make things a
> > bit easier, because then we have a standard way to drop the reference.
> > It does mean that the only thing you can lock like this are gem objects,
> > but I think that's fine. At least for a first cut.
> >
> > - This is a bit awkward for vmwgfx, but a) Zack has mentioned he's looking
> > into adopting gem bo internally to be able to drop a pile of code and
> > stop making vmwgfx the only special-case we have b) drivers which don't
> > need this won't need this, so should be fine.
> >
> > The other awkward thing I guess is that ttm would need to use the
> > embedded kref from the gem bo, but that should be transparent I think.
> >
> > - Next up is dma-buf: For i915 we'd like to do the same eviction trick
> > also through p2p dma-buf callbacks, so that this works the same as
> > eviction/reservation within a gpu. But for these internal bo you might
> > not have a dma-buf, so we can't just lift the trick to the dma-buf
> > level. But I think if we pass e.g. a struct list_head and a callback to
> > unreference/unlock all the buffers in there to the exporter, plus
> > similar for the slowpath lock, then that should be doable without
> > glorious layering inversions between dma-buf and gem.
> >
> > I think for dma-buf it should even be ok if this requires that we
> > allocate an entire structure with kmalloc or something, allocating
> > memory while holding dma_resv is ok.
>
> Yes, the thing here with the suggested helpers is that you would just
> embed a trans_lockitem struct in the gem object (and defines the gem
> object ops). Otherwise and for passing to dma-buf this is pretty much
> exactly what you are suggesting, but the huge benefit of encapsulating
> the needed members like this is that when we need to change something we
> change it in just one place.
>
> For anything that doesn't have a gem object (dma-buf, vmwgfx or
> whatever) you have the choice of either allocating a struct
> trans_lockitem or embed it wherever you prefer. In particular, this is
> beneficial where you have a single dma-resv class ww-mutex sitting
> somewhere in the way and you don't want to needlessly have a gem object
> that embeds it.
The thing is, everyone who actually uses dma_resv_lock has a
gem_buffer_object underneath. So it feels a bit like flexibility for
no real need, and I think it would make it slightly more awkard for
gem drivers to neatly integrate into their cs path. The lockitem
struct works, but it is a bit cumbersome.
Also if we add some wrappers to e.g. add a gem_bo to the ctx, then if
we decide to slip the lockitem in there, we still only need to touch
the helper code, and not all drivers.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
Am 13.04.21 um 09:50 schrieb Thomas Hellström:
> Hi!
>
> During the dma_resv conversion of the i915 driver, we've been using ww
> transaction lock lists to keep track of ww_mutexes that are locked
> during the transaction so that they can be batch unlocked at suitable
> locations. Including also the LMEM/VRAM eviction we've ended up with
> two static lists per transaction context; one typically unlocked at the
> end of transaction and one initialized before and unlocked after each
> buffer object validate. This enables us to do sleeping locking at
> eviction and keep objects locked on the eviction list until we
> eventually succeed allocating memory (modulo minor flaws of course).
>
> It would be beneficial with the i915 TTM conversion to be able to
> introduce a similar functionality that would work in ttm but also
> cross-driver in, for example move_notify. It would also be beneficial
> to be able to put any dma_resv ww mutex on the lists, and not require
> it to be embedded in a particular object type.
>
> I started scetching on some utilities for this. For TTM, for example,
> the idea would be to pass a list head for the ww transaction lock list
> in the ttm_operation_ctx. A function taking a ww_mutex could then
> either attach a grabbed lock to the list for batch unlocking, or be
> responsible for unlocking when the lock's scope is exited. It's also
> possible to create sublists if so desired. I believe the below would be
> sufficient to cover the i915 functionality.
>
> Any comments and suggestions appreciated!
ah yes Daniel and I haven been discussing something like this for years.
I also came up with rough implementation, but we always ran into
lifetime issues.
In other words the ww_mutexes which are on the list would need to be
kept alive until unlocked.
Because of this we kind of backed up and said we would need this on the
GEM level instead of working with dma_resv objects.
Regards,
Christian.
>
> 8<------------------------------------------------------
>
> #ifndef _TRANSACTION_LOCKLIST_H_
> #define _TRANSACTION_LOCKLIST_H_
>
> struct trans_lockitem;
>
> /**
> * struct trans_locklist_ops - Ops structure for the ww locklist
> functionality.
> *
> * Typically a const struct trans_locklist_ops is defined for each type
> that
> * embeds a struct trans_lockitem, or hav a struct trans_lockitem
> pointing
> * at it using the private pointer. It can be a buffer object,
> reservation
> * object, a single ww_mutex or even a sublist of trans_lockitems.
> */
> struct trans_locklist_ops {
> /**
> * slow_lock: Slow lock to relax the transaction. Only used by
> * a contending lock item.
> * @item: The struct trans_lockitem to lock
> * @intr: Whether to lock interruptible
> *
> * Return: -ERESTARTSYS: Hit a signal when relaxing,
> * -EAGAIN, relaxing succesful, but the contending lock
> * remains unlocked.
> */
> int (*slow_lock) (struct trans_lockitem *item, bool intr);
>
> /**
> * unlock: Unlock.
> * @item: The struct trans_lockitem to unlock.
> */
> void (*unlock) (struct trans_lockitem *item);
>
> /**
> * unlock: Unlock.
> * @item: The struct trans_lockitem to put. This function may
> be NULL.
> */
> void (*put) (struct trans_lockitem *item);
> };
>
> /**
> * struct trans_lockitem
> * @ops: Pointer to an Ops structure for this lockitem.
> * @link: List link for the transaction locklist.
> * @private: Private info.
> * @relax_unlock: Unlock contending lock after relaxation since it is
> * likely not needed after a transaction restart.
> *
> * A struct trans_lockitem typically represents a single lock, but is
> * generic enough to represent a sublist of locks. It can either be
> * embedded, or allocated on demand. A kmem_cache might be beneficial.
> */
> struct trans_lockitem {
> const struct trans_locklist_ops *ops;
> struct list_head link;
> u32 relax_unlock:1;
> void *private;
> };
>
> /* unlock example */
> static inline void trans_unlock_put_all(struct list_head *list)
> {
> struct trans_lockitem *lock, *next;
>
> list_for_each_entry_safe(lock, next, typeof(*lock), link) {
> lock->ops->unlock(lock);
> list_del_init(&lock->link);
> if (lock->ops_put)
> lock->ops->put(lock);
> }
> }
>
> /* Backoff example */
> static inline int __must_check trans_backoff(struct list_head *list,
> bool intr,
> struct trans_lockitem
> *contending)
> {
> int ret = 0;
>
> trans_unlock_put_all(list);
> if (contending) {
> ret = contending->ops->slow_lock(contending, intr);
> if (!ret && contending->relax_unlock)
> contending->unlock(contending);
> if (ret == -EAGAIN)
> ret = 0;
> contending->ops->put(contending);
> }
>
> return ret;
> }
>
>
> #endif _TRANSACTION_LOCKLIST_
>
>
tldr; DMA buffers aren't normal memory, expecting that you can use
them like that (like calling get_user_pages works, or that they're
accounting like any other normal memory) cannot be guaranteed.
Since some userspace only runs on integrated devices, where all
buffers are actually all resident system memory, there's a huge
temptation to assume that a struct page is always present and useable
like for any more pagecache backed mmap. This has the potential to
result in a uapi nightmare.
To stop this gap require that DMA buffer mmaps are VM_PFNMAP, which
blocks get_user_pages and all the other struct page based
infrastructure for everyone. In spirit this is the uapi counterpart to
the kernel-internal CONFIG_DMABUF_DEBUG.
Motivated by a recent patch which wanted to swich the system dma-buf
heap to vm_insert_page instead of vm_insert_pfn.
v2:
Jason brought up that we also want to guarantee that all ptes have the
pte_special flag set, to catch fast get_user_pages (on architectures
that support this). Allowing VM_MIXEDMAP (like VM_SPECIAL does) would
still allow vm_insert_page, but limiting to VM_PFNMAP will catch that.
>From auditing the various functions to insert pfn pte entires
(vm_insert_pfn_prot, remap_pfn_range and all it's callers like
dma_mmap_wc) it looks like VM_PFNMAP is already required anyway, so
this should be the correct flag to check for.
References: https://lore.kernel.org/lkml/CAKMK7uHi+mG0z0HUmNt13QCCvutuRVjpcR0NjRL12k-Wb…
Acked-by: Christian König <christian.koenig(a)amd.com>
Cc: Jason Gunthorpe <jgg(a)ziepe.ca>
Cc: Suren Baghdasaryan <surenb(a)google.com>
Cc: Matthew Wilcox <willy(a)infradead.org>
Cc: John Stultz <john.stultz(a)linaro.org>
Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com>
Cc: Sumit Semwal <sumit.semwal(a)linaro.org>
Cc: "Christian König" <christian.koenig(a)amd.com>
Cc: linux-media(a)vger.kernel.org
Cc: linaro-mm-sig(a)lists.linaro.org
---
drivers/dma-buf/dma-buf.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index f264b70c383e..06cb1d2e9fdc 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -127,6 +127,7 @@ static struct file_system_type dma_buf_fs_type = {
static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma)
{
struct dma_buf *dmabuf;
+ int ret;
if (!is_dma_buf_file(file))
return -EINVAL;
@@ -142,7 +143,11 @@ static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma)
dmabuf->size >> PAGE_SHIFT)
return -EINVAL;
- return dmabuf->ops->mmap(dmabuf, vma);
+ ret = dmabuf->ops->mmap(dmabuf, vma);
+
+ WARN_ON(!(vma->vm_flags & VM_PFNMAP));
+
+ return ret;
}
static loff_t dma_buf_llseek(struct file *file, loff_t offset, int whence)
@@ -1244,6 +1249,8 @@ EXPORT_SYMBOL_GPL(dma_buf_end_cpu_access);
int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma,
unsigned long pgoff)
{
+ int ret;
+
if (WARN_ON(!dmabuf || !vma))
return -EINVAL;
@@ -1264,7 +1271,11 @@ int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma,
vma_set_file(vma, dmabuf->file);
vma->vm_pgoff = pgoff;
- return dmabuf->ops->mmap(dmabuf, vma);
+ ret = dmabuf->ops->mmap(dmabuf, vma);
+
+ WARN_ON(!(vma->vm_flags & VM_PFNMAP));
+
+ return ret;
}
EXPORT_SYMBOL_GPL(dma_buf_mmap);
--
2.31.0
On Fri, Apr 02, 2021 at 02:39:31PM +0530, Nava kishore Manne wrote:
> Add "fpga-config-from-dmabuf" property to allow the bitstream
> configuration from pre-allocated dma-buffer.
>
> Signed-off-by: Nava kishore Manne <nava.manne(a)xilinx.com>
> ---
> Documentation/devicetree/bindings/fpga/fpga-region.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> index 969ca53bb65e..c573cf258d60 100644
> --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> @@ -177,6 +177,8 @@ Optional properties:
> it indicates that the FPGA has already been programmed with this image.
> If this property is in an overlay targeting a FPGA region, it is a
> request to program the FPGA with that image.
> +- fpga-config-from-dmabuf : boolean, set if the FPGA configured done from the
> + pre-allocated dma-buffer.
Sounds like an implementation detail of the OS. Doesn't belong in DT.
Rob
> - fpga-bridges : should contain a list of phandles to FPGA Bridges that must be
> controlled during FPGA programming along with the parent FPGA bridge.
> This property is optional if the FPGA Manager handles the bridges.
> --
> 2.18.0
>
From: David Stevens <stevensd(a)chromium.org>
Allocate a new private stub fence in drm_syncobj_assign_null_handle,
instead of using a static stub fence.
When userspace creates a fence with DRM_SYNCOBJ_CREATE_SIGNALED or when
userspace signals a fence via DRM_IOCTL_SYNCOBJ_SIGNAL, the timestamp
obtained when the fence is exported and queried with SYNC_IOC_FILE_INFO
should match when the fence's status was changed from the perspective of
userspace, which is during the respective ioctl.
When a static stub fence started being used in by these ioctls, this
behavior changed. Instead, the timestamp returned by SYNC_IOC_FILE_INFO
became the first time anything used the static stub fence, which has no
meaning to userspace.
Signed-off-by: David Stevens <stevensd(a)chromium.org>
---
drivers/dma-buf/dma-fence.c | 33 ++++++++++++++++++++++++++++++++-
drivers/gpu/drm/drm_syncobj.c | 28 ++++++++++++++++++++--------
include/linux/dma-fence.h | 1 +
3 files changed, 53 insertions(+), 9 deletions(-)
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index d64fc03929be..6081eb962490 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -26,6 +26,11 @@ EXPORT_TRACEPOINT_SYMBOL(dma_fence_signaled);
static DEFINE_SPINLOCK(dma_fence_stub_lock);
static struct dma_fence dma_fence_stub;
+struct drm_fence_private_stub {
+ struct dma_fence base;
+ spinlock_t lock;
+};
+
/*
* fence context counter: each execution context should have its own
* fence context, this allows checking if fences belong to the same
@@ -123,7 +128,9 @@ static const struct dma_fence_ops dma_fence_stub_ops = {
/**
* dma_fence_get_stub - return a signaled fence
*
- * Return a stub fence which is already signaled.
+ * Return a stub fence which is already signaled. The fence's
+ * timestamp corresponds to the first time after boot this
+ * function is called.
*/
struct dma_fence *dma_fence_get_stub(void)
{
@@ -141,6 +148,30 @@ struct dma_fence *dma_fence_get_stub(void)
}
EXPORT_SYMBOL(dma_fence_get_stub);
+/**
+ * dma_fence_allocate_private_stub - return a private, signaled fence
+ *
+ * Return a newly allocated and signaled stub fence.
+ */
+struct dma_fence *dma_fence_allocate_private_stub(void)
+{
+ struct drm_fence_private_stub *fence;
+
+ fence = kzalloc(sizeof(*fence), GFP_KERNEL);
+ if (fence == NULL)
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock_init(&fence->lock);
+ dma_fence_init(&fence->base,
+ &dma_fence_stub_ops,
+ &fence->lock,
+ 0, 0);
+ dma_fence_signal(&fence->base);
+
+ return &fence->base;
+}
+EXPORT_SYMBOL(dma_fence_allocate_private_stub);
+
/**
* dma_fence_context_alloc - allocate an array of fence contexts
* @num: amount of contexts to allocate
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 349146049849..c6125e57ae37 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -350,12 +350,15 @@ EXPORT_SYMBOL(drm_syncobj_replace_fence);
*
* Assign a already signaled stub fence to the sync object.
*/
-static void drm_syncobj_assign_null_handle(struct drm_syncobj *syncobj)
+static int drm_syncobj_assign_null_handle(struct drm_syncobj *syncobj)
{
- struct dma_fence *fence = dma_fence_get_stub();
+ struct dma_fence *fence = dma_fence_allocate_private_stub();
+ if (IS_ERR(fence))
+ return PTR_ERR(fence);
- drm_syncobj_replace_fence(syncobj, fence);
- dma_fence_put(fence);
+ drm_syncobj_replace_fence(syncobj, fence);
+ dma_fence_put(fence);
+ return 0;
}
/* 5s default for wait submission */
@@ -469,6 +472,7 @@ EXPORT_SYMBOL(drm_syncobj_free);
int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags,
struct dma_fence *fence)
{
+ int ret;
struct drm_syncobj *syncobj;
syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
@@ -479,8 +483,13 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags,
INIT_LIST_HEAD(&syncobj->cb_list);
spin_lock_init(&syncobj->lock);
- if (flags & DRM_SYNCOBJ_CREATE_SIGNALED)
- drm_syncobj_assign_null_handle(syncobj);
+ if (flags & DRM_SYNCOBJ_CREATE_SIGNALED) {
+ ret = drm_syncobj_assign_null_handle(syncobj);
+ if (ret < 0) {
+ drm_syncobj_put(syncobj);
+ return ret;
+ }
+ }
if (fence)
drm_syncobj_replace_fence(syncobj, fence);
@@ -1322,8 +1331,11 @@ drm_syncobj_signal_ioctl(struct drm_device *dev, void *data,
if (ret < 0)
return ret;
- for (i = 0; i < args->count_handles; i++)
- drm_syncobj_assign_null_handle(syncobjs[i]);
+ for (i = 0; i < args->count_handles; i++) {
+ ret = drm_syncobj_assign_null_handle(syncobjs[i]);
+ if (ret < 0)
+ break;
+ }
drm_syncobj_array_free(syncobjs, args->count_handles);
diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
index 9f12efaaa93a..6ffb4b2c6371 100644
--- a/include/linux/dma-fence.h
+++ b/include/linux/dma-fence.h
@@ -587,6 +587,7 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
}
struct dma_fence *dma_fence_get_stub(void);
+struct dma_fence *dma_fence_allocate_private_stub(void);
u64 dma_fence_context_alloc(unsigned num);
#define DMA_FENCE_TRACE(f, fmt, args...) \
--
2.31.0.208.g409f899ff0-goog
From: David Stevens <stevensd(a)chromium.org>
Allocate a new private stub fence in drm_syncobj_assign_null_handle,
instead of using a static stub fence.
When userspace creates a fence with DRM_SYNCOBJ_CREATE_SIGNALED or when
userspace signals a fence via DRM_IOCTL_SYNCOBJ_SIGNAL, the timestamp
obtained when the fence is exported and queried with SYNC_IOC_FILE_INFO
should match when the fence's status was changed from the perspective of
userspace, which is during the respective ioctl.
When a static stub fence started being used in by these ioctls, this
behavior changed. Instead, the timestamp returned by SYNC_IOC_FILE_INFO
became the first time anything used the static stub fence, which has no
meaning to userspace.
Signed-off-by: David Stevens <stevensd(a)chromium.org>
---
v2 -> v3:
- reuse the static stub spinlock
v1 -> v2:
- checkpatch style fixes
drivers/dma-buf/dma-fence.c | 27 ++++++++++++++++++++++++++-
drivers/gpu/drm/drm_syncobj.c | 25 +++++++++++++++++++------
include/linux/dma-fence.h | 1 +
3 files changed, 46 insertions(+), 7 deletions(-)
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index d64fc03929be..ce0f5eff575d 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -123,7 +123,9 @@ static const struct dma_fence_ops dma_fence_stub_ops = {
/**
* dma_fence_get_stub - return a signaled fence
*
- * Return a stub fence which is already signaled.
+ * Return a stub fence which is already signaled. The fence's
+ * timestamp corresponds to the first time after boot this
+ * function is called.
*/
struct dma_fence *dma_fence_get_stub(void)
{
@@ -141,6 +143,29 @@ struct dma_fence *dma_fence_get_stub(void)
}
EXPORT_SYMBOL(dma_fence_get_stub);
+/**
+ * dma_fence_allocate_private_stub - return a private, signaled fence
+ *
+ * Return a newly allocated and signaled stub fence.
+ */
+struct dma_fence *dma_fence_allocate_private_stub(void)
+{
+ struct dma_fence *fence;
+
+ fence = kzalloc(sizeof(*fence), GFP_KERNEL);
+ if (fence == NULL)
+ return ERR_PTR(-ENOMEM);
+
+ dma_fence_init(fence,
+ &dma_fence_stub_ops,
+ &dma_fence_stub_lock,
+ 0, 0);
+ dma_fence_signal(fence);
+
+ return fence;
+}
+EXPORT_SYMBOL(dma_fence_allocate_private_stub);
+
/**
* dma_fence_context_alloc - allocate an array of fence contexts
* @num: amount of contexts to allocate
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 349146049849..a54aa850d143 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -350,12 +350,16 @@ EXPORT_SYMBOL(drm_syncobj_replace_fence);
*
* Assign a already signaled stub fence to the sync object.
*/
-static void drm_syncobj_assign_null_handle(struct drm_syncobj *syncobj)
+static int drm_syncobj_assign_null_handle(struct drm_syncobj *syncobj)
{
- struct dma_fence *fence = dma_fence_get_stub();
+ struct dma_fence *fence = dma_fence_allocate_private_stub();
+
+ if (IS_ERR(fence))
+ return PTR_ERR(fence);
drm_syncobj_replace_fence(syncobj, fence);
dma_fence_put(fence);
+ return 0;
}
/* 5s default for wait submission */
@@ -469,6 +473,7 @@ EXPORT_SYMBOL(drm_syncobj_free);
int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags,
struct dma_fence *fence)
{
+ int ret;
struct drm_syncobj *syncobj;
syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
@@ -479,8 +484,13 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags,
INIT_LIST_HEAD(&syncobj->cb_list);
spin_lock_init(&syncobj->lock);
- if (flags & DRM_SYNCOBJ_CREATE_SIGNALED)
- drm_syncobj_assign_null_handle(syncobj);
+ if (flags & DRM_SYNCOBJ_CREATE_SIGNALED) {
+ ret = drm_syncobj_assign_null_handle(syncobj);
+ if (ret < 0) {
+ drm_syncobj_put(syncobj);
+ return ret;
+ }
+ }
if (fence)
drm_syncobj_replace_fence(syncobj, fence);
@@ -1322,8 +1332,11 @@ drm_syncobj_signal_ioctl(struct drm_device *dev, void *data,
if (ret < 0)
return ret;
- for (i = 0; i < args->count_handles; i++)
- drm_syncobj_assign_null_handle(syncobjs[i]);
+ for (i = 0; i < args->count_handles; i++) {
+ ret = drm_syncobj_assign_null_handle(syncobjs[i]);
+ if (ret < 0)
+ break;
+ }
drm_syncobj_array_free(syncobjs, args->count_handles);
diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
index 9f12efaaa93a..6ffb4b2c6371 100644
--- a/include/linux/dma-fence.h
+++ b/include/linux/dma-fence.h
@@ -587,6 +587,7 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
}
struct dma_fence *dma_fence_get_stub(void);
+struct dma_fence *dma_fence_allocate_private_stub(void);
u64 dma_fence_context_alloc(unsigned num);
#define DMA_FENCE_TRACE(f, fmt, args...) \
--
2.31.0.208.g409f899ff0-goog
From: David Stevens <stevensd(a)chromium.org>
Allocate a new private stub fence in drm_syncobj_assign_null_handle,
instead of using a static stub fence.
When userspace creates a fence with DRM_SYNCOBJ_CREATE_SIGNALED or when
userspace signals a fence via DRM_IOCTL_SYNCOBJ_SIGNAL, the timestamp
obtained when the fence is exported and queried with SYNC_IOC_FILE_INFO
should match when the fence's status was changed from the perspective of
userspace, which is during the respective ioctl.
When a static stub fence started being used in by these ioctls, this
behavior changed. Instead, the timestamp returned by SYNC_IOC_FILE_INFO
became the first time anything used the static stub fence, which has no
meaning to userspace.
Signed-off-by: David Stevens <stevensd(a)chromium.org>
---
v1 -> v2:
- checkpatch style fixes
drivers/dma-buf/dma-fence.c | 33 ++++++++++++++++++++++++++++++++-
drivers/gpu/drm/drm_syncobj.c | 25 +++++++++++++++++++------
include/linux/dma-fence.h | 1 +
3 files changed, 52 insertions(+), 7 deletions(-)
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index d64fc03929be..6081eb962490 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -26,6 +26,11 @@ EXPORT_TRACEPOINT_SYMBOL(dma_fence_signaled);
static DEFINE_SPINLOCK(dma_fence_stub_lock);
static struct dma_fence dma_fence_stub;
+struct drm_fence_private_stub {
+ struct dma_fence base;
+ spinlock_t lock;
+};
+
/*
* fence context counter: each execution context should have its own
* fence context, this allows checking if fences belong to the same
@@ -123,7 +128,9 @@ static const struct dma_fence_ops dma_fence_stub_ops = {
/**
* dma_fence_get_stub - return a signaled fence
*
- * Return a stub fence which is already signaled.
+ * Return a stub fence which is already signaled. The fence's
+ * timestamp corresponds to the first time after boot this
+ * function is called.
*/
struct dma_fence *dma_fence_get_stub(void)
{
@@ -141,6 +148,30 @@ struct dma_fence *dma_fence_get_stub(void)
}
EXPORT_SYMBOL(dma_fence_get_stub);
+/**
+ * dma_fence_allocate_private_stub - return a private, signaled fence
+ *
+ * Return a newly allocated and signaled stub fence.
+ */
+struct dma_fence *dma_fence_allocate_private_stub(void)
+{
+ struct drm_fence_private_stub *fence;
+
+ fence = kzalloc(sizeof(*fence), GFP_KERNEL);
+ if (fence == NULL)
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock_init(&fence->lock);
+ dma_fence_init(&fence->base,
+ &dma_fence_stub_ops,
+ &fence->lock,
+ 0, 0);
+ dma_fence_signal(&fence->base);
+
+ return &fence->base;
+}
+EXPORT_SYMBOL(dma_fence_allocate_private_stub);
+
/**
* dma_fence_context_alloc - allocate an array of fence contexts
* @num: amount of contexts to allocate
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 349146049849..a54aa850d143 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -350,12 +350,16 @@ EXPORT_SYMBOL(drm_syncobj_replace_fence);
*
* Assign a already signaled stub fence to the sync object.
*/
-static void drm_syncobj_assign_null_handle(struct drm_syncobj *syncobj)
+static int drm_syncobj_assign_null_handle(struct drm_syncobj *syncobj)
{
- struct dma_fence *fence = dma_fence_get_stub();
+ struct dma_fence *fence = dma_fence_allocate_private_stub();
+
+ if (IS_ERR(fence))
+ return PTR_ERR(fence);
drm_syncobj_replace_fence(syncobj, fence);
dma_fence_put(fence);
+ return 0;
}
/* 5s default for wait submission */
@@ -469,6 +473,7 @@ EXPORT_SYMBOL(drm_syncobj_free);
int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags,
struct dma_fence *fence)
{
+ int ret;
struct drm_syncobj *syncobj;
syncobj = kzalloc(sizeof(struct drm_syncobj), GFP_KERNEL);
@@ -479,8 +484,13 @@ int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags,
INIT_LIST_HEAD(&syncobj->cb_list);
spin_lock_init(&syncobj->lock);
- if (flags & DRM_SYNCOBJ_CREATE_SIGNALED)
- drm_syncobj_assign_null_handle(syncobj);
+ if (flags & DRM_SYNCOBJ_CREATE_SIGNALED) {
+ ret = drm_syncobj_assign_null_handle(syncobj);
+ if (ret < 0) {
+ drm_syncobj_put(syncobj);
+ return ret;
+ }
+ }
if (fence)
drm_syncobj_replace_fence(syncobj, fence);
@@ -1322,8 +1332,11 @@ drm_syncobj_signal_ioctl(struct drm_device *dev, void *data,
if (ret < 0)
return ret;
- for (i = 0; i < args->count_handles; i++)
- drm_syncobj_assign_null_handle(syncobjs[i]);
+ for (i = 0; i < args->count_handles; i++) {
+ ret = drm_syncobj_assign_null_handle(syncobjs[i]);
+ if (ret < 0)
+ break;
+ }
drm_syncobj_array_free(syncobjs, args->count_handles);
diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
index 9f12efaaa93a..6ffb4b2c6371 100644
--- a/include/linux/dma-fence.h
+++ b/include/linux/dma-fence.h
@@ -587,6 +587,7 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
}
struct dma_fence *dma_fence_get_stub(void);
+struct dma_fence *dma_fence_allocate_private_stub(void);
u64 dma_fence_context_alloc(unsigned num);
#define DMA_FENCE_TRACE(f, fmt, args...) \
--
2.31.0.208.g409f899ff0-goog
Hi Qu,
Am 02.04.21 um 05:18 schrieb Qu Huang:
> Before dma_resv_lock(bo->base.resv, NULL) in amdgpu_bo_release_notify(),
> the bo->base.resv lock may be held by ttm_mem_evict_first(),
That can't happen since when bo_release_notify is called the BO has not
more references and is therefore deleted.
And we never evict a deleted BO, we just wait for it to become idle.
Regards,
Christian.
> and the VRAM mem will be evicted, mem region was replaced
> by Gtt mem region. amdgpu_bo_release_notify() will then
> hold the bo->base.resv lock, and SDMA will get an invalid
> address in amdgpu_fill_buffer(), resulting in a VMFAULT
> or memory corruption.
>
> To avoid it, we have to hold bo->base.resv lock first, and
> check whether the mem.mem_type is TTM_PL_VRAM.
>
> Signed-off-by: Qu Huang <jinsdb(a)126.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 4b29b82..8018574 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -1300,12 +1300,16 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
> if (bo->base.resv == &bo->base._resv)
> amdgpu_amdkfd_remove_fence_on_pt_pd_bos(abo);
>
> - if (bo->mem.mem_type != TTM_PL_VRAM || !bo->mem.mm_node ||
> - !(abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE))
> + if (!(abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE))
> return;
>
> dma_resv_lock(bo->base.resv, NULL);
>
> + if (bo->mem.mem_type != TTM_PL_VRAM || !bo->mem.mm_node) {
> + dma_resv_unlock(bo->base.resv);
> + return;
> + }
> +
> r = amdgpu_fill_buffer(abo, AMDGPU_POISON, bo->base.resv, &fence);
> if (!WARN_ON(r)) {
> amdgpu_bo_fence(abo, fence, false);
> --
> 1.8.3.1
>
On Thu, Apr 1, 2021 at 8:34 AM Doug Anderson <dianders(a)chromium.org> wrote:
>
> Hi,
>
> On Wed, Mar 31, 2021 at 6:24 PM Rob Clark <robdclark(a)gmail.com> wrote:
> >
> > @@ -45,6 +30,9 @@ msm_gem_shrinker_scan(struct shrinker *shrinker, struct shrink_control *sc)
> > list_for_each_entry(msm_obj, &priv->inactive_dontneed, mm_list) {
> > if (freed >= sc->nr_to_scan)
> > break;
> > + /* Use trylock, because we cannot block on a obj that
> > + * might be trying to acquire mm_lock
> > + */
>
> nit: I thought the above multi-line commenting style was only for
> "net" subsystem?
we do use the "net" style a fair bit already.. (OTOH I tend to not
really care what checkpatch says)
> > if (!msm_gem_trylock(&msm_obj->base))
> > continue;
> > if (is_purgeable(msm_obj)) {
> > @@ -56,8 +44,11 @@ msm_gem_shrinker_scan(struct shrinker *shrinker, struct shrink_control *sc)
> >
> > mutex_unlock(&priv->mm_lock);
> >
> > - if (freed > 0)
> > + if (freed > 0) {
> > trace_msm_gem_purge(freed << PAGE_SHIFT);
> > + } else {
> > + return SHRINK_STOP;
> > + }
>
> It probably doesn't matter, but I wonder if we should still be
> returning SHRINK_STOP if we got any trylock failures. It could
> possibly be worth returning 0 in that case?
On the surface, you'd think that, but there be mm dragons.. we can hit
shrinker from the submit path when the obj is locked already and we
are trying to allocate backing pages. We don't want to tell vmscan to
keep trying, because we'll keep failing to grab that objects lock
>
> > @@ -75,6 +66,9 @@ vmap_shrink(struct list_head *mm_list)
> > unsigned unmapped = 0;
> >
> > list_for_each_entry(msm_obj, mm_list, mm_list) {
> > + /* Use trylock, because we cannot block on a obj that
> > + * might be trying to acquire mm_lock
> > + */
>
> If you end up changing the commenting style above, should also be here.
>
> At this point this seems fine to land to me. Though I'm not an expert
> on every interaction in this code, I've spent enough time starting at
> it that I'm comfortable with:
>
> Reviewed-by: Douglas Anderson <dianders(a)chromium.org>
thanks
BR,
-R
From: Rob Clark <robdclark(a)chromium.org>
I've been spending some time looking into how things behave under high
memory pressure. The first patch is a random cleanup I noticed along
the way. The second improves the situation significantly when we are
getting shrinker called from many threads in parallel. And the last
two are $debugfs/gem fixes I needed so I could monitor the state of GEM
objects (ie. how many are active/purgable/purged) while triggering high
memory pressure.
We could probably go a bit further with dropping the mm_lock in the
shrinker->scan() loop, but this is already a pretty big improvement.
The next step is probably actually to add support to unpin/evict
inactive objects. (We are part way there since we have already de-
coupled the iova lifetime from the pages lifetime, but there are a
few sharp corners to work through.)
Rob Clark (4):
drm/msm: Remove unused freed llist node
drm/msm: Avoid mutex in shrinker_count()
drm/msm: Fix debugfs deadlock
drm/msm: Improved debugfs gem stats
drivers/gpu/drm/msm/msm_debugfs.c | 14 ++---
drivers/gpu/drm/msm/msm_drv.c | 4 ++
drivers/gpu/drm/msm/msm_drv.h | 15 ++++--
drivers/gpu/drm/msm/msm_fb.c | 3 +-
drivers/gpu/drm/msm/msm_gem.c | 65 ++++++++++++++++++-----
drivers/gpu/drm/msm/msm_gem.h | 72 +++++++++++++++++++++++---
drivers/gpu/drm/msm/msm_gem_shrinker.c | 28 ++++------
7 files changed, 150 insertions(+), 51 deletions(-)
--
2.30.2
Applied. Thanks!
Alex
On Thu, Mar 25, 2021 at 5:26 AM Nirmoy <nirmodas(a)amd.com> wrote:
>
>
> Reviewed-by: Nirmoy Das<nirmoy.das(a)amd.com>
>
> On 3/25/21 9:53 AM, Bhaskar Chowdhury wrote:
> > s/acccess/access/
> > s/inferface/interface/
> > s/sequnce/sequence/ .....two different places.
> > s/retrive/retrieve/
> > s/sheduling/scheduling/
> > s/independant/independent/
> > s/wether/whether/ ......two different places.
> > s/emmit/emit/
> > s/synce/sync/
> >
> >
> > Signed-off-by: Bhaskar Chowdhury <unixbhaskar(a)gmail.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 22 +++++++++++-----------
> > 1 file changed, 11 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> > index a368724c3dfc..4502b95ddf6b 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> > @@ -1877,7 +1877,7 @@ static void gfx_v7_0_init_compute_vmid(struct amdgpu_device *adev)
> > mutex_unlock(&adev->srbm_mutex);
> >
> > /* Initialize all compute VMIDs to have no GDS, GWS, or OA
> > - acccess. These should be enabled by FW for target VMIDs. */
> > + access. These should be enabled by FW for target VMIDs. */
> > for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) {
> > WREG32(amdgpu_gds_reg_offset[i].mem_base, 0);
> > WREG32(amdgpu_gds_reg_offset[i].mem_size, 0);
> > @@ -2058,7 +2058,7 @@ static void gfx_v7_0_constants_init(struct amdgpu_device *adev)
> > * @adev: amdgpu_device pointer
> > *
> > * Set up the number and offset of the CP scratch registers.
> > - * NOTE: use of CP scratch registers is a legacy inferface and
> > + * NOTE: use of CP scratch registers is a legacy interface and
> > * is not used by default on newer asics (r6xx+). On newer asics,
> > * memory buffers are used for fences rather than scratch regs.
> > */
> > @@ -2172,7 +2172,7 @@ static void gfx_v7_0_ring_emit_vgt_flush(struct amdgpu_ring *ring)
> > * @seq: sequence number
> > * @flags: fence related flags
> > *
> > - * Emits a fence sequnce number on the gfx ring and flushes
> > + * Emits a fence sequence number on the gfx ring and flushes
> > * GPU caches.
> > */
> > static void gfx_v7_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
> > @@ -2215,7 +2215,7 @@ static void gfx_v7_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
> > * @seq: sequence number
> > * @flags: fence related flags
> > *
> > - * Emits a fence sequnce number on the compute ring and flushes
> > + * Emits a fence sequence number on the compute ring and flushes
> > * GPU caches.
> > */
> > static void gfx_v7_0_ring_emit_fence_compute(struct amdgpu_ring *ring,
> > @@ -2245,14 +2245,14 @@ static void gfx_v7_0_ring_emit_fence_compute(struct amdgpu_ring *ring,
> > * gfx_v7_0_ring_emit_ib - emit an IB (Indirect Buffer) on the ring
> > *
> > * @ring: amdgpu_ring structure holding ring information
> > - * @job: job to retrive vmid from
> > + * @job: job to retrieve vmid from
> > * @ib: amdgpu indirect buffer object
> > * @flags: options (AMDGPU_HAVE_CTX_SWITCH)
> > *
> > * Emits an DE (drawing engine) or CE (constant engine) IB
> > * on the gfx ring. IBs are usually generated by userspace
> > * acceleration drivers and submitted to the kernel for
> > - * sheduling on the ring. This function schedules the IB
> > + * scheduling on the ring. This function schedules the IB
> > * on the gfx ring for execution by the GPU.
> > */
> > static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
> > @@ -2402,7 +2402,7 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
> >
> > /*
> > * CP.
> > - * On CIK, gfx and compute now have independant command processors.
> > + * On CIK, gfx and compute now have independent command processors.
> > *
> > * GFX
> > * Gfx consists of a single ring and can process both gfx jobs and
> > @@ -2630,7 +2630,7 @@ static int gfx_v7_0_cp_gfx_resume(struct amdgpu_device *adev)
> > ring->wptr = 0;
> > WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));
> >
> > - /* set the wb address wether it's enabled or not */
> > + /* set the wb address whether it's enabled or not */
> > rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4);
> > WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));
> > WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);
> > @@ -2985,7 +2985,7 @@ static void gfx_v7_0_mqd_init(struct amdgpu_device *adev,
> > mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc;
> > mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff;
> >
> > - /* set the wb address wether it's enabled or not */
> > + /* set the wb address whether it's enabled or not */
> > wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4);
> > mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc;
> > mqd->cp_hqd_pq_rptr_report_addr_hi =
> > @@ -3198,7 +3198,7 @@ static int gfx_v7_0_cp_resume(struct amdgpu_device *adev)
> > /**
> > * gfx_v7_0_ring_emit_vm_flush - cik vm flush using the CP
> > *
> > - * @ring: the ring to emmit the commands to
> > + * @ring: the ring to emit the commands to
> > *
> > * Sync the command pipeline with the PFP. E.g. wait for everything
> > * to be completed.
> > @@ -3220,7 +3220,7 @@ static void gfx_v7_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
> > amdgpu_ring_write(ring, 4); /* poll interval */
> >
> > if (usepfp) {
> > - /* synce CE with ME to prevent CE fetch CEIB before context switch done */
> > + /* sync CE with ME to prevent CE fetch CEIB before context switch done */
> > amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
> > amdgpu_ring_write(ring, 0);
> > amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
> > --
> > 2.30.1
> >
> _______________________________________________
> amd-gfx mailing list
> amd-gfx(a)lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Hi,
Am 25.03.21 um 09:17 schrieb Oleksandr Natalenko:
> Hello.
>
> On Thu, Mar 25, 2021 at 07:57:33AM +0200, Ilkka Prusi wrote:
>> On 24.3.2021 16.16, Chris Rankin wrote:
>>> Hi,
>>>
>>> Theee warnings ares not present in my dmesg log from 5.11.8:
>>>
>>> [ 43.390159] ------------[ cut here ]------------
>>> [ 43.393574] WARNING: CPU: 2 PID: 1268 at
>>> drivers/gpu/drm/ttm/ttm_bo.c:517 ttm_bo_release+0x172/0x282 [ttm]
>>> [ 43.401940] Modules linked in: nf_nat_ftp nf_conntrack_ftp cfg80211
>> Changing WARN_ON to WARN_ON_ONCE in drivers/gpu/drm/ttm/ttm_bo.c
>> ttm_bo_release() reduces the flood of messages into single splat.
>>
>> This warning appears to come from 57fcd550eb15bce ("drm/ttm: Warn on pinning
>> without holding a reference)" and reverting it might be one choice.
>>
>>
>>> There are others, but I am assuming there is a common cause here.
>>>
>>> Cheers,
>>> Chris
>>>
>> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
>> index a76eb2c14e8c..50b53355b265 100644
>> --- a/drivers/gpu/drm/ttm/ttm_bo.c
>> +++ b/drivers/gpu/drm/ttm/ttm_bo.c
>> @@ -514,7 +514,7 @@ static void ttm_bo_release(struct kref *kref)
>> * shrinkers, now that they are queued for
>> * destruction.
>> */
>> - if (WARN_ON(bo->pin_count)) {
>> + if (WARN_ON_ONCE(bo->pin_count)) {
>> bo->pin_count = 0;
>> ttm_bo_del_from_lru(bo);
>> ttm_bo_add_mem_to_lru(bo, &bo->mem);
>>
>>
>>
>> --
>> - Ilkka
>>
> WARN_ON_ONCE() will just hide the underlying problem. Do we know why
> this happens at all?
The patch was incorrectly back ported to 5.11 without also porting the
driver changes to not trigger this warning back as well.
We are probably going to revert it for 5.11.10.
Regards,
Christian.
>
> Same for me, BTW, with v5.11.9:
>
> ```
> [~]> lspci | grep VGA
> 0a:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Lexa PRO [Radeon 540/540X/550/550X / RX 540X/550/550X] (rev c7)
>
> [ 3676.033140] ------------[ cut here ]------------
> [ 3676.033153] WARNING: CPU: 7 PID: 1318 at drivers/gpu/drm/ttm/ttm_bo.c:517 ttm_bo_release+0x375/0x500 [ttm]
> …
> [ 3676.033340] Hardware name: ASUS System Product Name/Pro WS X570-ACE, BIOS 3302 03/05/2021
> …
> [ 3676.033469] Call Trace:
> [ 3676.033473] ttm_bo_move_accel_cleanup+0x1ab/0x3a0 [ttm]
> [ 3676.033478] amdgpu_bo_move+0x334/0x860 [amdgpu]
> [ 3676.033580] ttm_bo_validate+0x1f1/0x2d0 [ttm]
> [ 3676.033585] amdgpu_cs_bo_validate+0x9b/0x1c0 [amdgpu]
> [ 3676.033665] amdgpu_cs_list_validate+0x115/0x150 [amdgpu]
> [ 3676.033743] amdgpu_cs_ioctl+0x873/0x20a0 [amdgpu]
> [ 3676.033960] drm_ioctl_kernel+0xb8/0x140 [drm]
> [ 3676.033977] drm_ioctl+0x222/0x3c0 [drm]
> [ 3676.034071] amdgpu_drm_ioctl+0x49/0x80 [amdgpu]
> [ 3676.034145] __x64_sys_ioctl+0x83/0xb0
> [ 3676.034149] do_syscall_64+0x33/0x40
> …
> [ 3676.034171] ---[ end trace 66e9865b027112f3 ]---
> ```
>
> Thanks.
>
Am Di., 23. März 2021 um 03:46 Uhr schrieb Jiapeng Chong
<jiapeng.chong(a)linux.alibaba.com>:
>
> Fix the following coccicheck warnings:
>
> ./drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c:622:2-8: WARNING: NULL
> check before some freeing functions is not needed.
>
> ./drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c:618:2-8: WARNING: NULL
> check before some freeing functions is not needed.
>
> ./drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c:616:2-8: WARNING: NULL
> check before some freeing functions is not needed.
>
> Reported-by: Abaci Robot <abaci(a)linux.alibaba.com>
> Signed-off-by: Jiapeng Chong <jiapeng.chong(a)linux.alibaba.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner(a)gmail.com>
--
greets
--
Christian Gmeiner, MSc
https://christian-gmeiner.info/privacypolicy