- Linaro-mm-sig - lists.linaro.org

[PATCH] ARM: DMA-mapping: fix error path for memory allocation failure

by Marek Szyprowski

This patch fixes incorrect check in error path. When the allocation of first page fails, the kernel ops appears due to accessing -1 element of the pages array. Reported-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> --- arch/arm/mm/dma-mapping.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 7a1d224..3096ed2 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -977,7 +977,7 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t return pages; error: - while (--i) + while (i--) if (pages[i]) __free_pages(pages[i], 0); if (array_size <= PAGE_SIZE) -- 1.7.1.569.g6f426

13 years, 4 months

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[RFc] Map CMA pages as cached

by Laura Abbott

Current APIs only support allocating CMA pages as either coherent or writecombine. This seems to miss support for cached pages completely. The following patch seems to be the first obvious solution. More generally though, what should be the strategy for remapping with other memory types? Add a new function call each time? Thanks, Laura

13 years, 4 months

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[PATCH] device: add dma_params->max_segment_count

by Rob Clark

From: Rob Clark <rob(a)ti.com> For devices which have constraints about maximum number of segments in an sglist. For example, a device which could only deal with contiguous buffers would set max_segment_count to 1. The initial motivation is for devices sharing buffers via dma-buf, to allow the buffer exporter to know the constraints of other devices which have attached to the buffer. The dma_mask and fields in 'struct device_dma_parameters' tell the exporter everything else that is needed, except whether the importer has constraints about maximum number of segments. Signed-off-by: Rob Clark <rob(a)ti.com> --- include/linux/device.h | 1 + include/linux/dma-mapping.h | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/include/linux/device.h b/include/linux/device.h index 161d962..3813735 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -568,6 +568,7 @@ struct device_dma_parameters { * sg limitations. */ unsigned int max_segment_size; + unsigned int max_segment_count; /* zero for unlimited */ unsigned long segment_boundary_mask; }; diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index dfc099e..f380f79 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -111,6 +111,22 @@ static inline unsigned int dma_set_max_seg_size(struct device *dev, return -EIO; } +static inline unsigned int dma_get_max_seg_count(struct device *dev) +{ + return dev->dma_parms ? dev->dma_parms->max_segment_count : 0; +} + +static inline int dma_set_max_seg_count(struct device *dev, + unsigned int count) +{ + if (dev->dma_parms) { + dev->dma_parms->max_segment_count = count; + return 0; + } else + return -EIO; +} + + static inline unsigned long dma_get_seg_boundary(struct device *dev) { return dev->dma_parms ? -- 1.7.9.5

13 years, 5 months

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Fwd: [Workshop-2011] Media summit at the Kernel Summit

by Hans Verkuil

FYI! If anyone is interested, then please discuss that on the linux-media mailinglist. I promised Mauro to forward it to a few mailinglists where this might be of interest, so here it is :-) Regards, Hans ---------- Forwarded Message ---------- Subject: [Workshop-2011] Media summit at the Kernel Summit - was: Fwd: Re: [Ksummit-2012-discuss] Organising Mini Summits within the Kernel Summit Date: Tue July 17 2012, 19:30:53 From: Mauro Carvalho Chehab <mchehab(a)redhat.com> To: Linux Media Mailing List <linux-media(a)vger.kernel.org>, workshop-2011(a)linuxtv.org As we did in 2012, we're planning to do a media summit again at KS/2012. The KS/2012 will happen in San Diego, CA, US, between Aug 26-28, just before the LinuxCon North America. In order to do it, I'd like to know who is interested on participate, and to get proposals about what subjects will be discussed there, in order to start planning the agenda. Thanks! Mauro

13 years, 5 months

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[GIT PULL] CMA and DMA-mapping fixes for v3.5-rc7

by Marek Szyprowski

Hi Linus, I woukd like to ask you again for pulling another set of minor fixups for recently merged Contiguous Memory Allocator and ARM DMA-mapping changes. Those patches fix mysterious crashes on systems with CMA and Himem enabled as well as some corner cases caused by typical off-by-one bug. I'm sorry for a delay in sending this pull request which is caused by my vacations. The following changes since commit 6887a4131da3adaab011613776d865f4bcfb5678: Linux 3.5-rc5 (2012-06-30 16:08:57 -0700) with the top-most commit 46c87852e99cf8ce97e207b11cde19085837e39c ARM: dma-mapping: modify condition check while freeing pages are available in the git repository at: git://git.linaro.org/people/mszyprowski/linux-dma-mapping.git fixes-for-linus Marek Szyprowski (1): mm: cma: fix condition check when setting global cma area Prathyush K (1): ARM: dma-mapping: modify condition check while freeing pages Rabin Vincent (1): mm: cma: don't replace lowmem pages with highmem arch/arm/mm/dma-mapping.c | 4 ++-- include/asm-generic/dma-contiguous.h | 2 +- mm/page_alloc.c | 7 ++++++- 3 files changed, 9 insertions(+), 4 deletions(-) Thanks! Best regards Marek Szyprowski Samsung Poland R&D Center

13 years, 5 months

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[RFC] dma-fence: dma-buf synchronization (v2)

by Rob Clark

From: Rob Clark <rob(a)ti.com> A dma-fence can be attached to a buffer which is being filled or consumed by hw, to allow userspace to pass the buffer without waiting to another device. For example, userspace can call page_flip ioctl to display the next frame of graphics after kicking the GPU but while the GPU is still rendering. The display device sharing the buffer with the GPU would attach a callback to get notified when the GPU's rendering-complete IRQ fires, to update the scan-out address of the display, without having to wake up userspace. A dma-fence is transient, one-shot deal. It is allocated and attached to dma-buf's list of fences. When the one that attached it is done, with the pending operation, it can signal the fence removing it from the dma-buf's list of fences: + dma_buf_attach_fence() + dma_fence_signal() Other drivers can access the current fence on the dma-buf (if any), which increment's the fences refcnt: + dma_buf_get_fence() + dma_fence_put() The one pending on the fence can add an async callback (and optionally cancel it.. for example, to recover from GPU hangs): + dma_fence_add_callback() + dma_fence_cancel_callback() Or wait synchronously (optionally with timeout or from atomic context): + dma_fence_wait() A default software-only implementation is provided, which can be used by drivers attaching a fence to a buffer when they have no other means for hw sync. But a memory backed fence is also envisioned, because it is common that GPU's can write to, or poll on some memory location for synchronization. For example: fence = dma_buf_get_fence(dmabuf); if (fence->ops == &mem_dma_fence_ops) { dma_buf *fence_buf; mem_dma_fence_get_buf(fence, &fence_buf, &offset); ... tell the hw the memory location to wait on ... } else { /* fall-back to sw sync * / dma_fence_add_callback(fence, my_cb); } The memory location is itself backed by dma-buf, to simplify mapping to the device's address space, an idea borrowed from Maarten Lankhorst. NOTE: the memory location fence is not implemented yet, the above is just for explaining how it would work. On SoC platforms, if some other hw mechanism is provided for synchronizing between IP blocks, it could be supported as an alternate implementation with it's own fence ops in a similar way. The other non-sw implementations would wrap the add/cancel_callback and wait fence ops, so that they can keep track if a device not supporting hw sync is waiting on the fence, and in this case should arrange to call dma_fence_signal() at some point after the condition has changed, to notify other devices waiting on the fence. If there are no sw waiters, this can be skipped to avoid waking the CPU unnecessarily. The intention is to provide a userspace interface (presumably via eventfd) later, to be used in conjunction with dma-buf's mmap support for sw access to buffers (or for userspace apps that would prefer to do their own synchronization). v1: original v2: After discussion w/ danvet and mlankhorst on #dri-devel, we decided that dma-fence didn't need to care about the sw->hw signaling path (it can be handled same as sw->sw case), and therefore the fence->ops can be simplified and more handled in the core. So remove the signal, add_callback, cancel_callback, and wait ops, and replace with a simple enable_signaling() op which can be used to inform a fence supporting hw->hw signaling that one or more devices which do not support hw signaling are waiting (and therefore it should enable an irq or do whatever is necessary in order that the CPU is notified when the fence is passed). --- drivers/base/Makefile | 2 +- drivers/base/dma-buf.c | 3 + drivers/base/dma-fence.c | 364 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/dma-buf.h | 2 + include/linux/dma-fence.h | 128 ++++++++++++++++ 5 files changed, 498 insertions(+), 1 deletion(-) create mode 100644 drivers/base/dma-fence.c create mode 100644 include/linux/dma-fence.h diff --git a/drivers/base/Makefile b/drivers/base/Makefile index 5aa2d70..6e9f217 100644 --- a/drivers/base/Makefile +++ b/drivers/base/Makefile @@ -10,7 +10,7 @@ obj-$(CONFIG_CMA) += dma-contiguous.o obj-y += power/ obj-$(CONFIG_HAS_DMA) += dma-mapping.o obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o -obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf.o +obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf.o dma-fence.o obj-$(CONFIG_ISA) += isa.o obj-$(CONFIG_FW_LOADER) += firmware_class.o obj-$(CONFIG_NUMA) += node.o diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index 24e88fe..b053236 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -39,6 +39,8 @@ static int dma_buf_release(struct inode *inode, struct file *file) dmabuf = file->private_data; + WARN_ON(!list_empty(&dmabuf->fence_list)); + dmabuf->ops->release(dmabuf); kfree(dmabuf); return 0; @@ -119,6 +121,7 @@ struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops, mutex_init(&dmabuf->lock); INIT_LIST_HEAD(&dmabuf->attachments); + INIT_LIST_HEAD(&dmabuf->fence_list); return dmabuf; } diff --git a/drivers/base/dma-fence.c b/drivers/base/dma-fence.c new file mode 100644 index 0000000..2bc25df --- /dev/null +++ b/drivers/base/dma-fence.c @@ -0,0 +1,364 @@ +/* + * Fence mechanism for dma-buf to allow for asynchronous dma access + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/slab.h> +#include <linux/sched.h> +#include <linux/export.h> +#include <linux/dma-fence.h> + +#define ATTACHED (1 << 0) +#define SIGNALED (1 << 1) + +/** + * dma_buf_attach_fence - Attach a fence to a dma-buf. + * + * @buf: the dma-buf to attach to + * @fence: the fence to attach + * + * A fence can only be attached to a single dma-buf. The dma-buf takes + * ownership of the fence, which is unref'd when the fence is signaled. + * The fence takes a reference to the dma-buf so the buffer will not be + * freed while there is a pending fence. + */ +int dma_buf_attach_fence(struct dma_buf *buf, struct dma_fence *fence) +{ + unsigned long flags; + int ret = -EINVAL; + + if (WARN_ON(!buf || !fence)) + return -EINVAL; + + spin_lock_irqsave(&fence->event_queue.lock, flags); + if (!fence->attached) { + get_dma_buf(buf); + fence->attached = true; + list_add(&fence->list_node, &buf->fence_list); + ret = 0; + } + spin_unlock_irqrestore(&fence->event_queue.lock, flags); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_buf_attach_fence); + +static void signal_fence(struct dma_fence *fence) +{ + list_del(&fence->list_node); + wake_up_all_locked(&fence->event_queue); +} + +/** + * dma_fence_signal - Signal a fence. + * + * @fence: The fence to signal + * + * All registered callbacks will be called directly (synchronously) and + * all blocked waters will be awoken. + * + * TODO: any value in adding a dma_fence_cancel(), for example to recov + * from hung gpu? It would behave like dma_fence_signal() but return + * an error to waiters and cb's to let them know that the condition they + * are waiting for will never happen. + */ +int dma_fence_signal(struct dma_fence *fence) +{ + unsigned long flags; + int ret = -EINVAL; + + if (WARN_ON(!fence)) + return -EINVAL; + + spin_lock_irqsave(&fence->event_queue.lock, flags); + if (fence->attached && !fence->signaled) { + fence->signaled = true; + signal_fence(fence); + ret = 0; + } + spin_unlock_irqrestore(&fence->event_queue.lock, flags); + + dma_fence_put(fence); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_fence_signal); + +/** + * dma_buf_get_fence - Get the most recent pending fence attached to the + * dma-buf. + * + * @buf: the dma-buf whose fence to get + * + * If this returns NULL, there are no pending fences. Otherwise this + * takes a reference to the returned fence, so the caller must later + * call dma_fence_put() to release the reference. + */ +struct dma_fence *dma_buf_get_fence(struct dma_buf *buf) +{ + struct dma_fence *fence = NULL; + unsigned long flags; + + if (WARN_ON(!buf)) + return ERR_PTR(-EINVAL); + + spin_lock_irqsave(&fence->event_queue.lock, flags); + if (!list_empty(&buf->fence_list)) { + fence = list_first_entry(&buf->fence_list, + struct dma_fence, list_node); + dma_fence_get(fence); + } + spin_unlock_irqrestore(&fence->event_queue.lock, flags); + + return fence; +} +EXPORT_SYMBOL_GPL(dma_buf_get_fence); + +static void release_fence(struct kref *kref) +{ + struct dma_fence *fence = + container_of(kref, struct dma_fence, refcount); + + WARN_ON(waitqueue_active(&fence->event_queue)); + + kfree(fence); +} + +/** + * dma_fence_put - Release a reference to the fence. + */ +void dma_fence_put(struct dma_fence *fence) +{ + WARN_ON(!fence); + kref_put(&fence->refcount, release_fence); +} +EXPORT_SYMBOL_GPL(dma_fence_put); + +/** + * dma_fence_get - Take a reference to the fence. + * + * In most cases this is used only internally by dma-fence. + */ +void dma_fence_get(struct dma_fence *fence) +{ + WARN_ON(!fence); + kref_get(&fence->refcount); +} +EXPORT_SYMBOL_GPL(dma_fence_get); + +static int check_signaling(struct dma_fence *fence) +{ + bool enable_signaling = false; + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&fence->event_queue.lock, flags); + if (!fence->needs_sw_signal && !fence->signaled) + enable_signaling = fence->needs_sw_signal = true; + spin_unlock_irqrestore(&fence->event_queue.lock, flags); + + if (enable_signaling) + ret = fence->ops->enable_signaling(fence); + + return ret; +} + +/** + * dma_fence_add_callback - Add a callback to be called when the fence + * is signaled. + * + * @fence: The fence to wait on + * @cb: The callback to register + * + * Any number of callbacks can be registered to a fence, but a callback + * can only be registered to once fence at a time. + * + * Note that the callback can be called from an atomic context. If + * fence is already signaled, this function will return -ENOENT (and + * *not* call the callback) + */ +int dma_fence_add_callback(struct dma_fence *fence, + struct dma_fence_cb *cb) +{ + unsigned long flags; + int ret; + + if (WARN_ON(!fence || !cb)) + return -EINVAL; + + ret = check_signaling(fence); + + spin_lock_irqsave(&fence->event_queue.lock, flags); + if (ret == -ENOENT) { + /* if state changed while we dropped the lock, dispatch now */ + signal_fence(fence); + } else if (!fence->signaled && !ret) { + dma_fence_get(fence); + cb->fence = fence; + __add_wait_queue(&fence->event_queue, &cb->base); + ret = 0; + } else { + ret = -EINVAL; + } + spin_unlock_irqrestore(&fence->event_queue.lock, flags); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_fence_add_callback); + +/** + * dma_fence_cancel_callback - Remove a previously registered callback. + * + * @cb: The callback to unregister + * + * The callback will not be called after this function returns, but could + * be called before this function returns. + */ +int dma_fence_cancel_callback(struct dma_fence_cb *cb) +{ + struct dma_fence *fence; + unsigned long flags; + int ret = -EINVAL; + + if (WARN_ON(!cb)) + return -EINVAL; + + fence = cb->fence; + + spin_lock_irqsave(&fence->event_queue.lock, flags); + if (fence) { + __remove_wait_queue(&fence->event_queue, &cb->base); + cb->fence = NULL; + dma_fence_put(fence); + ret = 0; + } + spin_unlock_irqrestore(&fence->event_queue.lock, flags); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_fence_cancel_callback); + +/** + * dma_fence_wait - Wait for a fence to be signaled. + * + * @fence: The fence to wait on + * @interruptible: if true, do an interruptible wait + * @timeout: timeout, in jiffies + * + * Returns -ENOENT if the fence has already passed. + */ +int dma_fence_wait(struct dma_fence *fence, bool interruptible, long timeout) +{ + unsigned long flags; + int ret; + + if (WARN_ON(!fence)) + return -EINVAL; + + ret = check_signaling(fence); + if (ret == -ENOENT) { + spin_lock_irqsave(&fence->event_queue.lock, flags); + signal_fence(fence); + spin_unlock_irqrestore(&fence->event_queue.lock, flags); + return ret; + } + + if (ret) + return ret; + + if (interruptible) + ret = wait_event_interruptible_timeout(fence->event_queue, + fence->signaled, timeout); + else + ret = wait_event_timeout(fence->event_queue, + fence->signaled, timeout); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_fence_wait); + +int __dma_fence_wake_func(wait_queue_t *wait, unsigned mode, + int flags, void *key) +{ + struct dma_fence_cb *cb = + container_of(wait, struct dma_fence_cb, base); + struct dma_fence *fence = cb->fence; + int ret; + + ret = cb->func(cb, fence); + cb->fence = NULL; + dma_fence_put(fence); + + return ret; +} +EXPORT_SYMBOL_GPL(__dma_fence_wake_func); + +/* + * Helpers intended to be used by the ops of the dma_fence implementation: + * + * NOTE: helpers and fxns intended to be used by other dma-fence + * implementations are not exported.. I'm not really sure if it makes + * sense to have a dma-fence implementation that is itself a module. + */ + +void __dma_fence_init(struct dma_fence *fence, struct dma_fence_ops *ops) +{ + WARN_ON(!ops || !ops->enable_signaling); + + kref_init(&fence->refcount); + fence->ops = ops; + init_waitqueue_head(&fence->event_queue); +} + +/* + * Pure sw implementation for dma-fence. The CPU always gets involved. + */ + +static int sw_enable_signaling(struct dma_fence *fence) +{ + /* + * pure sw, no irq's to enable, because the fence creator will + * always call dma_fence_signal() + */ + return 0; +} + +static struct dma_fence_ops sw_fence_ops = { + .enable_signaling = sw_enable_signaling, +}; + +/** + * dma_fence_create - Create a simple sw-only fence. + * + * This fence only supports signaling from/to CPU. Other implementations + * of dma-fence can be used to support hardware to hardware signaling, if + * supported by the hardware, and use the dma_fence_helper_* functions for + * compatibility with other devices that only support sw signaling. + */ +struct dma_fence *dma_fence_create(void) +{ + struct dma_fence *fence; + + fence = kzalloc(sizeof(struct dma_fence), GFP_KERNEL); + if (!fence) + return ERR_PTR(-ENOMEM); + + __dma_fence_init(fence, &sw_fence_ops); + + return fence; +} +EXPORT_SYMBOL_GPL(dma_fence_create); diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index eb48f38..ff4ec6c 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h @@ -122,6 +122,8 @@ struct dma_buf { /* mutex to serialize list manipulation and attach/detach */ struct mutex lock; void *priv; + /* list of pending dma_fence's */ + struct list_head fence_list; }; /** diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h new file mode 100644 index 0000000..336afd2 --- /dev/null +++ b/include/linux/dma-fence.h @@ -0,0 +1,128 @@ +/* + * Fence mechanism for dma-buf to allow for asynchronous dma access + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __DMA_FENCE_H__ +#define __DMA_FENCE_H__ + +#include <linux/err.h> +#include <linux/list.h> +#include <linux/wait.h> +#include <linux/list.h> +#include <linux/dma-buf.h> + +struct dma_fence; +struct dma_fence_ops; +struct dma_fence_cb; + +struct dma_fence { + struct kref refcount; + struct dma_fence_ops *ops; + wait_queue_head_t event_queue; + struct list_head list_node; /* for dmabuf's fence_list */ + + /* has this fence been attached to a dma-buf yet? */ + bool attached : 1; + + /* has this fence been signaled yet? */ + bool signaled : 1; + + /* do we have one or more waiters or callbacks? */ + bool needs_sw_signal : 1; +}; + +typedef int (*dma_fence_func_t)(struct dma_fence_cb *cb, + struct dma_fence *fence); + +struct dma_fence_cb { + wait_queue_t base; + dma_fence_func_t func; + + /* + * This is initialized when the cb is added, and NULL'd when it + * is canceled or expired, so can be used to for error checking + * if the cb is already pending. A dma_fence_cb can be pending + * on at most one fence at a time. + */ + struct dma_fence *fence; +}; + +struct dma_fence_ops { + /** + * For fence implementations that have the capability for hw->hw + * signaling, they can implement this op to enable the necessary + * irqs, or insert commands into cmdstream, etc. This is called + * in the first wait() or add_callback() path to let the fence + * implementation know that there is another driver waiting on + * the signal (ie. hw->sw case). + * + * A return value of -ENOENT will indicate that the fence has + * already passed. + */ + int (*enable_signaling)(struct dma_fence *fence); +}; + +int __dma_fence_wake_func(wait_queue_t *wait, unsigned mode, + int flags, void *key); + +#define DMA_FENCE_CB_INITIALIZER(cb_func) { \ + .base = { .func = __dma_fence_wake_func }, \ + .func = (cb_func), \ + } + +#define DECLARE_DMA_FENCE(name, cb_func) \ + struct dma_fence_cb name = DMA_FENCE_CB_INITIALIZER(cb_func) + + +/* + * TODO does it make sense to be able to enable dma-fence without dma-buf, + * or visa versa? + */ +#ifdef CONFIG_DMA_SHARED_BUFFER + +int dma_buf_attach_fence(struct dma_buf *buf, struct dma_fence *fence); +struct dma_fence *dma_buf_get_fence(struct dma_buf *buf); + +/* create a basic (pure sw) fence: */ +struct dma_fence *dma_fence_create(void); + +/* intended to be used by other dma_fence implementations: */ +void __dma_fence_init(struct dma_fence *fence, struct dma_fence_ops *ops); + +void dma_fence_get(struct dma_fence *fence); +void dma_fence_put(struct dma_fence *fence); +int dma_fence_signal(struct dma_fence *fence); + +int dma_fence_add_callback(struct dma_fence *fence, + struct dma_fence_cb *cb); +int dma_fence_cancel_callback(struct dma_fence_cb *cb); +int dma_fence_wait(struct dma_fence *fence, bool interruptible, long timeout); + +/* helpers intended to be used by the ops of the dma_fence implementation: */ +int dma_fence_helper_signal(struct dma_fence *fence); +int dma_fence_helper_add_callback(struct dma_fence *fence, + struct dma_fence_cb *cb); +int dma_fence_helper_cancel_callback(struct dma_fence_cb *cb); +int dma_fence_helper_wait(struct dma_fence *fence, bool interruptible, + long timeout); + +#else +// TODO +#endif /* CONFIG_DMA_SHARED_BUFFER */ + +#endif /* __DMA_FENCE_H__ */ -- 1.7.9.5

13 years, 5 months

3
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[PATCH v2] ARM: dma-mapping: modify condition check while freeing pages

by Prathyush K

WARNING: at mm/vmalloc.c:1471 __iommu_free_buffer+0xcc/0xd0() Trying to vfree() nonexistent vm area (ef095000) Modules linked in: [<c0015a18>] (unwind_backtrace+0x0/0xfc) from [<c0025a94>] (warn_slowpath_common+0x54/0x64) [<c0025a94>] (warn_slowpath_common+0x54/0x64) from [<c0025b38>] (warn_slowpath_fmt+0x30/0x40) [<c0025b38>] (warn_slowpath_fmt+0x30/0x40) from [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) from [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) from [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) from [<c0211230>] (drm_gem_object_free+0x28/0x34) [<c0211230>] (drm_gem_object_free+0x28/0x34) from [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) from [<c01abe10>] (idr_for_each+0x74/0xb8) [<c01abe10>] (idr_for_each+0x74/0xb8) from [<c02114e4>] (drm_gem_release+0x1c/0x30) [<c02114e4>] (drm_gem_release+0x1c/0x30) from [<c0210ae8>] (drm_release+0x608/0x694) [<c0210ae8>] (drm_release+0x608/0x694) from [<c00b75a0>] (fput+0xb8/0x228) [<c00b75a0>] (fput+0xb8/0x228) from [<c00b40c4>] (filp_close+0x64/0x84) [<c00b40c4>] (filp_close+0x64/0x84) from [<c0029d54>] (put_files_struct+0xe8/0x104) [<c0029d54>] (put_files_struct+0xe8/0x104) from [<c002b930>] (do_exit+0x608/0x774) [<c002b930>] (do_exit+0x608/0x774) from [<c002bae4>] (do_group_exit+0x48/0xb4) [<c002bae4>] (do_group_exit+0x48/0xb4) from [<c002bb60>] (sys_exit_group+0x10/0x18) [<c002bb60>] (sys_exit_group+0x10/0x18) from [<c000ee80>] (ret_fast_syscall+0x0/0x30) This patch modifies the condition while freeing to match the condition used while allocation. This fixes the above warning which arises when array size is equal to PAGE_SIZE where allocation is done using kzalloc but free is done using vfree. Signed-off-by: Prathyush K <prathyush.k(a)samsung.com> --- arch/arm/mm/dma-mapping.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index dc560dc..0f9358b 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -1091,7 +1091,7 @@ error: while (--i) if (pages[i]) __free_pages(pages[i], 0); - if (array_size < PAGE_SIZE) + if (array_size <= PAGE_SIZE) kfree(pages); else vfree(pages); @@ -1106,7 +1106,7 @@ static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t s for (i = 0; i < count; i++) if (pages[i]) __free_pages(pages[i], 0); - if (array_size < PAGE_SIZE) + if (array_size <= PAGE_SIZE) kfree(pages); else vfree(pages); -- 1.7.0.4

13 years, 5 months

2
1
0 0

Re: [Linaro-mm-sig] [RFC] dma-fence: dma-buf synchronization (v2)

by Rob Clark

On Fri, Jul 13, 2012 at 12:35 PM, Tom Cooksey <tom.cooksey(a)arm.com> wrote: > My other thought is around atomicity. Could this be extended to > (safely) allow for hardware devices which might want to access > multiple buffers simultaneously? I think it probably can with > some tweaks to the interface? An atomic function which does > something like "give me all the fences for all these buffers > and add this fence to each instead/as-well-as"? fwiw, what I'm leaning towards right now is combining dma-fence w/ Maarten's idea of dma-buf-mgr (not sure if you saw his patches?). And let dmabufmgr handle the multi-buffer reservation stuff. And possibly the read vs write access, although this I'm not 100% sure on... the other option being the concept of read vs write (or exclusive/non-exclusive) fences. In the current state, the fence is quite simple, and doesn't care *what* it is fencing, which seems advantageous when you get into trying to deal with combinations of devices sharing buffers, some of whom can do hw sync, and some who can't. So having a bit of partitioning from the code dealing w/ sequencing who can access the buffers when and for what purpose seems like it might not be a bad idea. Although I'm still working through the different alternatives. BR, -R

13 years, 5 months

2
2
0 0

[PATCH] dma-fence: dma-buf synchronization

by Rob Clark

From: Rob Clark <rob(a)ti.com> A dma-fence can be attached to a buffer which is being filled or consumed by hw, to allow userspace to pass the buffer without waiting to another device. For example, userspace can call page_flip ioctl to display the next frame of graphics after kicking the GPU but while the GPU is still rendering. The display device sharing the buffer with the GPU would attach a callback to get notified when the GPU's rendering-complete IRQ fires, to update the scan-out address of the display, without having to wake up userspace. A dma-fence is transient, one-shot deal. It is allocated and attached to dma-buf's list of fences. When the one that attached it is done, with the pending operation, it can signal the fence removing it from the dma-buf's list of fences: + dma_buf_attach_fence() + dma_fence_signal() Other drivers can access the current fence on the dma-buf (if any), which increment's the fences refcnt: + dma_buf_get_fence() + dma_fence_put() The one pending on the fence can add an async callback (and optionally cancel it.. for example, to recover from GPU hangs): + dma_fence_add_callback() + dma_fence_cancel_callback() Or wait synchronously (optionally with timeout or from atomic context): + dma_fence_wait() A default software-only implementation is provided, which can be used by drivers attaching a fence to a buffer when they have no other means for hw sync. But a memory backed fence is also envisioned, because it is common that GPU's can write to, or poll on some memory location for synchronization. For example: fence = dma_buf_get_fence(dmabuf); if (fence->ops == &mem_dma_fence_ops) { dma_buf *fence_buf; mem_dma_fence_get_buf(fence, &fence_buf, &offset); ... tell the hw the memory location to wait on ... } else { /* fall-back to sw sync * / dma_fence_add_callback(fence, my_cb); } The memory location is itself backed by dma-buf, to simplify mapping to the device's address space, an idea borrowed from Maarten Lankhorst. NOTE: the memory location fence is not implemented yet, the above is just for explaining how it would work. On SoC platforms, if some other hw mechanism is provided for synchronizing between IP blocks, it could be supported as an alternate implementation with it's own fence ops in a similar way. The other non-sw implementations would wrap the add/cancel_callback and wait fence ops, so that they can keep track if a device not supporting hw sync is waiting on the fence, and in this case should arrange to call dma_fence_signal() at some point after the condition has changed, to notify other devices waiting on the fence. If there are no sw waiters, this can be skipped to avoid waking the CPU unnecessarily. The intention is to provide a userspace interface (presumably via eventfd) later, to be used in conjunction with dma-buf's mmap support for sw access to buffers (or for userspace apps that would prefer to do their own synchronization). --- drivers/base/Makefile | 2 +- drivers/base/dma-buf.c | 3 + drivers/base/dma-fence.c | 325 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/dma-buf.h | 3 + include/linux/dma-fence.h | 118 ++++++++++++++++ 5 files changed, 450 insertions(+), 1 deletion(-) create mode 100644 drivers/base/dma-fence.c create mode 100644 include/linux/dma-fence.h diff --git a/drivers/base/Makefile b/drivers/base/Makefile index 5aa2d70..6e9f217 100644 --- a/drivers/base/Makefile +++ b/drivers/base/Makefile @@ -10,7 +10,7 @@ obj-$(CONFIG_CMA) += dma-contiguous.o obj-y += power/ obj-$(CONFIG_HAS_DMA) += dma-mapping.o obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o -obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf.o +obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf.o dma-fence.o obj-$(CONFIG_ISA) += isa.o obj-$(CONFIG_FW_LOADER) += firmware_class.o obj-$(CONFIG_NUMA) += node.o diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index 24e88fe..b053236 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -39,6 +39,8 @@ static int dma_buf_release(struct inode *inode, struct file *file) dmabuf = file->private_data; + WARN_ON(!list_empty(&dmabuf->fence_list)); + dmabuf->ops->release(dmabuf); kfree(dmabuf); return 0; @@ -119,6 +121,7 @@ struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops, mutex_init(&dmabuf->lock); INIT_LIST_HEAD(&dmabuf->attachments); + INIT_LIST_HEAD(&dmabuf->fence_list); return dmabuf; } diff --git a/drivers/base/dma-fence.c b/drivers/base/dma-fence.c new file mode 100644 index 0000000..a94ed01 --- /dev/null +++ b/drivers/base/dma-fence.c @@ -0,0 +1,325 @@ +/* + * Fence mechanism for dma-buf to allow for asynchronous dma access + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/slab.h> +#include <linux/sched.h> +#include <linux/export.h> +#include <linux/dma-fence.h> + +static DEFINE_SPINLOCK(fence_lock); + +/** + * dma_buf_attach_fence - Attach a fence to a dma-buf. + * + * @buf: the dma-buf to attach to + * @fence: the fence to attach + * + * A fence can only be attached to a single dma-buf. The dma-buf takes + * ownership of the fence, which is unref'd when the fence is signaled. + * The fence takes a reference to the dma-buf so the buffer will not be + * freed while there is a pending fence. + */ +int dma_buf_attach_fence(struct dma_buf *buf, struct dma_fence *fence) +{ + if (WARN_ON(!buf || !fence || fence->buf)) + return -EINVAL; + + spin_lock(&fence_lock); + get_dma_buf(buf); + fence->buf = buf; + list_add(&fence->list_node, &buf->fence_list); + spin_unlock(&fence_lock); + + return 0; +} +EXPORT_SYMBOL_GPL(dma_buf_attach_fence); + +/** + * dma_fence_signal - Signal a fence. + * + * @fence: The fence to signal + * + * All registered callbacks will be called directly (synchronously) and + * all blocked waters will be awoken. + */ +int dma_fence_signal(struct dma_fence *fence) +{ + unsigned long flags; + int ret; + + if (WARN_ON(!fence || !fence->buf)) + return -EINVAL; + + spin_lock_irqsave(&fence_lock, flags); + list_del(&fence->list_node); + spin_unlock_irqrestore(&fence_lock, flags); + + dma_buf_put(fence->buf); + fence->buf = NULL; + + ret = fence->ops->signal(fence); + + dma_fence_put(fence); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_fence_signal); + +/** + * dma_buf_get_fence - Get the most recent pending fence attached to the + * dma-buf. + * + * @buf: the dma-buf whose fence to get + * + * If this returns NULL, there are no pending fences. Otherwise this + * takes a reference to the returned fence, so the caller must later + * call dma_fence_put() to release the reference. + */ +struct dma_fence *dma_buf_get_fence(struct dma_buf *buf) +{ + struct dma_fence *fence = NULL; + + if (WARN_ON(!buf)) + return ERR_PTR(-EINVAL); + + spin_lock(&fence_lock); + if (!list_empty(&buf->fence_list)) { + fence = list_first_entry(&buf->fence_list, + struct dma_fence, list_node); + dma_fence_get(fence); + } + spin_unlock(&fence_lock); + + return fence; +} +EXPORT_SYMBOL_GPL(dma_buf_get_fence); + +static void release_fence(struct kref *kref) +{ + struct dma_fence *fence = + container_of(kref, struct dma_fence, refcount); + + WARN_ON(waitqueue_active(&fence->event_queue) || fence->buf); + + kfree(fence); +} + +/** + * dma_fence_put - Release a reference to the fence. + */ +void dma_fence_put(struct dma_fence *fence) +{ + WARN_ON(!fence); + kref_put(&fence->refcount, release_fence); +} +EXPORT_SYMBOL_GPL(dma_fence_put); + +/** + * dma_fence_get - Take a reference to the fence. + * + * In most cases this is used only internally by dma-fence. + */ +void dma_fence_get(struct dma_fence *fence) +{ + WARN_ON(!fence); + kref_get(&fence->refcount); +} +EXPORT_SYMBOL_GPL(dma_fence_get); + +/** + * dma_fence_add_callback - Add a callback to be called when the fence + * is signaled. + * + * @fence: The fence to wait on + * @cb: The callback to register + * + * Any number of callbacks can be registered to a fence, but a callback + * can only be registered to once fence at a time. + * + * Note that the callback can be called from an atomic context. If + * fence is already signaled, this function will return -EINVAL (and + * *not* call the callback) + */ +int dma_fence_add_callback(struct dma_fence *fence, + struct dma_fence_cb *cb) +{ + int ret = -EINVAL; + + if (WARN_ON(!fence || !cb)) + return -EINVAL; + + spin_lock(&fence_lock); + if (fence->buf) { + dma_fence_get(fence); + cb->fence = fence; + ret = fence->ops->add_callback(fence, cb); + } + spin_unlock(&fence_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_fence_add_callback); + +/** + * dma_fence_cancel_callback - Remove a previously registered callback. + * + * @cb: The callback to unregister + * + * The callback will not be called after this function returns, but could + * be called before this function returns. + */ +int dma_fence_cancel_callback(struct dma_fence_cb *cb) +{ + struct dma_fence *fence; + int ret = -EINVAL; + + if (WARN_ON(!cb)) + return -EINVAL; + + fence = cb->fence; + + spin_lock(&fence_lock); + if (fence) { + ret = fence->ops->cancel_callback(cb); + cb->fence = NULL; + dma_fence_put(fence); + } + spin_unlock(&fence_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(dma_fence_cancel_callback); + +/** + * dma_fence_wait - Wait for a fence to be signaled. + * + * @fence: The fence to wait on + * @interruptible: if true, do an interruptible wait + * @timeout: timeout, in jiffies + */ +int dma_fence_wait(struct dma_fence *fence, bool interruptible, long timeout) +{ + if (WARN_ON(!fence)) + return -EINVAL; + + return fence->ops->wait(fence, interruptible, timeout); +} +EXPORT_SYMBOL_GPL(dma_fence_wait); + +int __dma_fence_wake_func(wait_queue_t *wait, unsigned mode, + int flags, void *key) +{ + struct dma_fence_cb *cb = + container_of(wait, struct dma_fence_cb, base); + int ret; + + ret = cb->func(cb, cb->fence); + dma_fence_put(cb->fence); + cb->fence = NULL; + + return ret; +} +EXPORT_SYMBOL_GPL(__dma_fence_wake_func); + +/* + * Helpers intended to be used by the ops of the dma_fence implementation: + * + * NOTE: helpers and fxns intended to be used by other dma-fence + * implementations are not exported.. I'm not really sure if it makes + * sense to have a dma-fence implementation that is itself a module. + */ + +void __dma_fence_init(struct dma_fence *fence, struct dma_fence_ops *ops) +{ + WARN_ON(!ops || !ops->signal || !ops->add_callback || + !ops->cancel_callback || !ops->wait); + + kref_init(&fence->refcount); + fence->ops = ops; + init_waitqueue_head(&fence->event_queue); +} + +int dma_fence_helper_signal(struct dma_fence *fence) +{ + wake_up_all(&fence->event_queue); + return 0; +} + +int dma_fence_helper_add_callback(struct dma_fence *fence, + struct dma_fence_cb *cb) +{ + add_wait_queue(&fence->event_queue, &cb->base); + return 0; +} + +int dma_fence_helper_cancel_callback(struct dma_fence_cb *cb) +{ + struct dma_fence *fence = cb->fence; + remove_wait_queue(&fence->event_queue, &cb->base); + return 0; +} + +int dma_fence_helper_wait(struct dma_fence *fence, bool interruptible, + long timeout) +{ + int ret; + + if (interruptible) { + ret = wait_event_interruptible_timeout(fence->event_queue, + !fence->buf, timeout); + } else { + ret = wait_event_timeout(fence->event_queue, + !fence->buf, timeout); + } + + return ret; +} + +/* + * Pure sw implementation for dma-fence. The CPU always gets involved. + */ + +static struct dma_fence_ops sw_fence_ops = { + .signal = dma_fence_helper_signal, + .add_callback = dma_fence_helper_add_callback, + .cancel_callback = dma_fence_helper_cancel_callback, + .wait = dma_fence_helper_wait, +}; + +/** + * dma_fence_create - Create a simple sw-only fence. + * + * This fence only supports signaling from/to CPU. Other implementations + * of dma-fence can be used to support hardware to hardware signaling, if + * supported by the hardware, and use the dma_fence_helper_* functions for + * compatibility with other devices that only support sw signaling. + */ +struct dma_fence *dma_fence_create(void) +{ + struct dma_fence *fence; + + fence = kzalloc(sizeof(struct dma_fence), GFP_KERNEL); + if (!fence) + return ERR_PTR(-ENOMEM); + + __dma_fence_init(fence, &sw_fence_ops); + + return fence; +} +EXPORT_SYMBOL_GPL(dma_fence_create); diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index eb48f38..a0a0b64 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h @@ -29,6 +29,7 @@ #include <linux/scatterlist.h> #include <linux/list.h> #include <linux/dma-mapping.h> +#include <linux/dma-fence.h> #include <linux/fs.h> struct device; @@ -122,6 +123,8 @@ struct dma_buf { /* mutex to serialize list manipulation and attach/detach */ struct mutex lock; void *priv; + /* list of pending dma_fence's */ + struct list_head fence_list; }; /** diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h new file mode 100644 index 0000000..ecda334 --- /dev/null +++ b/include/linux/dma-fence.h @@ -0,0 +1,118 @@ +/* + * Fence mechanism for dma-buf to allow for asynchronous dma access + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __DMA_FENCE_H__ +#define __DMA_FENCE_H__ + +#include <linux/err.h> +#include <linux/list.h> +#include <linux/wait.h> +#include <linux/list.h> +#include <linux/dma-buf.h> + +struct dma_fence; +struct dma_fence_ops; +struct dma_fence_cb; + +struct dma_fence { + struct kref refcount; + struct dma_fence_ops *ops; + wait_queue_head_t event_queue; + struct list_head list_node; /* for dmabuf's fence_list */ + + /* + * This is initialized when the fence is attached to a dma-buf, + * and NULL'd before it is signaled. A fence can be attached to + * at most one dma-buf at a time. + */ + struct dma_buf *buf; +}; + +typedef int (*dma_fence_func_t)(struct dma_fence_cb *cb, + struct dma_fence *fence); + +struct dma_fence_ops { + int (*signal)(struct dma_fence *fence); + int (*add_callback)(struct dma_fence *fence, struct dma_fence_cb *cb); + int (*cancel_callback)(struct dma_fence_cb *cb); + int (*wait)(struct dma_fence *fence, bool interruptible, long timeout); +}; + +struct dma_fence_cb { + wait_queue_t base; + dma_fence_func_t func; + + /* + * This is initialized when the cb is added, and NULL'd when it + * is canceled or expired, so can be used to for error checking + * if the cb is already pending. A dma_fence_cb can be pending + * on at most one fence at a time. + */ + struct dma_fence *fence; +}; + +int __dma_fence_wake_func(wait_queue_t *wait, unsigned mode, + int flags, void *key); + +#define DMA_FENCE_CB_INITIALIZER(cb_func) { \ + .base = { .func = __dma_fence_wake_func }, \ + .func = (cb_func), \ + } + +#define DECLARE_DMA_FENCE(name, cb_func) \ + struct dma_fence_cb name = DMA_FENCE_CB_INITIALIZER(cb_func) + + +/* + * TODO does it make sense to be able to enable dma-fence without dma-buf, + * or visa versa? + */ +#ifdef CONFIG_DMA_SHARED_BUFFER + +int dma_buf_attach_fence(struct dma_buf *buf, struct dma_fence *fence); +struct dma_fence *dma_buf_get_fence(struct dma_buf *buf); + +/* create a basic (pure sw) fence: */ +struct dma_fence *dma_fence_create(void); + +/* intended to be used by other dma_fence implementations: */ +void __dma_fence_init(struct dma_fence *fence, struct dma_fence_ops *ops); + +void dma_fence_get(struct dma_fence *fence); +void dma_fence_put(struct dma_fence *fence); +int dma_fence_signal(struct dma_fence *fence); + +int dma_fence_add_callback(struct dma_fence *fence, + struct dma_fence_cb *cb); +int dma_fence_cancel_callback(struct dma_fence_cb *cb); +int dma_fence_wait(struct dma_fence *fence, bool interruptible, long timeout); + +/* helpers intended to be used by the ops of the dma_fence implementation: */ +int dma_fence_helper_signal(struct dma_fence *fence); +int dma_fence_helper_add_callback(struct dma_fence *fence, + struct dma_fence_cb *cb); +int dma_fence_helper_cancel_callback(struct dma_fence_cb *cb); +int dma_fence_helper_wait(struct dma_fence *fence, bool interruptible, + long timeout); + +#else +// TODO +#endif /* CONFIG_DMA_SHARED_BUFFER */ + +#endif /* __DMA_FENCE_H__ */ -- 1.7.9.5

13 years, 5 months

3
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[RFC PATCH 0/8] Dmabuf synchronization

by Maarten Lankhorst

This patch implements my attempt at dmabuf synchronization. The core idea is that a lot of devices will have their own methods of synchronization, but more complicated devices allow some way of fencing, so why not export those as dma-buf? This patchset implements dmabufmgr, which is based on ttm's code. The ttm code deals with a lot more than just reservation however, I took out almost all the code not dealing with reservations. I used the drm-intel-next-queued tree as base. It contains some i915 flushing changes. I would rather use linux-next, but the deferred fput code makes my system unbootable. That is unfortunate since it would reduce the deadlocks happening in dma_buf_put when 2 devices release each other's dmabuf. The i915 changes implement a simple cpu wait only, the nouveau code imports the sync dmabuf read-only and maps it to affected channels, then performs a wait on it in hardware. Since the hardware may still be processing other commands, it could be the case that no hardware wait would have to be performed at all. Only the nouveau nv84 code is tested, but the nvc0 code should work as well.

13 years, 5 months

1
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[PATCH] ARM: dma-mapping: modify condition check while freeing pages

by Prathyush K

WARNING: at mm/vmalloc.c:1471 __iommu_free_buffer+0xcc/0xd0() Trying to vfree() nonexistent vm area (ef095000) Modules linked in: [<c0015a18>] (unwind_backtrace+0x0/0xfc) from [<c0025a94>] (warn_slowpath_common+0x54/0x64) [<c0025a94>] (warn_slowpath_common+0x54/0x64) from [<c0025b38>] (warn_slowpath_fmt+0x30/0x40) [<c0025b38>] (warn_slowpath_fmt+0x30/0x40) from [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) from [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) from [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) from [<c0211230>] (drm_gem_object_free+0x28/0x34) [<c0211230>] (drm_gem_object_free+0x28/0x34) from [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) from [<c01abe10>] (idr_for_each+0x74/0xb8) [<c01abe10>] (idr_for_each+0x74/0xb8) from [<c02114e4>] (drm_gem_release+0x1c/0x30) [<c02114e4>] (drm_gem_release+0x1c/0x30) from [<c0210ae8>] (drm_release+0x608/0x694) [<c0210ae8>] (drm_release+0x608/0x694) from [<c00b75a0>] (fput+0xb8/0x228) [<c00b75a0>] (fput+0xb8/0x228) from [<c00b40c4>] (filp_close+0x64/0x84) [<c00b40c4>] (filp_close+0x64/0x84) from [<c0029d54>] (put_files_struct+0xe8/0x104) [<c0029d54>] (put_files_struct+0xe8/0x104) from [<c002b930>] (do_exit+0x608/0x774) [<c002b930>] (do_exit+0x608/0x774) from [<c002bae4>] (do_group_exit+0x48/0xb4) [<c002bae4>] (do_group_exit+0x48/0xb4) from [<c002bb60>] (sys_exit_group+0x10/0x18) [<c002bb60>] (sys_exit_group+0x10/0x18) from [<c000ee80>] (ret_fast_syscall+0x0/0x30) This patch modifies the condition while freeing to match the condition used while allocation. This fixes the above warning which arises when array size is equal to PAGE_SIZE where allocation is done using kzalloc but free is done using vfree. Signed-off-by: Prathyush K <prathyush.k(a)samsung.com> --- arch/arm/mm/dma-mapping.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index dc560dc..62fefac 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -1106,7 +1106,7 @@ static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t s for (i = 0; i < count; i++) if (pages[i]) __free_pages(pages[i], 0); - if (array_size < PAGE_SIZE) + if (array_size <= PAGE_SIZE) kfree(pages); else vfree(pages); -- 1.7.0.4

13 years, 5 months

2
1
0 0

Bad use of highmem with buffer_migrate_page?

by Laura Abbott

Hi, I did a backport of the Contiguous Memory Allocator to a 3.0.8 tree. I wrote fairly simple test case that, in 1MB chunks, allocs up to 40MB from a reserved area, maps, writes, unmaps and then frees in an infinite loop. When running this with another program in parallel to put some stress on the filesystem, I hit data aborts in the filesystem/journal layer, although not always the same backtrace. As an example: [<c02907a4>] (__ext4_check_dir_entry+0x20/0x184) from [<c029e1a8>] (add_dirent_to_buf+0x70/0x2ac) [<c029e1a8>] (add_dirent_to_buf+0x70/0x2ac) from [<c029f3f0>] (ext4_add_entry+0xd8/0x4bc) [<c029f3f0>] (ext4_add_entry+0xd8/0x4bc) from [<c029fe90>] (ext4_add_nondir+0x14/0x64) [<c029fe90>] (ext4_add_nondir+0x14/0x64) from [<c02a04c4>] (ext4_create+0xd8/0x120) [<c02a04c4>] (ext4_create+0xd8/0x120) from [<c022e134>] (vfs_create+0x74/0xa4) [<c022e134>] (vfs_create+0x74/0xa4) from [<c022ed3c>] (do_last+0x588/0x8d4) [<c022ed3c>] (do_last+0x588/0x8d4) from [<c022fe64>] (path_openat+0xc4/0x394) [<c022fe64>] (path_openat+0xc4/0x394) from [<c0230214>] (do_filp_open+0x30/0x7c) [<c0230214>] (do_filp_open+0x30/0x7c) from [<c0220cb4>] (do_sys_open+0xd8/0x174) [<c0220cb4>] (do_sys_open+0xd8/0x174) from [<c0105ea0>] (ret_fast_syscall+0x0/0x30) Every panic had the same issue where a struct buffer_head [1] had a b_data that was unexpectedly NULL. During the course of CMA, buffer_migrate_page could be called to migrate from a CMA page to a new page. buffer_migrate_page calls set_bh_page[2] to set the new page for the buffer_head. If the new page is a highmem page though, the bh->b_data ends up as NULL, which could produce the panics seen above. This seems to indicate that highmem pages are not not appropriate for use as pages to migrate to. The following made the problem go away for me: --- a/mm/page_alloc.c +++ b/mm/page_alloc.c @@ -5753,7 +5753,7 @@ static struct page * __alloc_contig_migrate_alloc(struct page *page, unsigned long private, int **resultp) { - return alloc_page(GFP_HIGHUSER_MOVABLE); + return alloc_page(GFP_USER | __GFP_MOVABLE); } Does this seem like an actual issue or is this an artifact of my backport to 3.0? I'm not familiar enough with the filesystem layer to be able to tell where highmem can actually be used. Thanks, Laura [1] http://lxr.free-electrons.com/source/include/linux/buffer_head.h#L59 [2] http://lxr.free-electrons.com/source/fs/buffer.c?v=3.0#L1441 -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

13 years, 5 months

4
6
0 0

[RFC v2] implicit drm synchronization wip with dma-buf

by Maarten Lankhorst

Well, V2 time! I was hinted to look at ttm_execbuf_util, and it does indeed contain some nice code. My goal was to extend dma-buf in a generic way now, some elements from v1 are remaining, most notably a dma-buf used for syncing. However it is expected now that dma-buf syncing will work in a very specific way now, slightly more strict than in v1. Instead of each buffer having their own dma-buf I put in 1 per command submission. This submission hasn't been run-time tested yet, but I expect the api to go something like this. Intended to be used like this: list_init(&head); add_list_tail(&validate1->entry, &head); add_list_tail(&validate2->entry, &head); add_list_tail(&validate3->entry, &head); r = dmabufmgr_eu_reserve_buffers(&head); if (r) return r; // add waits on cpu or gpu list_for_each_entry(validate, ...) { if (!validate->sync_buf) continue; // Check attachments to see if we already imported sync_buf // somewhere, if not attach to it. // waiting until cur_seq - dmabuf->sync_val >= 0 on either cpu // or as command submitted to gpu // sync_buf itself is a dma-buf, so it should be trivial // TODO: sync_buf should NEVER be validated, add is_sync_buf to dma_buf? // If this step fails: dmabufmgr_eu_backoff_reservation // else: // dmabufmgr_eu_fence_buffer_objects(our_own_sync_buf, // hwchannel * max(minhwalign, 4), ++counter[hwchannel]); // XXX: Do we still require a minimum alignment? I set up 16 for nouveau, // but this is no longer needed in this design since it only matters // for writes for which nouveau would already control the offset. } // Some time after execbuffer was executed, doesn't have to be right away but before // getting in the danger of our own counter wrapping around: // grab dmabufmgr.lru_lock, and cleanup by unreffing sync_buf when // sync_buf == ownbuf, sync_ofs == ownofs, and sync_val == saved_counter // In the meantime someone else or even us might have reserved this dma_buf // again, which is why all those checks are needed before unreffing. diff --git a/drivers/base/Makefile b/drivers/base/Makefile index 5aa2d70..86e7598 100644 --- a/drivers/base/Makefile +++ b/drivers/base/Makefile @@ -10,7 +10,7 @@ obj-$(CONFIG_CMA) += dma-contiguous.o obj-y += power/ obj-$(CONFIG_HAS_DMA) += dma-mapping.o obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o -obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf.o +obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf.o dma-buf-mgr.o dma-buf-mgr-eu.o obj-$(CONFIG_ISA) += isa.o obj-$(CONFIG_FW_LOADER) += firmware_class.o obj-$(CONFIG_NUMA) += node.o diff --git a/drivers/base/dma-buf-mgr-eu.c b/drivers/base/dma-buf-mgr-eu.c new file mode 100644 index 0000000..27ebc68 --- /dev/null +++ b/drivers/base/dma-buf-mgr-eu.c @@ -0,0 +1,170 @@ +/* + * Copyright (C) 2012 Canonical Ltd + * + * Based on ttm_bo.c which bears the following copyright notice, + * but is dual licensed: + * + * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include <linux/dma-buf-mgr.h> +#include <linux/sched.h> +#include <linux/export.h> + +static void dmabufmgr_eu_backoff_reservation_locked(struct list_head *list) +{ + struct dmabufmgr_validate *entry; + + list_for_each_entry(entry, list, head) { + struct dma_buf *bo = entry->bo; + if (!entry->reserved) + continue; + + entry->reserved = false; + atomic_set(&bo->reserved, 0); + wake_up_all(&bo->event_queue); + if (entry->sync_buf) + dma_buf_put(entry->sync_buf); + entry->sync_buf = NULL; + } +} + +static int +dmabufmgr_eu_wait_unreserved_locked(struct list_head *list, + struct dma_buf *bo) +{ + int ret; + + spin_unlock(&dmabufmgr.lru_lock); + ret = dmabufmgr_bo_wait_unreserved(bo, true); + spin_lock(&dmabufmgr.lru_lock); + if (unlikely(ret != 0)) + dmabufmgr_eu_backoff_reservation_locked(list); + return ret; +} + +void +dmabufmgr_eu_backoff_reservation(struct list_head *list) +{ + struct dmabufmgr_validate *entry; + + if (list_empty(list)) + return; + + entry = list_first_entry(list, struct dmabufmgr_validate, head); + spin_lock(&dmabufmgr.lru_lock); + dmabufmgr_eu_backoff_reservation_locked(list); + spin_unlock(&dmabufmgr.lru_lock); +} +EXPORT_SYMBOL_GPL(dmabufmgr_eu_backoff_reservation); + +int +dmabufmgr_eu_reserve_buffers(struct list_head *list) +{ + struct dmabufmgr_validate *entry; + int ret; + u32 val_seq; + + if (list_empty(list)) + return 0; + + list_for_each_entry(entry, list, head) { + entry->reserved = false; + entry->sync_buf = NULL; + } + +retry: + spin_lock(&dmabufmgr.lru_lock); + val_seq = dmabufmgr.counter++; + + list_for_each_entry(entry, list, head) { + struct dma_buf *bo = entry->bo; + +retry_this_bo: + ret = dmabufmgr_bo_reserve_locked(bo, true, true, true, val_seq); + switch (ret) { + case 0: + break; + case -EBUSY: + ret = dmabufmgr_eu_wait_unreserved_locked(list, bo); + if (unlikely(ret != 0)) { + spin_unlock(&dmabufmgr.lru_lock); + return ret; + } + goto retry_this_bo; + case -EAGAIN: + dmabufmgr_eu_backoff_reservation_locked(list); + spin_unlock(&dmabufmgr.lru_lock); + ret = dmabufmgr_bo_wait_unreserved(bo, true); + if (unlikely(ret != 0)) + return ret; + goto retry; + default: + dmabufmgr_eu_backoff_reservation_locked(list); + spin_unlock(&dmabufmgr.lru_lock); + return ret; + } + + entry->reserved = true; + if (bo->sync_buf) + get_dma_buf(bo->sync_buf); + entry->sync_buf = bo->sync_buf; + entry->sync_ofs = bo->sync_ofs; + entry->sync_val = bo->sync_val; + } + spin_unlock(&dmabufmgr.lru_lock); + + return 0; +} +EXPORT_SYMBOL_GPL(dmabufmgr_eu_reserve_buffers); + +void +dmabufmgr_eu_fence_buffer_objects(struct dma_buf *sync_buf, u32 ofs, u32 seq, struct list_head *list) +{ + struct dmabufmgr_validate *entry; + struct dma_buf *bo; + + if (list_empty(list) || WARN_ON(!sync_buf)) + return; + + spin_lock(&dmabufmgr.lru_lock); + + list_for_each_entry(entry, list, head) { + bo = entry->bo; + dmabufmgr_bo_unreserve_locked(bo); + entry->reserved = false; + if (entry->sync_buf) + dma_buf_put(entry->sync_buf); + entry->sync_buf = NULL; + + get_dma_buf(sync_buf); + bo->sync_buf = sync_buf; + bo->sync_ofs = ofs; + bo->sync_val = seq; + } + + spin_unlock(&dmabufmgr.lru_lock); +} +EXPORT_SYMBOL_GPL(dmabufmgr_eu_fence_buffer_objects); diff --git a/drivers/base/dma-buf-mgr.c b/drivers/base/dma-buf-mgr.c new file mode 100644 index 0000000..14756ff --- /dev/null +++ b/drivers/base/dma-buf-mgr.c @@ -0,0 +1,149 @@ +/* + * Copyright (C) 2012 Canonical Ltd + * + * Based on ttm_bo.c which bears the following copyright notice, + * but is dual licensed: + * + * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ +/* + * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> + */ + + +#include <linux/fs.h> +#include <linux/slab.h> +#include <linux/dma-buf-mgr.h> +#include <linux/anon_inodes.h> +#include <linux/export.h> +#include <linux/sched.h> +#include <linux/list.h> + +/* Based on ttm_bo.c with vm_lock and fence_lock removed + * lru_lock takes care of fence_lock as well + */ +struct dmabufmgr dmabufmgr = { + .lru_lock = __SPIN_LOCK_UNLOCKED(dmabufmgr.lru_lock), + .counter = 1, +}; + +int +dmabufmgr_bo_reserve_locked(struct dma_buf *bo, + bool interruptible, bool no_wait, + bool use_sequence, u32 sequence) +{ + int ret; + + while (unlikely(atomic_cmpxchg(&bo->reserved, 0, 1) != 0)) { + /** + * Deadlock avoidance for multi-bo reserving. + */ + if (use_sequence && bo->seq_valid) { + /** + * We've already reserved this one. + */ + if (unlikely(sequence == bo->val_seq)) + return -EDEADLK; + /** + * Already reserved by a thread that will not back + * off for us. We need to back off. + */ + if (unlikely(sequence - bo->val_seq < (1 << 31))) + return -EAGAIN; + } + + if (no_wait) + return -EBUSY; + + spin_unlock(&dmabufmgr.lru_lock); + ret = dmabufmgr_bo_wait_unreserved(bo, interruptible); + spin_lock(&dmabufmgr.lru_lock); + + if (unlikely(ret)) + return ret; + } + + if (use_sequence) { + /** + * Wake up waiters that may need to recheck for deadlock, + * if we decreased the sequence number. + */ + if (unlikely((bo->val_seq - sequence < (1 << 31)) + || !bo->seq_valid)) + wake_up_all(&bo->event_queue); + + bo->val_seq = sequence; + bo->seq_valid = true; + } else { + bo->seq_valid = false; + } + + return 0; +} +EXPORT_SYMBOL_GPL(dmabufmgr_bo_reserve_locked); + +int +dmabufmgr_bo_reserve(struct dma_buf *bo, + bool interruptible, bool no_wait, + bool use_sequence, u32 sequence) +{ + int ret; + + spin_lock(&dmabufmgr.lru_lock); + ret = dmabufmgr_bo_reserve_locked(bo, interruptible, no_wait, + use_sequence, sequence); + spin_unlock(&dmabufmgr.lru_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(dmabufmgr_bo_reserve); + +int +dmabufmgr_bo_wait_unreserved(struct dma_buf *bo, bool interruptible) +{ + if (interruptible) { + return wait_event_interruptible(bo->event_queue, + atomic_read(&bo->reserved) == 0); + } else { + wait_event(bo->event_queue, atomic_read(&bo->reserved) == 0); + return 0; + } +} +EXPORT_SYMBOL_GPL(dmabufmgr_bo_wait_unreserved); + +void dmabufmgr_bo_unreserve_locked(struct dma_buf *bo) +{ + atomic_set(&bo->reserved, 0); + wake_up_all(&bo->event_queue); +} +EXPORT_SYMBOL_GPL(dmabufmgr_bo_unreserve_locked); + +void dmabufmgr_bo_unreserve(struct dma_buf *bo) +{ + spin_lock(&dmabufmgr.lru_lock); + dmabufmgr_bo_unreserve_locked(bo); + spin_unlock(&dmabufmgr.lru_lock); +} +EXPORT_SYMBOL_GPL(dmabufmgr_bo_unreserve); diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index 24e88fe..01c4f71 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -40,6 +40,9 @@ static int dma_buf_release(struct inode *inode, struct file *file) dmabuf = file->private_data; dmabuf->ops->release(dmabuf); + BUG_ON(waitqueue_active(&dmabuf->event_queue)); + if (dmabuf->sync_buf) + dma_buf_put(dmabuf->sync_buf); kfree(dmabuf); return 0; } @@ -119,6 +122,7 @@ struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops, mutex_init(&dmabuf->lock); INIT_LIST_HEAD(&dmabuf->attachments); + init_waitqueue_head(&dmabuf->event_queue); return dmabuf; } diff --git a/include/linux/dma-buf-mgr.h b/include/linux/dma-buf-mgr.h new file mode 100644 index 0000000..b26462e --- /dev/null +++ b/include/linux/dma-buf-mgr.h @@ -0,0 +1,84 @@ +/* + * Header file for dma buffer sharing framework. + * + * Copyright(C) 2011 Linaro Limited. All rights reserved. + * Author: Sumit Semwal <sumit.semwal(a)ti.com> + * + * Many thanks to linaro-mm-sig list, and specially + * Arnd Bergmann <arnd(a)arndb.de>, Rob Clark <rob(a)ti.com> and + * Daniel Vetter <daniel(a)ffwll.ch> for their support in creation and + * refining of this idea. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __DMA_BUF_MGR_H__ +#define __DMA_BUF_MGR_H__ + +#include <linux/dma-buf.h> +#include <linux/list.h> + +/** Size of each hwcontext in synchronization dma-buf */ +#define DMABUFMGR_HWCONTEXT_SYNC_ALIGN 16 + +struct dmabufmgr { + spinlock_t lru_lock; + + u32 counter; +}; +extern struct dmabufmgr dmabufmgr; + +extern int +dmabufmgr_bo_reserve_locked(struct dma_buf *bo, + bool interruptible, bool no_wait, + bool use_sequence, u32 sequence); + +extern int +dmabufmgr_bo_reserve(struct dma_buf *bo, + bool interruptible, bool no_wait, + bool use_sequence, u32 sequence); + +extern void +dmabufmgr_bo_unreserve_locked(struct dma_buf *bo); + +extern void +dmabufmgr_bo_unreserve(struct dma_buf *bo); + +extern int +dmabufmgr_bo_wait_unreserved(struct dma_buf *bo, bool interruptible); + +/* execbuf util support for reservations + * matches ttm_execbuf_util + */ +struct dmabufmgr_validate { + struct list_head head; + struct dma_buf *bo; + bool reserved; + + /* If non-null, check for attachments */ + struct dma_buf *sync_buf; + u32 sync_ofs, sync_val; +}; + +/** reserve a linked list of struct dmabufmgr_validate entries */ +extern int +dmabufmgr_eu_reserve_buffers(struct list_head *list); + +/** Undo reservation */ +extern void +dmabufmgr_eu_backoff_reservation(struct list_head *list); + +/** Commit reservation */ +extern void +dmabufmgr_eu_fence_buffer_objects(struct dma_buf *sync_buf, u32 ofs, u32 val, struct list_head *list); + +#endif /* __DMA_BUF_MGR_H__ */ diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index eb48f38..b2ab395 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h @@ -113,6 +113,8 @@ struct dma_buf_ops { * @attachments: list of dma_buf_attachment that denotes all devices attached. * @ops: dma_buf_ops associated with this buffer object. * @priv: exporter specific private data for this buffer object. + * @bufmgr_entry: used by dmabufmgr + * @bufdev: used by dmabufmgr */ struct dma_buf { size_t size; @@ -122,6 +124,24 @@ struct dma_buf { /* mutex to serialize list manipulation and attach/detach */ struct mutex lock; void *priv; + + /** dmabufmgr members */ + wait_queue_head_t event_queue; + + /** + * dmabufmgr members protected by the dmabufmgr::lru_lock. + */ + u32 val_seq; + bool seq_valid; + + struct dma_buf *sync_buf; + u32 sync_ofs, sync_val; + + /** + * dmabufmgr members protected by the dmabufmgr::lru_lock + * only when written to. + */ + atomic_t reserved; }; /**

13 years, 5 months

1
0
0 0

[PATCHv4 0/2] ARM: replace custom consistent dma region with vmalloc

by Marek Szyprowski

Hello! This quick update on the patchset which replaces custom consistent dma regions usage in dma-mapping framework in favour of generic vmalloc areas created on demand for each allocation. The main purpose for this patchset is to remove 2MiB limit of dma coherent/writecombine allocations. In this version arch-independent VM_DMA flag has been replaced with ARM-specific VM_ARM_DMA_CONSISTENT flag. This patch is based on vanilla v3.5-rc4 release. Best regards Marek Szyprowski Samsung Poland R&D Center Changelog: v4: - replaced arch-independent VM_DMA flag with ARM-specific VM_ARM_DMA_CONSISTENT flag v3: http://thread.gmane.org/gmane.linux.kernel.mm/80028/ - rebased onto v3.4-rc2: added support for IOMMU-aware implementation of dma-mapping calls, unified with CMA coherent dma pool - implemented changes requested by Minchan Kim: added more checks for vmarea->flags & VM_DMA, renamed some variables, removed obsole locks, squashed find_vm_area() exporting patch into the main redesign patch v2: http://thread.gmane.org/gmane.linux.kernel.mm/78563 - added support for atomic allocations (served from preallocated pool) - minor cleanup here and there - rebased onto v3.4-rc7 v1: http://thread.gmane.org/gmane.linux.kernel.mm/76703 - initial version Patch summary: Marek Szyprowski (2): mm: vmalloc: use const void * for caller argument ARM: dma-mapping: remove custom consistent dma region Documentation/kernel-parameters.txt | 2 +- arch/arm/include/asm/dma-mapping.h | 2 +- arch/arm/mm/dma-mapping.c | 505 +++++++++++++---------------------- arch/arm/mm/mm.h | 3 + include/linux/vmalloc.h | 9 +- mm/vmalloc.c | 28 ++- 6 files changed, 207 insertions(+), 342 deletions(-) -- 1.7.1.569.g6f426

13 years, 5 months

3
7
0 0

[PATCH] common: dma-mapping: add support for generic dma_mmap_* calls

by Marek Szyprowski

Commit 9adc5374 ('common: dma-mapping: introduce mmap method') added a generic method for implementing mmap user call to dma_map_ops structure. This patch converts ARM and PowerPC architectures (the only providers of dma_mmap_coherent/dma_mmap_writecombine calls) to use this generic dma_map_ops based call and adds a generic cross architecture definition for dma_mmap_attrs, dma_mmap_coherent, dma_mmap_writecombine functions. The generic mmap virt_to_page-based fallback implementation is provided for architectures which don't provide their own implementation for mmap method. Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- Hello, This patch is a continuation of my works on dma-mapping cleanup and unification. Previous works (commit 58bca4a8fa ('Merge branch 'for-linus' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping') has been merged to v3.4-rc2. Now I've focuses on providing implementation for all architectures so the drivers and some cross-architecture common helpers (like for example videobuf2) can start using this new api. I'm not 100% sure if the PowerPC changes are correct. The cases of dma_iommu_ops and vio_dma_mapping_ops are a bit suspicious for me, but I have no way to test and check if my changes works for that hardware. Best regards Marek Szyprowski Samsung Poland R&D Center --- arch/arm/include/asm/dma-mapping.h | 19 --------------- arch/powerpc/include/asm/dma-mapping.h | 8 +++--- arch/powerpc/kernel/dma-iommu.c | 1 + arch/powerpc/kernel/dma-swiotlb.c | 1 + arch/powerpc/kernel/dma.c | 36 +++++++++++++++------------- arch/powerpc/kernel/vio.c | 1 + drivers/base/dma-mapping.c | 31 +++++++++++++++++++++++++ include/asm-generic/dma-coherent.h | 1 + include/asm-generic/dma-mapping-common.h | 37 ++++++++++++++++++++++++++++++ 9 files changed, 95 insertions(+), 40 deletions(-) diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index bbef15d..8645088 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -186,17 +186,6 @@ extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs); -#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL) - -static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, - void *cpu_addr, dma_addr_t dma_addr, - size_t size, struct dma_attrs *attrs) -{ - struct dma_map_ops *ops = get_dma_ops(dev); - BUG_ON(!ops); - return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); -} - static inline void *dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag) { @@ -213,14 +202,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size, return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs); } -static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, - void *cpu_addr, dma_addr_t dma_addr, size_t size) -{ - DEFINE_DMA_ATTRS(attrs); - dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); - return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs); -} - /* * This can be called during boot to increase the size of the consistent * DMA region above it's default value of 2MB. It must be called before the diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index 62678e3..7816087 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h @@ -27,7 +27,10 @@ extern void *dma_direct_alloc_coherent(struct device *dev, size_t size, extern void dma_direct_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle, struct dma_attrs *attrs); - +extern int dma_direct_mmap_coherent(struct device *dev, + struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t handle, + size_t size, struct dma_attrs *attrs); #ifdef CONFIG_NOT_COHERENT_CACHE /* @@ -207,11 +210,8 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -extern int dma_mmap_coherent(struct device *, struct vm_area_struct *, - void *, dma_addr_t, size_t); #define ARCH_HAS_DMA_MMAP_COHERENT - static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c index bcfdcd2..2d7bb8c 100644 --- a/arch/powerpc/kernel/dma-iommu.c +++ b/arch/powerpc/kernel/dma-iommu.c @@ -109,6 +109,7 @@ static u64 dma_iommu_get_required_mask(struct device *dev) struct dma_map_ops dma_iommu_ops = { .alloc = dma_iommu_alloc_coherent, .free = dma_iommu_free_coherent, + .mmap = dma_direct_mmap_coherent, .map_sg = dma_iommu_map_sg, .unmap_sg = dma_iommu_unmap_sg, .dma_supported = dma_iommu_dma_supported, diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c index 4ab88da..4694365 100644 --- a/arch/powerpc/kernel/dma-swiotlb.c +++ b/arch/powerpc/kernel/dma-swiotlb.c @@ -49,6 +49,7 @@ static u64 swiotlb_powerpc_get_required(struct device *dev) struct dma_map_ops swiotlb_dma_ops = { .alloc = dma_direct_alloc_coherent, .free = dma_direct_free_coherent, + .mmap = dma_direct_mmap_coherent, .map_sg = swiotlb_map_sg_attrs, .unmap_sg = swiotlb_unmap_sg_attrs, .dma_supported = swiotlb_dma_supported, diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c index b1ec983..062bf20 100644 --- a/arch/powerpc/kernel/dma.c +++ b/arch/powerpc/kernel/dma.c @@ -65,6 +65,24 @@ void dma_direct_free_coherent(struct device *dev, size_t size, #endif } +int dma_direct_mmap_coherent(struct device *dev, struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t handle, size_t size, + struct dma_attrs *attrs) +{ + unsigned long pfn; + +#ifdef CONFIG_NOT_COHERENT_CACHE + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + pfn = __dma_get_coherent_pfn((unsigned long)cpu_addr); +#else + pfn = page_to_pfn(virt_to_page(cpu_addr)); +#endif + return remap_pfn_range(vma, vma->vm_start, + pfn + vma->vm_pgoff, + vma->vm_end - vma->vm_start, + vma->vm_page_prot); +} + static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, enum dma_data_direction direction, struct dma_attrs *attrs) @@ -154,6 +172,7 @@ static inline void dma_direct_sync_single(struct device *dev, struct dma_map_ops dma_direct_ops = { .alloc = dma_direct_alloc_coherent, .free = dma_direct_free_coherent, + .mmap = dma_direct_mmap_coherent, .map_sg = dma_direct_map_sg, .unmap_sg = dma_direct_unmap_sg, .dma_supported = dma_direct_dma_supported, @@ -211,20 +230,3 @@ static int __init dma_init(void) } fs_initcall(dma_init); -int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, - void *cpu_addr, dma_addr_t handle, size_t size) -{ - unsigned long pfn; - -#ifdef CONFIG_NOT_COHERENT_CACHE - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); - pfn = __dma_get_coherent_pfn((unsigned long)cpu_addr); -#else - pfn = page_to_pfn(virt_to_page(cpu_addr)); -#endif - return remap_pfn_range(vma, vma->vm_start, - pfn + vma->vm_pgoff, - vma->vm_end - vma->vm_start, - vma->vm_page_prot); -} -EXPORT_SYMBOL_GPL(dma_mmap_coherent); diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c index cb87301..dda3d9a 100644 --- a/arch/powerpc/kernel/vio.c +++ b/arch/powerpc/kernel/vio.c @@ -613,6 +613,7 @@ static u64 vio_dma_get_required_mask(struct device *dev) struct dma_map_ops vio_dma_mapping_ops = { .alloc = vio_dma_iommu_alloc_coherent, .free = vio_dma_iommu_free_coherent, + .mmap = dma_direct_mmap_coherent, .map_sg = vio_dma_iommu_map_sg, .unmap_sg = vio_dma_iommu_unmap_sg, .map_page = vio_dma_iommu_map_page, diff --git a/drivers/base/dma-mapping.c b/drivers/base/dma-mapping.c index 6f3676f..db5db02 100644 --- a/drivers/base/dma-mapping.c +++ b/drivers/base/dma-mapping.c @@ -10,6 +10,7 @@ #include <linux/dma-mapping.h> #include <linux/export.h> #include <linux/gfp.h> +#include <asm-generic/dma-coherent.h> /* * Managed DMA API @@ -218,3 +219,33 @@ void dmam_release_declared_memory(struct device *dev) EXPORT_SYMBOL(dmam_release_declared_memory); #endif + +/* + * Create userspace mapping for the DMA-coherent memory. + */ +int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t dma_addr, size_t size) +{ + int ret = -ENXIO; +#ifdef CONFIG_MMU + unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; + unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; + unsigned long pfn = page_to_pfn(virt_to_page(cpu_addr)); + unsigned long off = vma->vm_pgoff; + + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret)) + return ret; + + if (off < count && user_count <= (count - off)) { + ret = remap_pfn_range(vma, vma->vm_start, + pfn + off, + user_count << PAGE_SHIFT, + vma->vm_page_prot); + } +#endif /* CONFIG_MMU */ + + return ret; +} +EXPORT_SYMBOL(dma_common_mmap); diff --git a/include/asm-generic/dma-coherent.h b/include/asm-generic/dma-coherent.h index abfb268..2be8a2d 100644 --- a/include/asm-generic/dma-coherent.h +++ b/include/asm-generic/dma-coherent.h @@ -29,6 +29,7 @@ dma_mark_declared_memory_occupied(struct device *dev, #else #define dma_alloc_from_coherent(dev, size, handle, ret) (0) #define dma_release_from_coherent(dev, order, vaddr) (0) +#define dma_mmap_from_coherent(dev, vma, vaddr, order, ret) (0) #endif #endif diff --git a/include/asm-generic/dma-mapping-common.h b/include/asm-generic/dma-mapping-common.h index 2e248d8..9073aeb 100644 --- a/include/asm-generic/dma-mapping-common.h +++ b/include/asm-generic/dma-mapping-common.h @@ -176,4 +176,41 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL) #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL) +extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t dma_addr, size_t size); + +/** + * dma_mmap_attrs - map a coherent DMA allocation into user space + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices + * @vma: vm_area_struct describing requested user mapping + * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs + * @handle: device-view address returned from dma_alloc_attrs + * @size: size of memory originally requested in dma_alloc_attrs + * @attrs: attributes of mapping properties requested in dma_alloc_attrs + * + * Map a coherent DMA buffer previously allocated by dma_alloc_attrs + * into user space. The coherent DMA buffer must not be freed by the + * driver until the user space mapping has been released. + */ +static inline int +dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, + dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs) +{ + struct dma_map_ops *ops = get_dma_ops(dev); + BUG_ON(!ops); + if (ops->mmap) + return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); + return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size); +} + +#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL) + +static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t dma_addr, size_t size) +{ + DEFINE_DMA_ATTRS(attrs); + dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); + return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs); +} + #endif -- 1.7.1.569.g6f426

13 years, 5 months

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[PATCH 0/2] Add return value checks in the drm-dmabuf

by Subash Patel

From: Subash Patel <subash.rp(a)samsung.com> This patch series is split and re-send of my original patch, after request from Inki Dae. Below two patches add the required error checks in drm dmabuf when the system fails to allocate pages for the scatter-gather. This is very rare situation, and occurs when the system is under memory pressure. Scatter-gather asks for memory using sg_kmalloc() and this can return no memory. Without below return value checks, the code will crash the system due to invalid pointer access. Subash Patel (2): DRM: Exynos: return NULL if exynos_pages_to_sg fails DRM: Exynos: check for null in return value of dma_buf_map_attachment() drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 1.7.9.5

13 years, 5 months

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implicit drm synchronization wip with dma-buf

by Maarten Lankhorst

Hey, Due to inertia, I thought I would take a shot at implicit synchronization as well. I have just barely enough to make it work for nouveau to synchronize with itself now using the cpu. Hopefully the general idea is correct but I feel the implementation wrong. There are 2 ways to get deadlocks if no proper care is taken to avoid it, the first being 2 tasks taking each device's lock in a different order, the second 2 devices waiting on completion of each other before starting own work. The easiest way to avoid this is to introduce a global dma_buf_submit_mutex so in cases where synchronization is needed. This way only 1 submission involving dma-buffer synchronisation can be made simultaneously. This will make it impossible to deadlock because even if you take dma mutex->dev a mutex->dev b mutex, and swap a and b, the dmabuf mutex would prevent this from being done at the same time. That leaves the real problem of the synchronization itself. I felt that because the code involved was already sharing dma-buf's, the easiest way to implement it would be.. another dma-buf. Some hardware might have specific requirements on them, so I haven't pinned down the exact details yet. It's a bit of intermingling between drm and dma-buf namespace since it is an early wip, any comments are welcome though. This is what I used so far: #define DRM_PRIME_FENCE_MAX 2 struct drm_prime_fence { struct dma_buf *sync_buf; uint64_t offset; uint32_t value; enum { /* Nop is to allow preparations in case dma_buf * is different for release, so the call will * never fail at that point. */ DRM_PRIME_FENCE_NOP = 0, DRM_PRIME_FENCE_WAIT_EQ, // DRM_PRIME_FENCE_WAIT_GE, /* block while ((int)(cur - expected) < 0); */ DRM_PRIME_FENCE_SET } op; }; and added to struct dma_buf_ops: /* drm_prime_fence_ is written by function to indicate what is needed * to acquire this buffer, up to DRM_PRIME_FENCE_MAX buffers are allowed * sync_acquire returns a negative value on error, otherwise * amounts of fence ops that need to be executed. * * Release is not allowed to fail and merely returns number of * fence ops that needs to be executed after command stream is done. * Abort occurs when there's a failure between acquire and release, * for example because dma-buf's from multiple devices are involved * and the other one failed to acquire. */ int (*sync_acquire)(struct dma_buf *, struct drm_prime_fence fence[2], unsigned long align, unsigned long release_write); int (*sync_release)(struct dma_buf * struct drm_prime_fence fence[2]); void (*sync_abort)(struct dma_buf *); I'm not completely sure about this part yet, align can be seen as minimum alignment requirement, ideally I would negotiate those earlier but I haven't found the correct place yet, maybe on attach? nouveau writes a 16 byte stamp as part of it's semaphore ops (4 bytes programmable, 4 bytes pad, 8 bytes timestamp) which is why I need to communicate those requirements somehow. Not all nouveau cards wold support DRM_PRIME_FENCE_WAIT_GE either. I think there is a great power in making the sync object itself just another dma-buf that can be written to and/or read. Especially since all graphics card have some way to write an arbitrary 4-byte value to an arbitrary location (even the oldest intel cards have a blitter! :D). I'm hoping for more input into making the api better for other users too, which is why I'm posting this as early as I had something working (for some definition of working). Thoughts? ~Maarten

13 years, 5 months

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[PATCH v6 0/4] Add CMA heap for ION memory manager

by Benjamin Gaignard

The goal of those patches is to allow ION clients (drivers or userland applications) to use Contiguous Memory Allocator (CMA). To get more info about CMA: http://lists.linaro.org/pipermail/linaro-mm-sig/2012-February/001328.html patches version 6: - add private field in ion_platform_heap to pass the device linked with CMA. - rework CMA heap to use private field. - prepare CMA heap for incoming dma_common_get_sgtable function http://lists.linaro.org/pipermail/linaro-mm-sig/2012-June/002109.html - simplify ion-ux500 driver. patches version 5: - port patches on android kernel 3.4 where ION use dmabuf - add ion_cma_heap_map_dma and ion_cma_heap_unmap_dma functions patches version 4: - add ION_HEAP_TYPE_DMA heap type in ion_heap_type enum. - CMA heap is now a "native" ION heap. - add ion_heap_create_full function to keep backward compatibilty. - clean up included files in CMA heap - ux500-ion is using ion_heap_create_full instead of ion_heap_create patches version 3: - add a private field in ion_heap structure instead of expose ion_device structure to all heaps - ion_cma_heap is no more a platform driver - ion_cma_heap use ion_heap private field to store the device pointer and make the link with reserved CMA regions - provide ux500-ion driver and configuration file for snowball board to give an example of how use CMA heaps patches version 2: - fix comments done by Andy Green Benjamin Gaignard (4): fix ion_platform_data definition add private field in ion_heap and ion_platform_heap structure add CMA heap add test/example driver for ux500 platform arch/arm/mach-ux500/board-mop500.c | 64 +++++++++++++ drivers/gpu/ion/Kconfig | 5 + drivers/gpu/ion/Makefile | 5 +- drivers/gpu/ion/ion_cma_heap.c | 179 ++++++++++++++++++++++++++++++++++++ drivers/gpu/ion/ion_heap.c | 11 +++ drivers/gpu/ion/ion_priv.h | 8 ++ drivers/gpu/ion/ux500/Makefile | 1 + drivers/gpu/ion/ux500/ux500_ion.c | 134 +++++++++++++++++++++++++++ include/linux/ion.h | 7 +- 9 files changed, 412 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/ion/ion_cma_heap.c create mode 100644 drivers/gpu/ion/ux500/Makefile create mode 100644 drivers/gpu/ion/ux500/ux500_ion.c -- 1.7.10

13 years, 5 months

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[PATCH 2/2] DRM: Exynos: check for null in return value of dma_buf_map_attachment()

by Subash Patel

From: Subash Patel <subash.rp(a)samsung.com> dma_buf_map_attachment() can return NULL and valid sg as return value. Hence the check for the returned scatter-gather must be using the inline function IS_ERR_OR_NULL() in place of IS_ERR() Change-Id: I33218480e220f6a26a1e726b336bf533a95363de Signed-off-by: Subash Patel <subash.ramaswamy(a)linaro.org> CC: dri-devel(a)lists.freedesktop.org CC: linux-samsung-soc(a)vger.kernel.org CC: linaro-mm-sig(a)lists.linaro.org CC: inki.dae(a)samsung.com CC: airlied(a)redhat.com CC: olofj(a)chromium.org --- drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c index 52cf761..c908a29 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c @@ -245,7 +245,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev, sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); - if (IS_ERR(sgt)) { + if (IS_ERR_OR_NULL(sgt)) { ret = PTR_ERR(sgt); goto err_buf_detach; } -- 1.7.9.5

13 years, 5 months

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[PATCH 1/2] DRM: Exynos: return NULL if exynos_pages_to_sg fails

by Subash Patel

From: Subash Patel <subash.rp(a)samsung.com> exynos_pages_to_sg() internally calls sg_kmalloc() which can return no pages when the system is under high memory crunch. One such instance is chromeos-install in the chromeos. This patch adds check for the return value of the function in subject to return NULL on failure. Change-Id: I541ed30491a926ebe72738225041c9f2d88007bc Signed-off-by: Subash Patel <subash.ramaswamy(a)linaro.org> CC: dri-devel(a)lists.freedesktop.org CC: linux-samsung-soc(a)vger.kernel.org CC: linaro-mm-sig(a)lists.linaro.org CC: inki.dae(a)samsung.com CC: airlied(a)redhat.com CC: olofj(a)chromium.org --- drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c index 97325c1..52cf761 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c @@ -87,6 +87,10 @@ static struct sg_table * npages = buf->size / buf->page_size; sgt = exynos_pages_to_sg(buf->pages, npages, buf->page_size); + if (!sgt) { + DRM_DEBUG_PRIME("exynos_pages_to_sg returned NULL!\n"); + goto err_unlock; + } nents = dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir); DRM_DEBUG_PRIME("npages = %d buffer size = 0x%lx page_size = 0x%lx\n", -- 1.7.9.5

13 years, 5 months

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[PATCH] DRM: exynos: return NULL if exynos_pages_to_sg fails

by Subash Patel

From: Subash Patel <subash.rp(a)samsung.com> exynos_pages_to_sg() internally calls sg_kmalloc() which can return no pages when the system is under high memory crunch. One such instance is chromeos-install in the chromeos. This patch adds check for the return value of the function in subject to return NULL on failure. Signed-off-by: Subash Patel <subash.ramaswamy(a)linaro.org> CC: dri-devel(a)lists.freedesktop.org CC: linux-samsung-soc(a)vger.kernel.org CC: linaro-mm-sig(a)lists.linaro.org CC: inki.dae(a)samsung.com CC: airlied(a)redhat.com CC: olofj(a)chromium.org --- drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c index 97325c1..c908a29 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c @@ -87,6 +87,10 @@ static struct sg_table * npages = buf->size / buf->page_size; sgt = exynos_pages_to_sg(buf->pages, npages, buf->page_size); + if (!sgt) { + DRM_DEBUG_PRIME("exynos_pages_to_sg returned NULL!\n"); + goto err_unlock; + } nents = dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir); DRM_DEBUG_PRIME("npages = %d buffer size = 0x%lx page_size = 0x%lx\n", @@ -241,7 +245,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev, sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); - if (IS_ERR(sgt)) { + if (IS_ERR_OR_NULL(sgt)) { ret = PTR_ERR(sgt); goto err_buf_detach; } -- 1.7.9.5

13 years, 5 months

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[GIT PULL] DMA-mapping fixes for v3.5-rc5

by Marek Szyprowski

Hi Linus, I would like to ask for pulling another minor fixup for ARM dma-mapping redesign and extensions merged in v3.5-rc1. The following changes since commit 6b16351acbd415e66ba16bf7d473ece1574cf0bc: Linux 3.5-rc4 (2012-06-24 12:53:04 -0700) with the top-most commit 593f47355467b9ef44293698817e2bdb347e2d11 ARM: dma-mapping: fix buffer chunk allocation order are available in the git repository at: git://git.linaro.org/people/mszyprowski/linux-dma-mapping.git fixes-for-linus Marek Szyprowski (1): ARM: dma-mapping: fix buffer chunk allocation order arch/arm/mm/dma-mapping.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) Thanks! Best regards Marek Szyprowski Samsung Poland R&D Center

13 years, 5 months

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[PATCH] DRM: exynos: return NULL if exynos_pages_to_sg fails

by Subash Patel

From: Subash Patel <subash.rp(a)samsung.com> exynos_pages_to_sg() internally calls sg_kmalloc() which can return no pages when the system is under high memory crunch. One such instance is chromeos-install in the chromeos. This patch adds check for the return value of the function in subject to return NULL on failure. BUG=chrome-os-partner:9481 TEST=built, ran on snow and tried chromeos-install without a crash Change-Id: I0abda74beaedae002a17de9962d7a462a2a7c2fb Signed-off-by: Subash Patel <subash.rp(a)samsung.com> --- drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c index 97325c1..c908a29 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c @@ -87,6 +87,10 @@ static struct sg_table * npages = buf->size / buf->page_size; sgt = exynos_pages_to_sg(buf->pages, npages, buf->page_size); + if (!sgt) { + DRM_DEBUG_PRIME("exynos_pages_to_sg returned NULL!\n"); + goto err_unlock; + } nents = dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir); DRM_DEBUG_PRIME("npages = %d buffer size = 0x%lx page_size = 0x%lx\n", @@ -241,7 +245,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev, sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); - if (IS_ERR(sgt)) { + if (IS_ERR_OR_NULL(sgt)) { ret = PTR_ERR(sgt); goto err_buf_detach; } -- 1.7.9.5

13 years, 5 months

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[PATCH] lib/scatterlist: do not re-write gfp_flags in __sg_alloc_table

by Mandeep Singh Baines

We are seeing a lot of sg_alloc_table allocation failures using the new drm prime infrastructure. We isolated the cause to code in __sg_alloc_table that was re-writing the gfp_flags. There is a comment in the code that suggest that there is an assumption about the allocation coming from a memory pool. This was likely true when sg lists were primarily used for disk I/O. Change-Id: I459169f56e4a9aa859661b22ec9d4e6925f99e85 Signed-off-by: Mandeep Singh Baines <msb(a)chromium.org> Cc: dri-devel(a)lists.freedesktop.org Cc: linaro-mm-sig(a)lists.linaro.org Cc: Jens Axboe <axboe(a)kernel.dk> Cc: Paul Gortmaker <paul.gortmaker(a)windriver.com> Cc: Cong Wang <amwang(a)redhat.com> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Rob Clark <rob.clark(a)linaro.org> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Inki Dae <inki.dae(a)samsung.com> Cc: Dave Airlie <airlied(a)redhat.com> Cc: Sonny Rao <sonnyrao(a)chromium.org> Cc: Olof Johansson <olofj(a)chromium.org> --- lib/scatterlist.c | 8 -------- 1 files changed, 0 insertions(+), 8 deletions(-) diff --git a/lib/scatterlist.c b/lib/scatterlist.c index 6096e89..d09bdd8 100644 --- a/lib/scatterlist.c +++ b/lib/scatterlist.c @@ -279,14 +279,6 @@ int __sg_alloc_table(struct sg_table *table, unsigned int nents, if (!left) sg_mark_end(&sg[sg_size - 1]); - /* - * only really needed for mempool backed sg allocations (like - * SCSI), a possible improvement here would be to pass the - * table pointer into the allocator and let that clear these - * flags - */ - gfp_mask &= ~__GFP_WAIT; - gfp_mask |= __GFP_HIGH; prv = sg; } while (left); -- 1.7.7.3

13 years, 5 months

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[PATCHv3 0/3] ARM: replace custom consistent dma region with vmalloc

by Marek Szyprowski

Hello! This patchset replaces custom consistent dma regions usage in dma-mapping framework in favour of generic vmalloc areas created on demand for each allocation. The main purpose for this patchset is to remove 2MiB limit of dma coherent/writecombine allocations. Atomic allocations are served from special pool preallocated on boot, becasue vmalloc areas cannot be reliably created in atomic context. Linux v3.5-rc1 introduced a lot of changes to ARM dma-mapping subsystem (CMA and dmamap_ops based implementation has been finally merged), so the previous version of these patches is not applicable anymore. This version provides an update required for applying them on v3.5-rc2 kernel as well as some changes requested by Minchan Kim in his review. This patch is based on vanilla v3.5-rc2 release. Atomic allocations have been tested with s3c-sdhci driver on Samsung UniversalC210 board with dmabounce code enabled to force dma_alloc_coherent() use on each dma_map_* call (some of them are made from interrupts). Best regards Marek Szyprowski Samsung Poland R&D Center Changelog: v3: - rebased onto v3.4-rc2: added support for IOMMU-aware implementation of dma-mapping calls, unified with CMA coherent dma pool - implemented changes requested by Minchan Kim: added more checks for vmarea->flags & VM_DMA, renamed some variables, removed obsole locks, squashed find_vm_area() exporting patch into the main redesign patch v2: http://thread.gmane.org/gmane.linux.kernel.mm/78563 - added support for atomic allocations (served from preallocated pool) - minor cleanup here and there - rebased onto v3.4-rc7 v1: http://thread.gmane.org/gmane.linux.kernel.mm/76703 - initial version Patch summary: Marek Szyprowski (3): mm: vmalloc: use const void * for caller argument mm: vmalloc: add VM_DMA flag to indicate areas used by dma-mapping framework ARM: dma-mapping: remove custom consistent dma region Documentation/kernel-parameters.txt | 2 +- arch/arm/include/asm/dma-mapping.h | 2 +- arch/arm/mm/dma-mapping.c | 503 ++++++++++++----------------------- include/linux/vmalloc.h | 10 +- mm/vmalloc.c | 31 ++- 5 files changed, 206 insertions(+), 342 deletions(-) -- 1.7.1.569.g6f426

13 years, 5 months

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