The upstream versions of the MCPM code for vexpress contains several
fixes and tidy-ups in the cache disabling sequences. This patch
series backports all of these to LSK.
These patches are also available in a branch to pull...
The following changes since commit 4bb2d496b52029fc12322af09f1a5dda95affdba:
ARM: vexpress: tc2: fix hotplug/idle/kexec race on cluster power down (2013-11-29 16:14:49 +0000)
are available in the git repository at:
git://git.linaro.org/people/tixy/kernel.git for-lsk-tc2
for you to fetch changes up to 27d55bacd5002422f8dab3ee6f941a2e23eb38c5:
ARM: 7861/1: cacheflush: consolidate single-CPU ARMv7 cache disabling code (2013-12-02 12:54:17 +0000)
----------------------------------------------------------------
Jon Medhurst (1):
ARM: vexpress/TC2: Match mainline cache disabling sequence in tc2_pm_down
Nicolas Pitre (3):
ARM: vexpress/dcscb: fix cache disabling sequences
ARM: vexpress/MCPM: fix cache disable sequence when CONFIG_FRAME_POINTER=y
ARM: 7861/1: cacheflush: consolidate single-CPU ARMv7 cache disabling code
arch/arm/include/asm/cacheflush.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-vexpress/dcscb.c | 32 ++++----------------------------
arch/arm/mach-vexpress/tc2_pm.c | 30 ++++++++++++++----------------
3 files changed, 64 insertions(+), 44 deletions(-)
From: Mark Hambleton <mahamble(a)broadcom.com>
Describe the virtio device so we can mount disk images in the simulator.
[Reduced the size of the region based on feedback from review -- broonie]
Signed-off-by: Mark Hambleton <mahamble(a)broadcom.com>
Signed-off-by: Mark Brown <broonie(a)linaro.org>
Acked-by: Will Deacon <will.deacon(a)arm.com>
---
arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
index b45e5f39f577..2f2ecd217363 100644
--- a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
@@ -183,6 +183,12 @@
clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
clock-names = "clcdclk", "apb_pclk";
};
+
+ virtio_block@0130000 {
+ compatible = "virtio,mmio";
+ reg = <0x130000 0x200>;
+ interrupts = <42>;
+ };
};
v2m_fixed_3v3: fixedregulator@0 {
--
1.8.5