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master build: 0 failures 0 warnings (v4.9-rc8-108-g810ac7b7)

by Build bot for Mark Brown

Tree/Branch: master Git describe: v4.9-rc8-108-g810ac7b7 Commit: 810ac7b755 Merge branch 'libnvdimm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm Build Time: 95 min 24 sec Passed: 10 / 10 (100.00 %) Failed: 0 / 10 ( 0.00 %) Errors: 0 Warnings: 0 Section Mismatches: 0 ------------------------------------------------------------------------------- defconfigs with issues (other than build errors): ------------------------------------------------------------------------------- =============================================================================== Detailed per-defconfig build reports below: ------------------------------------------------------------------------------- Passed with no errors, warnings or mismatches: arm64-allnoconfig arm64-allmodconfig arm-multi_v5_defconfig arm-multi_v7_defconfig x86_64-defconfig arm-allmodconfig arm-allnoconfig x86_64-allnoconfig arm-multi_v4t_defconfig arm64-defconfig close failed in file object destructor: sys.excepthook is missing lost sys.stderr

8 years, 9 months

[PATCH v5 0/7] Add PWM and IIO timer drivers for STM32

by Benjamin Gaignard

version 5: - fix comments done on version 4 - rebased on kernel 4.9-rc8 - change nodes names and re-order then by addresses version 4: - fix comments done on version 3 - don't use interrupts anymore in IIO timer - detect hardware capabilities at probe time to simplify binding version 3: - no change on mfd and pwm divers patches - add cross reference between bindings - change compatible to "st,stm32-timer-trigger" - fix attributes access rights - use string instead of int for master_mode and slave_mode - document device attributes in sysfs-bus-iio-timer-stm32 - udpate DT with the new compatible version 2: - keep only one compatible per driver - use DT parameters to describe hardware block configuration: - pwm channels, complementary output, counter size, break input - triggers accepted and create by IIO timers - change DT to limite use of reference to the node - interrupt is now in IIO timer driver - rename stm32-mfd-timer to stm32-timers (for general purpose timer) The following patches enable PWM and IIO Timer features for STM32 platforms. Those two features are mixed into the registers of the same hardware block (named general purpose timer) which lead to introduce a multifunctions driver on the top of them to be able to share the registers. In STM32 14 instances of timer hardware block exist, even if they all have the same register mapping they could have a different number of pwm channels and/or different triggers capabilities. We use various parameters in DT to describe the differences between hardware blocks The MFD (stm32-gptimer.c) takes care of clock and register mapping by using regmap. stm32_timers_dev structure is provided to its sub-node to share those information. PWM driver is implemented into pwm-stm32.c. Depending of the instance we may have up to 4 channels, sometime with complementary outputs or 32 bits counter instead of 16 bits. Some hardware blocks may also have a break input function which allows to stop pwm depending of a level, defined in devicetree, on an external pin. IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list of hardware triggers usable by hardware blocks like ADC, DAC or other timers. The matrix of possible connections between blocks is quite complex so we use trigger names and is_stm32_iio_timer_trigger() function to be sure that triggers are valid and configure the IPs. At run time IIO timer hardware blocks can configure (through "master_mode" IIO device attribute) which internal signal (counter enable, reset, comparison block, etc...) is used to generate the trigger. By using "slave_mode" IIO device attribute timer can also configure on which event (level, rising edge) of the block is enabled. Since we can use trigger from one hardware to control an other block, we can use a pwm to control an other one. The following example shows how to configure pwm1 and pwm3 to make pwm3 generate pulse only when pwm1 pulse level is high. /sys/bus/iio/devices # ls iio:device0 iio:device1 trigger0 trigger1 configure timer1 to use pwm1 channel 0 as output trigger /sys/bus/iio/devices # echo 'OC1REF' > iio\:device0/master_mode configure timer3 to enable only when input is high /sys/bus/iio/devices # echo 'gated' > iio\:device1/slave_mode /sys/bus/iio/devices # cat trigger0/name tim1_trgo configure timer2 to use timer1 trigger is input /sys/bus/iio/devices # echo "tim1_trgo" > iio\:device1/trigger/current_trigger configure pwm3 channel 0 to generate a signal with a period of 100ms and a duty cycle of 50% /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4 # echo 0 > export /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4 # echo 100000000 > pwm0/period /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4 # echo 50000000 > pwm0/duty_cycle /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4# echo 1 > pwm0/enable here pwm3 channel 0, as expected, doesn't start because has to be triggered by pwm1 channel 0 configure pwm1 channel 0 to generate a signal with a period of 1s and a duty cycle of 50% /sys/devices/platform/soc/40010000.timers/40010000.timers:pwm@0/pwm/pwmchip0 # echo 0 > export /sys/devices/platform/soc/40010000.timers/40010000.timers:pwm@0/pwm/pwmchip0 # echo 1000000000 > pwm0/period /sys/devices/platform/soc/40010000.timers/40010000.timers:pwm@0/pwm/pwmchip0 # echo 500000000 > pwm0/duty_cycle /sys/devices/platform/soc/40010000.timers/40010000.timers:pwm@0/pwm/pwmchip0 # echo 1 > pwm0/enable finally pwm1 starts and pwm3 only generates pulse when pwm1 signal is high An other example to use a timer as source of clock for another device. Here timer1 is used a source clock for pwm3: /sys/bus/iio/devices # echo 100000 > trigger0/sampling_frequency /sys/bus/iio/devices # echo "tim1_trgo" > iio\:device1/trigger/current_trigger /sys/bus/iio/devices # echo 'external_clock' > iio\:device1/slave_mode /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4 # echo 0 > export /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4 # echo 1000000 > pwm0/period /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4 # echo 500000 > pwm0/duty_cycle /sys/devices/platform/soc/40000400.timers/40000400.timers:pwm@0/pwm/pwmchip4 # echo 1 > pwm0/enable Benjamin Gaignard (7): MFD: add bindings for STM32 General Purpose Timer driver MFD: add STM32 General Purpose Timer driver PWM: add pwm-stm32 DT bindings PWM: add PWM driver for STM32 plaftorm IIO: add bindings for STM32 timer trigger driver IIO: add STM32 timer trigger driver ARM: dts: stm32: add STM32 General Purpose Timer driver in DT .../ABI/testing/sysfs-bus-iio-timer-stm32 | 55 +++ .../bindings/iio/timer/stm32-timer-trigger.txt | 23 + .../bindings/mfd/stm32-general-purpose-timer.txt | 39 ++ .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++ arch/arm/boot/dts/stm32f429.dtsi | 275 ++++++++++++ arch/arm/boot/dts/stm32f469-disco.dts | 28 ++ drivers/iio/Kconfig | 2 +- drivers/iio/Makefile | 1 + drivers/iio/timer/Kconfig | 13 + drivers/iio/timer/Makefile | 1 + drivers/iio/timer/stm32-timer-trigger.c | 466 +++++++++++++++++++++ drivers/iio/trigger/Kconfig | 1 - drivers/mfd/Kconfig | 11 + drivers/mfd/Makefile | 2 + drivers/mfd/stm32-timers.c | 80 ++++ drivers/pwm/Kconfig | 9 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-stm32.c | 362 ++++++++++++++++ include/linux/iio/timer/stm32-timer-trigger.h | 62 +++ include/linux/mfd/stm32-timers.h | 64 +++ 20 files changed, 1526 insertions(+), 2 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt create mode 100644 Documentation/devicetree/bindings/mfd/stm32-general-purpose-timer.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt create mode 100644 drivers/iio/timer/Kconfig create mode 100644 drivers/iio/timer/Makefile create mode 100644 drivers/iio/timer/stm32-timer-trigger.c create mode 100644 drivers/mfd/stm32-timers.c create mode 100644 drivers/pwm/pwm-stm32.c create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h create mode 100644 include/linux/mfd/stm32-timers.h -- 1.9.1

8 years, 9 months

next-20161209 build: 0 failures 2 warnings (next-20161209)

by Build bot for Mark Brown

Tree/Branch: next-20161209 Git describe: next-20161209 Commit: 4a71e4389b Add linux-next specific files for 20161209 Build Time: 98 min 43 sec Passed: 10 / 10 (100.00 %) Failed: 0 / 10 ( 0.00 %) Errors: 0 Warnings: 2 Section Mismatches: 0 ------------------------------------------------------------------------------- defconfigs with issues (other than build errors): 1 warnings 0 mismatches : arm64-allmodconfig 2 warnings 0 mismatches : arm-allmodconfig ------------------------------------------------------------------------------- Warnings Summary: 2 2 ../include/uapi/linux/byteorder/big_endian.h:34:26: warning: large integer implicitly truncated to unsigned type [-Woverflow] 1 ../drivers/net/ethernet/apm/xgene/xgene_enet_cle.c:836:1: warning: the frame size of 1056 bytes is larger than 1024 bytes [-Wframe-larger-than=] =============================================================================== Detailed per-defconfig build reports below: ------------------------------------------------------------------------------- arm64-allmodconfig : PASS, 0 errors, 1 warnings, 0 section mismatches Warnings: ../include/uapi/linux/byteorder/big_endian.h:34:26: warning: large integer implicitly truncated to unsigned type [-Woverflow] ------------------------------------------------------------------------------- arm-allmodconfig : PASS, 0 errors, 2 warnings, 0 section mismatches Warnings: ../drivers/net/ethernet/apm/xgene/xgene_enet_cle.c:836:1: warning: the frame size of 1056 bytes is larger than 1024 bytes [-Wframe-larger-than=] ../include/uapi/linux/byteorder/big_endian.h:34:26: warning: large integer implicitly truncated to unsigned type [-Woverflow] ------------------------------------------------------------------------------- Passed with no errors, warnings or mismatches: arm64-allnoconfig arm-multi_v5_defconfig arm-multi_v7_defconfig x86_64-defconfig arm-allnoconfig x86_64-allnoconfig arm-multi_v4t_defconfig arm64-defconfig

8 years, 9 months

[PATCH v4 0/7] Add PWM and IIO timer drivers for STM32

by Benjamin Gaignard

version 4: - fix comments done on version 3 - don't use interrupts anymore in IIO timer - detect hardware capabilities at probe time to simplify binding version 3: - no change on mfd and pwm divers patches - add cross reference between bindings - change compatible to "st,stm32-timer-trigger" - fix attributes access rights - use string instead of int for master_mode and slave_mode - document device attributes in sysfs-bus-iio-timer-stm32 - udpate DT with the new compatible version 2: - keep only one compatible per driver - use DT parameters to describe hardware block configuration: - pwm channels, complementary output, counter size, break input - triggers accepted and create by IIO timers - change DT to limite use of reference to the node - interrupt is now in IIO timer driver - rename stm32-mfd-timer to stm32-gptimer (for general purpose timer) The following patches enable PWM and IIO Timer features for STM32 platforms. Those two features are mixed into the registers of the same hardware block (named general purpose timer) which lead to introduce a multifunctions driver on the top of them to be able to share the registers. In STM32 14 instances of timer hardware block exist, even if they all have the same register mapping they could have a different number of pwm channels and/or different triggers capabilities. We use various parameters in DT to describe the differences between hardware blocks The MFD (stm32-gptimer.c) takes care of clock and register mapping by using regmap. stm32_gptimer_dev structure is provided to its sub-node to share those information. PWM driver is implemented into pwm-stm32.c. Depending of the instance we may have up to 4 channels, sometime with complementary outputs or 32 bits counter instead of 16 bits. Some hardware blocks may also have a break input function which allows to stop pwm depending of a level, defined in devicetree, on an external pin. IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list of hardware triggers usable by hardware blocks like ADC, DAC or other timers. The matrix of possible connections between blocks is quite complex so we use trigger names and is_stm32_iio_timer_trigger() function to be sure that triggers are valid and configure the IPs. At run time IIO timer hardware blocks can configure (through "master_mode" IIO device attribute) which internal signal (counter enable, reset, comparison block, etc...) is used to generate the trigger. By using "slave_mode" IIO device attribute timer can also configure on which event (level, rising edge) of the block is enabled. Since we can use trigger from one hardware to control an other block, we can use a pwm to control an other one. The following example shows how to configure pwm1 and pwm3 to make pwm3 generate pulse only when pwm1 pulse level is high. /sys/bus/iio/devices # ls iio:device0 iio:device1 trigger0 trigger1 configure timer1 to use pwm1 channel 0 as output trigger /sys/bus/iio/devices # echo 'OC1REF' > iio\:device0/master_mode configure timer3 to enable only when input is high /sys/bus/iio/devices # echo 'gated' > iio\:device1/slave_mode /sys/bus/iio/devices # cat trigger0/name tim1_trgo configure timer2 to use timer1 trigger is input /sys/bus/iio/devices # echo "tim1_trgo" > iio\:device1/trigger/current_trigger configure pwm3 channel 0 to generate a signal with a period of 100ms and a duty cycle of 50% /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4 # echo 0 > export /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4 # echo 100000000 > pwm0/period /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4 # echo 50000000 > pwm0/duty_cycle /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4# echo 1 > pwm0/enable here pwm3 channel 0, as expected, doesn't start because has to be triggered by pwm1 channel 0 configure pwm1 channel 0 to generate a signal with a period of 1s and a duty cycle of 50% /sys/devices/platform/soc/40010000.gptimer/40010000.gptimer:pwm@0/pwm/pwmchip0 # echo 0 > export /sys/devices/platform/soc/40010000.gptimer/40010000.gptimer:pwm@0/pwm/pwmchip0 # echo 1000000000 > pwm0/period /sys/devices/platform/soc/40010000.gptimer/40010000.gptimer:pwm@0/pwm/pwmchip0 # echo 500000000 > pwm0/duty_cycle /sys/devices/platform/soc/40010000.gptimer/40010000.gptimer:pwm@0/pwm/pwmchip0 # echo 1 > pwm0/enable finally pwm1 starts and pwm3 only generates pulse when pwm1 signal is high An other example to use a timer as source of clock for another device. Here timer1 is used a source clock for pwm3: /sys/bus/iio/devices # echo 100000 > trigger0/sampling_frequency /sys/bus/iio/devices # echo "tim1_trgo" > iio\:device1/trigger/current_trigger /sys/bus/iio/devices # echo 'external_clock' > iio\:device1/slave_mode /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4 # echo 0 > export /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4 # echo 1000000 > pwm0/period /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4 # echo 500000 > pwm0/duty_cycle /sys/devices/platform/soc/40000400.gptimer/40000400.gptimer:pwm@0/pwm/pwmchip4 # echo 1 > pwm0/enable Benjamin Gaignard (7): MFD: add bindings for STM32 General Purpose Timer driver MFD: add STM32 General Purpose Timer driver PWM: add pwm-stm32 DT bindings PWM: add PWM driver for STM32 plaftorm IIO: add bindings for STM32 timer trigger driver IIO: add STM32 timer trigger driver ARM: dts: stm32: add STM32 General Purpose Timer driver in DT .../ABI/testing/sysfs-bus-iio-timer-stm32 | 55 +++ .../bindings/iio/timer/stm32-timer-trigger.txt | 23 + .../bindings/mfd/stm32-general-purpose-timer.txt | 39 ++ .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++ arch/arm/boot/dts/stm32f429.dtsi | 276 ++++++++++- arch/arm/boot/dts/stm32f469-disco.dts | 28 ++ drivers/iio/Kconfig | 2 +- drivers/iio/Makefile | 1 + drivers/iio/timer/Kconfig | 15 + drivers/iio/timer/Makefile | 1 + drivers/iio/timer/stm32-timer-trigger.c | 526 +++++++++++++++++++++ drivers/iio/trigger/Kconfig | 1 - drivers/mfd/Kconfig | 11 + drivers/mfd/Makefile | 2 + drivers/mfd/stm32-gptimer.c | 82 ++++ drivers/pwm/Kconfig | 11 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-stm32.c | 363 ++++++++++++++ include/linux/iio/timer/stm32-timer-trigger.h | 61 +++ include/linux/mfd/stm32-gptimer.h | 63 +++ 20 files changed, 1591 insertions(+), 3 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt create mode 100644 Documentation/devicetree/bindings/mfd/stm32-general-purpose-timer.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt create mode 100644 drivers/iio/timer/Kconfig create mode 100644 drivers/iio/timer/Makefile create mode 100644 drivers/iio/timer/stm32-timer-trigger.c create mode 100644 drivers/mfd/stm32-gptimer.c create mode 100644 drivers/pwm/pwm-stm32.c create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h create mode 100644 include/linux/mfd/stm32-gptimer.h -- 1.9.1

8 years, 9 months

master build: 0 failures 0 warnings (v4.9-rc8-85-ga37102d)

by Build bot for Mark Brown

Tree/Branch: master Git describe: v4.9-rc8-85-ga37102d Commit: a37102dcd7 Merge branch 'parisc-4.9-5' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Build Time: 95 min 21 sec Passed: 10 / 10 (100.00 %) Failed: 0 / 10 ( 0.00 %) Errors: 0 Warnings: 0 Section Mismatches: 0 ------------------------------------------------------------------------------- defconfigs with issues (other than build errors): ------------------------------------------------------------------------------- =============================================================================== Detailed per-defconfig build reports below: ------------------------------------------------------------------------------- Passed with no errors, warnings or mismatches: arm64-allnoconfig arm64-allmodconfig arm-multi_v5_defconfig arm-multi_v7_defconfig x86_64-defconfig arm-allmodconfig arm-allnoconfig x86_64-allnoconfig arm-multi_v4t_defconfig arm64-defconfig close failed in file object destructor: sys.excepthook is missing lost sys.stderr

8 years, 9 months

next-20161208 build: 0 failures 3 warnings (next-20161208)

by Build bot for Mark Brown

Tree/Branch: next-20161208 Git describe: next-20161208 Commit: 6c6ea1d836 Add linux-next specific files for 20161208 Build Time: 98 min 37 sec Passed: 10 / 10 (100.00 %) Failed: 0 / 10 ( 0.00 %) Errors: 0 Warnings: 3 Section Mismatches: 0 ------------------------------------------------------------------------------- defconfigs with issues (other than build errors): 1 warnings 0 mismatches : arm64-allmodconfig 2 warnings 0 mismatches : arm-allmodconfig ------------------------------------------------------------------------------- Warnings Summary: 3 1 ../drivers/net/ethernet/apm/xgene/xgene_enet_cle.c:836:1: warning: the frame size of 1056 bytes is larger than 1024 bytes [-Wframe-larger-than=] 1 ../crypto/algif_aead.c:539:9: warning: 'outlen' may be used uninitialized in this function [-Wmaybe-uninitialized] 1 ../crypto/algif_aead.c:539:19: warning: 'outlen' may be used uninitialized in this function [-Wmaybe-uninitialized] =============================================================================== Detailed per-defconfig build reports below: ------------------------------------------------------------------------------- arm64-allmodconfig : PASS, 0 errors, 1 warnings, 0 section mismatches Warnings: ../crypto/algif_aead.c:539:19: warning: 'outlen' may be used uninitialized in this function [-Wmaybe-uninitialized] ------------------------------------------------------------------------------- arm-allmodconfig : PASS, 0 errors, 2 warnings, 0 section mismatches Warnings: ../crypto/algif_aead.c:539:9: warning: 'outlen' may be used uninitialized in this function [-Wmaybe-uninitialized] ../drivers/net/ethernet/apm/xgene/xgene_enet_cle.c:836:1: warning: the frame size of 1056 bytes is larger than 1024 bytes [-Wframe-larger-than=] ------------------------------------------------------------------------------- Passed with no errors, warnings or mismatches: arm64-allnoconfig arm-multi_v5_defconfig arm-multi_v7_defconfig x86_64-defconfig arm-allnoconfig x86_64-allnoconfig arm-multi_v4t_defconfig arm64-defconfig

8 years, 9 months

master build: 0 failures 0 warnings (v4.9-rc8-78-g318c893)

by Build bot for Mark Brown

Tree/Branch: master Git describe: v4.9-rc8-78-g318c893 Commit: 318c8932dd Merge branch 'akpm' (patches from Andrew) Build Time: 113 min 35 sec Passed: 10 / 10 (100.00 %) Failed: 0 / 10 ( 0.00 %) Errors: 0 Warnings: 0 Section Mismatches: 0 ------------------------------------------------------------------------------- defconfigs with issues (other than build errors): ------------------------------------------------------------------------------- =============================================================================== Detailed per-defconfig build reports below: ------------------------------------------------------------------------------- Passed with no errors, warnings or mismatches: arm64-allnoconfig arm64-allmodconfig arm-multi_v5_defconfig arm-multi_v7_defconfig x86_64-defconfig arm-allmodconfig arm-allnoconfig x86_64-allnoconfig arm-multi_v4t_defconfig arm64-defconfig close failed in file object destructor: sys.excepthook is missing lost sys.stderr

8 years, 9 months

[PATCH V2] devfreq: rk3399_dmc: Don't use OPP structures outside of RCU locks

by Viresh Kumar

The OPP structures are abused to the best here, without understanding how the OPP core and RCU locks work. In short, the OPP pointer saved in 'rk3399_dmcfreq' can become invalid under your nose, as the OPP core may free it. Fix various abuses around OPP structures and calls. Compile tested only. Reviewed-by: Chanwoo Choi <cw00.choi(a)samsung.com> Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org> --- V1->V2: - Added Reviewed-by from Chanwoo. - Fixed an issue reported by buildbot. drivers/devfreq/rk3399_dmc.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c index 5063ac1a5939..75333050cdea 100644 --- a/drivers/devfreq/rk3399_dmc.c +++ b/drivers/devfreq/rk3399_dmc.c @@ -80,7 +80,6 @@ struct rk3399_dmcfreq { struct regulator *vdd_center; unsigned long rate, target_rate; unsigned long volt, target_volt; - struct dev_pm_opp *curr_opp; }; static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, @@ -102,9 +101,6 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, target_rate = dev_pm_opp_get_freq(opp); target_volt = dev_pm_opp_get_voltage(opp); - dmcfreq->rate = dev_pm_opp_get_freq(dmcfreq->curr_opp); - dmcfreq->volt = dev_pm_opp_get_voltage(dmcfreq->curr_opp); - rcu_read_unlock(); if (dmcfreq->rate == target_rate) @@ -165,7 +161,9 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, if (err) dev_err(dev, "Cannot to set vol %lu uV\n", target_volt); - dmcfreq->curr_opp = opp; + dmcfreq->rate = target_rate; + dmcfreq->volt = target_volt; + out: mutex_unlock(&dmcfreq->lock); return err; @@ -431,8 +429,9 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev) rcu_read_unlock(); return PTR_ERR(opp); } + data->rate = dev_pm_opp_get_freq(opp); + data->volt = dev_pm_opp_get_voltage(opp); rcu_read_unlock(); - data->curr_opp = opp; rk3399_devfreq_dmc_profile.initial_freq = data->rate; -- 2.7.1.410.g6faf27b

8 years, 9 months

master build: 0 failures 0 warnings (v4.9-rc8-74-gea5a9ef)

by Build bot for Mark Brown

Tree/Branch: master Git describe: v4.9-rc8-74-gea5a9ef Commit: ea5a9eff96 Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Build Time: 95 min 22 sec Passed: 10 / 10 (100.00 %) Failed: 0 / 10 ( 0.00 %) Errors: 0 Warnings: 0 Section Mismatches: 0 ------------------------------------------------------------------------------- defconfigs with issues (other than build errors): ------------------------------------------------------------------------------- =============================================================================== Detailed per-defconfig build reports below: ------------------------------------------------------------------------------- Passed with no errors, warnings or mismatches: arm64-allnoconfig arm64-allmodconfig arm-multi_v5_defconfig arm-multi_v7_defconfig x86_64-defconfig arm-allmodconfig arm-allnoconfig x86_64-allnoconfig arm-multi_v4t_defconfig arm64-defconfig close failed in file object destructor: sys.excepthook is missing lost sys.stderr

8 years, 9 months

[PATCH] Revert "PM / OPP: Don't assume platform doesn't have regulators"

by Viresh Kumar

This reverts commit ef3caabee9691386e6801ea92150e37277db9c7a. The commit was based on the assumption that a platform with voltages specified with individual OPPs, would have registered a regulator as well in order to do full DVFS. That assumption is broken by the Tegra124 platform. For Tegra124, the voltage is not scaled via a direct call to the regulator subsystem because the DFLL directly controls the I2C interface that controls the voltage. The DFLL essentially figures out the max frequency for a given voltage. So to run at a particular frequency, the DFLL continuously adjusts the voltage in a control loop fashion to get the desired frequency. Following are the logs from: NVIDIA Tegra124 Jetson TK1 cpufreq: cpufreq_online: CPU0: Running at unlisted freq: 696000 KHz cpu cpu0: dev_pm_opp_set_rate: Regulator not registered with OPP core cpufreq: __target_index: Failed to change cpu frequency: -22 ------------[ cut here ]------------ kernel BUG at drivers/cpufreq/cpufreq.c:1235! Fix these by reverting the offending commit. Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org> --- Rafael, you can simply drop the patch if that is easier for you. --- drivers/base/power/opp/core.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/base/power/opp/core.c b/drivers/base/power/opp/core.c index 7db672f632d9..6af371a55062 100644 --- a/drivers/base/power/opp/core.c +++ b/drivers/base/power/opp/core.c @@ -747,20 +747,7 @@ int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq) /* Only frequency scaling */ if (!regulators) { - unsigned long u_volt = opp->supplies[0].u_volt; - rcu_read_unlock(); - - /* - * DT contained supply ratings? Consider platform failed to set - * regulators. - */ - if (unlikely(u_volt)) { - dev_err(dev, "%s: Regulator not registered with OPP core\n", - __func__); - return -EINVAL; - } - return _generic_set_opp_clk_only(dev, clk, old_freq, freq); } -- 2.7.1.410.g6faf27b

8 years, 9 months

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