Adding few more lists so that others can also help..
On 15 July 2013 20:00, Comaschi, F. <fcomaschi(a)tue.nl> wrote:
> Dear Viresh,
>
> I am Francesco Comaschi, a researcher at Eindhoven University of Technology. My research group is interested in implementing custom power management policies on ARM-based platform (at the moment we are using an Arndale 5250 board featuring Exynos5 dual). We would like to make use of DVFS and to be able to measure power consumption on the board.
Ok.
> First of all, congratulations for the work that you and the other guys form the power management team are doing within the Linaro community, I always follow your progress, and so far you have been the only reliable source of information for everything I have been doing on the board.
Thanks :)
> If you do not mind, I would like to ask you a few questions:
> 1) Is there a way to measure the board power consumption via software? I have read here: http://blogs.arm.com/software-enablement/925-linux-hwmon-power-management-a… that it is possible with the ARM Versatile boards, through the hwmon framework and lm_sensors. However, when I run lm_sensors on the Arndale board, no sensors were found. Do you know about any other possible ways to measure power in software? Maybe it is possible to communicate with the on-board PMIC? Maybe there are some registers where information about the power/voltage provided to the processor and the other components is available?
On ARM Versatile express boards and the coretiles that come with it,
we have sensors which are probed through hwmon framework in
Linux. So, we have hardware IPs present on board which let us
get some power figures per cluster for big LITTLE.
I am not sure if Exynos have any such things on it.
@Chander: Are you aware of any such features?
> 2) Recently I have read Andy Green’s presentation “How to measure SoC power”. However, by measuring power on the PMIC input side through the ARM Energy Probe, probably I won't be able to see the effect of DVFS. Do you have any suggestions on how to measure the effect of DVFS, even through hardware measurements?
You need probes on the voltage regulator which is feed the cores...
But again, that is very much hardware specific. And I haven't worked
on Exynos at all :)
> 3) More in general, I do not know which is the best way to implement custom policies of DVFS.
I didn't get you here. Are you talking about tuning of governors here?
> Is it possible, maybe through appropriate API's, to access the cpu_idle and the cpu_freq framework from inside my application? Shall I work directly with the drivers of the PMIC? Is it possible to set the voltage directly from inside my application?
Something on the board must provide this to kernel. Kernel can't
get it by itself.
From: Mark Brown <broonie(a)linaro.org>
The debounce timeout is generally quite long and the work not performance
critical so allow the scheduler to run the work anywhere rather than in
the normal per-CPU workqueue.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/extcon/extcon-gpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-gpio.c b/drivers/extcon/extcon-gpio.c
index 02bec32..f874c30 100644
--- a/drivers/extcon/extcon-gpio.c
+++ b/drivers/extcon/extcon-gpio.c
@@ -56,7 +56,7 @@ static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
{
struct gpio_extcon_data *extcon_data = dev_id;
- schedule_delayed_work(&extcon_data->work,
+ queue_delayed_work(system_power_efficient_wq, &extcon_data->work,
extcon_data->debounce_jiffies);
return IRQ_HANDLED;
}
--
1.8.3.2
These patches are for separating the SOC On-Chip ohci host controller
from ohci-hcd host code into its own driver module.
This work is part of enabling multi-platform kernels on ARM;
it would be nice to have in 3.12.
V2:
In patch 5/6 and 6/6:
-Set non-standard fields in hc_driver manually, rather than
relying on an expanded struct ohci_driver_overrides.
-Save orig_ohci_hub_control and orig_ohci_hub_status_data rather than
relying on ohci_hub_control and hub_status_data being exported.
In patch 1/6 to 4/6
-ohci_setup() has been removed because it is called in .reset member
of the ohci_hc_driver structure.
V3:
In patch 5/6 and 6/6:
-ohci_setup() has been removed because it is called in .reset member
of the ohci_hc_driver structure.
In patch 5/6:
-The ohci_restart() function is not required in current scenario,
only discarding connection state of integrated transceivers is sufficient,
for this directly handling ohci->hc_control.
In patch 2/6 :
-rewritten if (config->otg || config->rwc) block statements into
two separate 'if blocks' to handle below scenarios
1. config->otg set scenario.
2. if any of these (config->otg, config->rwc) are set, this
scenario should be handled only after ohci_setup()
In patch 1/6 and 4/6:
No change.
V4:
In patch 1/6 and 4/6:
No change.
In patch 2/6 :
-usb_remove_hcd() function is required a valid clock that is what
omap_ohci_clock_power(0) is called after hcd shutdown.
In patch 3/6 :
-V3 modification revert back, only ohci->regs setting write()
function has been removed because ohci->regs doesn't get set until
usb_add_hcd.
In patch 5/6 :
- Removed extra space after "tristate".
- Removed extra space between function name and '(' characters.
- MODULE_ALIAS line moved to last statement of ohci-at91 file.
In patch 6/6 :
- Removed extra space before the '='.
- Moved /* forward definitions */ line before the declarations of functions.
Manjunath Goudar (6):
USB: OHCI: make ohci-exynos a separate driver
USB: OHCI: make ohci-omap a separate driver
USB: OHCI: make ohci-omap3 a separate driver
USB: OHCI: make ohci-spear a separate driver
USB: OHCI: make ohci-at91 a separate driver
USB: OHCI: make ohci-s3c2410 a separate driver
drivers/usb/host/Kconfig | 30 ++++++-
drivers/usb/host/Makefile | 6 ++
drivers/usb/host/ohci-at91.c | 153 ++++++++++++++++-------------------
drivers/usb/host/ohci-exynos.c | 167 ++++++++++++++++-----------------------
drivers/usb/host/ohci-hcd.c | 108 -------------------------
drivers/usb/host/ohci-omap.c | 156 +++++++++++++-----------------------
drivers/usb/host/ohci-omap3.c | 118 +++++++++------------------
drivers/usb/host/ohci-s3c2410.c | 128 +++++++++++++-----------------
drivers/usb/host/ohci-spear.c | 140 +++++++++++++-------------------
9 files changed, 374 insertions(+), 632 deletions(-)
--
1.7.9.5
When there are several cpus online, the AFTR state does not work.
The AFTR must be selected only when there is one cpu online.
The previous code was already handling this case.
Simplified the code, especially the init routine to have the same init
pattern than the other drivers.
Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org>
---
arch/arm/mach-exynos/cpuidle.c | 13 ++-----------
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 17a18ff..cc4b097 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -147,16 +147,11 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
- int new_index = index;
-
/* This mode only can be entered when other core's are offline */
if (num_online_cpus() > 1)
- new_index = drv->safe_state_index;
+ return drv->states[0].enter(dev, drv, 0);
- if (new_index == 0)
- return arm_cpuidle_simple_enter(dev, drv, new_index);
- else
- return exynos4_enter_core0_aftr(dev, drv, new_index);
+ return exynos4_enter_core0_aftr(dev, drv, index);
}
static void __init exynos5_core_down_clk(void)
@@ -209,10 +204,6 @@ static int __init exynos4_init_cpuidle(void)
device = &per_cpu(exynos4_cpuidle_device, cpu_id);
device->cpu = cpu_id;
- /* Support IDLE only */
- if (cpu_id != 0)
- device->state_count = 1;
-
ret = cpuidle_register_device(device);
if (ret) {
printk(KERN_ERR "CPUidle register device failed\n");
--
1.7.9.5
From: Mark Brown <broonie(a)linaro.org>
The out of tree code configures a pullup on the line indicating that it
is an active low interrupt.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
arch/arm/boot/dts/exynos5250-arndale.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index abc7272..dab40ae 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "exynos5250.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Insignal Arndale evaluation board based on EXYNOS5250";
@@ -37,6 +38,8 @@
s5m8767_pmic@66 {
compatible = "samsung,s5m8767-pmic";
reg = <0x66>;
+ interrupt-parent = <&gpx3>;
+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
s5m8767,pmic-buck2-dvs-voltage = <1300000>;
s5m8767,pmic-buck3-dvs-voltage = <1100000>;
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
The SAIF driver is a clock provider so specifically needs the common
clock implementedation.
Reported-by: Fengguang Wu <fengguang.wu(a)intel.com>
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/mxs/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/mxs/Kconfig b/sound/soc/mxs/Kconfig
index 7daf860..219235c 100644
--- a/sound/soc/mxs/Kconfig
+++ b/sound/soc/mxs/Kconfig
@@ -1,6 +1,7 @@
menuconfig SND_MXS_SOC
tristate "SoC Audio for Freescale MXS CPUs"
depends on ARCH_MXS || COMPILE_TEST
+ depends on COMMON_CLK
select SND_SOC_GENERIC_DMAENGINE_PCM
help
Say Y or M if you want to add support for codecs attached to
--
1.8.3.2
These patches are for separating the SOC On-Chip ohci host controller
from ohci-hcd host code into its own driver module.
This work is part of enabling multi-platform kernels on ARM;
it would be nice to have in 3.11.
V2:
In patch 5/6 and 6/6:
-Set non-standard fields in hc_driver manually, rather than
relying on an expanded struct ohci_driver_overrides.
-Save orig_ohci_hub_control and orig_ohci_hub_status_data rather than
relying on ohci_hub_control and hub_status_data being exported.
In patch 1/6 to 4/6
-ohci_setup() has been removed because it is called in .reset member
of the ohci_hc_driver structure.
V3:
In patch 5/6 and 6/6:
-ohci_setup() has been removed because it is called in .reset member
of the ohci_hc_driver structure.
In patch 5/6:
-The ohci_restart() function is not required in current scenario,
only discarding connection state of integrated transceivers is sufficient,
for this directly handling ohci->hc_control.
In patch 2/6 :
-rewritten if (config->otg || config->rwc) block statements into
two separate 'if blocks' to handle below scenarios
1. config->otg set scenario.
2. if any of these (config->otg, config->rwc) are set, this
scenario should be handled only after ohci_setup()
In patch 1/6 and 4/6:
No change.
Manjunath Goudar (6):
USB: OHCI: make ohci-exynos a separate driver
USB: OHCI: make ohci-omap a separate driver
USB: OHCI: make ohci-omap3 a separate driver
USB: OHCI: make ohci-spear a separate driver
USB: OHCI: make ohci-at91 a separate driver
USB: OHCI: make ohci-s3c2410 a separate driver
drivers/usb/host/Kconfig | 30 ++++++-
drivers/usb/host/Makefile | 6 ++
drivers/usb/host/ohci-at91.c | 151 ++++++++++++++++-------------------
drivers/usb/host/ohci-exynos.c | 167 ++++++++++++++++-----------------------
drivers/usb/host/ohci-hcd.c | 108 -------------------------
drivers/usb/host/ohci-omap.c | 157 +++++++++++++-----------------------
drivers/usb/host/ohci-omap3.c | 113 ++++++++------------------
drivers/usb/host/ohci-s3c2410.c | 128 +++++++++++++-----------------
drivers/usb/host/ohci-spear.c | 140 +++++++++++++-------------------
9 files changed, 369 insertions(+), 631 deletions(-)
--
1.7.9.5
From: Mark Brown <broonie(a)linaro.org>
The accessory detect debounce work is not performance sensitive so let
the scheduler run it wherever is most efficient rather than in a per CPU
workqueue by using the system power efficient workqueue.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/codecs/twl6040.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c
index 44621dd..caf8784 100644
--- a/sound/soc/codecs/twl6040.c
+++ b/sound/soc/codecs/twl6040.c
@@ -429,7 +429,8 @@ static irqreturn_t twl6040_audio_handler(int irq, void *data)
struct snd_soc_codec *codec = data;
struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
- schedule_delayed_work(&priv->hs_jack.work, msecs_to_jiffies(200));
+ queue_delayed_work(system_power_efficient_wq,
+ &priv->hs_jack.work, msecs_to_jiffies(200));
return IRQ_HANDLED;
}
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
Use the ARM version by default as that's the more generally portable
one, it doesn't matter if they work well on random platforms when the
goal is only build coverage.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/fsl/fsl_ssi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index c9974a4..e12a997 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -36,7 +36,7 @@
#define read_ssi(addr) in_be32(addr)
#define write_ssi(val, addr) out_be32(addr, val)
#define write_ssi_mask(addr, clear, set) clrsetbits_be32(addr, clear, set)
-#elif defined ARM
+#else
#define read_ssi(addr) readl(addr)
#define write_ssi(val, addr) writel(val, addr)
/*
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
The accessory detect debounce work is not performance sensitive so let
the scheduler run it wherever is most efficient rather than in a per CPU
workqueue by using the system power efficient workqueue.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/soc-jack.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/soc-jack.c b/sound/soc/soc-jack.c
index 0bb5ccc..7aa26b5 100644
--- a/sound/soc/soc-jack.c
+++ b/sound/soc/soc-jack.c
@@ -263,7 +263,7 @@ static irqreturn_t gpio_handler(int irq, void *data)
if (device_may_wakeup(dev))
pm_wakeup_event(dev, gpio->debounce_time + 50);
- schedule_delayed_work(&gpio->work,
+ queue_delayed_work(system_power_efficient_wq, &gpio->work,
msecs_to_jiffies(gpio->debounce_time));
return IRQ_HANDLED;
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
The accessory detect debounce work is not performance sensitive so let
the scheduler run it wherever is most efficient rather than in a per CPU
workqueue by using the system power efficient workqueue.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/codecs/wm8350.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/wm8350.c b/sound/soc/codecs/wm8350.c
index 0e8b3aa..af1318d 100644
--- a/sound/soc/codecs/wm8350.c
+++ b/sound/soc/codecs/wm8350.c
@@ -1301,7 +1301,8 @@ static irqreturn_t wm8350_hpl_jack_handler(int irq, void *data)
if (device_may_wakeup(wm8350->dev))
pm_wakeup_event(wm8350->dev, 250);
- schedule_delayed_work(&priv->hpl.work, msecs_to_jiffies(200));
+ queue_delayed_work(system_power_efficient_wq,
+ &priv->hpl.work, msecs_to_jiffies(200));
return IRQ_HANDLED;
}
@@ -1318,7 +1319,8 @@ static irqreturn_t wm8350_hpr_jack_handler(int irq, void *data)
if (device_may_wakeup(wm8350->dev))
pm_wakeup_event(wm8350->dev, 250);
- schedule_delayed_work(&priv->hpr.work, msecs_to_jiffies(200));
+ queue_delayed_work(system_power_efficient_wq,
+ &priv->hpr.work, msecs_to_jiffies(200));
return IRQ_HANDLED;
}
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
None of the delayed work the driver schedules has particularly short delays
and it is not performance sensitive so let the scheduler run it wherever
is most efficient rather than in a per CPU workqueue by using the system
power efficient workqueue.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/codecs/sta32x.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c
index cfb55fe..06edb39 100644
--- a/sound/soc/codecs/sta32x.c
+++ b/sound/soc/codecs/sta32x.c
@@ -363,16 +363,18 @@ static void sta32x_watchdog(struct work_struct *work)
}
if (!sta32x->shutdown)
- schedule_delayed_work(&sta32x->watchdog_work,
- round_jiffies_relative(HZ));
+ queue_delayed_work(system_power_efficient_wq,
+ &sta32x->watchdog_work,
+ round_jiffies_relative(HZ));
}
static void sta32x_watchdog_start(struct sta32x_priv *sta32x)
{
if (sta32x->pdata->needs_esd_watchdog) {
sta32x->shutdown = 0;
- schedule_delayed_work(&sta32x->watchdog_work,
- round_jiffies_relative(HZ));
+ queue_delayed_work(system_power_efficient_wq,
+ &sta32x->watchdog_work,
+ round_jiffies_relative(HZ));
}
}
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
None of the delayed work the driver schedules has particularly short delays
and it is not performance sensitive so let the scheduler run it wherever
is most efficient rather than in a per CPU workqueue by using the system
power efficient workqueue.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/codecs/max98090.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c
index ad5313f..0569a4c 100644
--- a/sound/soc/codecs/max98090.c
+++ b/sound/soc/codecs/max98090.c
@@ -2084,8 +2084,9 @@ static irqreturn_t max98090_interrupt(int irq, void *data)
pm_wakeup_event(codec->dev, 100);
- schedule_delayed_work(&max98090->jack_work,
- msecs_to_jiffies(100));
+ queue_delayed_work(system_power_efficient_wq,
+ &max98090->jack_work,
+ msecs_to_jiffies(100));
}
if (active & M98090_DRCACT_MASK)
@@ -2132,8 +2133,9 @@ int max98090_mic_detect(struct snd_soc_codec *codec,
snd_soc_jack_report(max98090->jack, 0,
SND_JACK_HEADSET | SND_JACK_BTN_0);
- schedule_delayed_work(&max98090->jack_work,
- msecs_to_jiffies(100));
+ queue_delayed_work(system_power_efficient_wq,
+ &max98090->jack_work,
+ msecs_to_jiffies(100));
return 0;
}
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
The accessory detect debounce work is not performance sensitive so let
the scheduler run it wherever is most efficient rather than in a per CPU
workqueue by using the system power efficient workqueue.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/soc-jack.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/soc-jack.c b/sound/soc/soc-jack.c
index 0bb5ccc..7aa26b5 100644
--- a/sound/soc/soc-jack.c
+++ b/sound/soc/soc-jack.c
@@ -263,7 +263,7 @@ static irqreturn_t gpio_handler(int irq, void *data)
if (device_may_wakeup(dev))
pm_wakeup_event(dev, gpio->debounce_time + 50);
- schedule_delayed_work(&gpio->work,
+ queue_delayed_work(system_power_efficient_wq, &gpio->work,
msecs_to_jiffies(gpio->debounce_time));
return IRQ_HANDLED;
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
There is no need to use a normal per-CPU workqueue for delayed power downs
as they're not timing or performance critical and waking up a core for them
would defeat some of the point.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/regulator/core.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index b6efead..6ef476f 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1891,8 +1891,9 @@ int regulator_disable_deferred(struct regulator *regulator, int ms)
rdev->deferred_disables++;
mutex_unlock(&rdev->mutex);
- ret = schedule_delayed_work(&rdev->disable_work,
- msecs_to_jiffies(ms));
+ ret = queue_delayed_work(system_power_efficient_wq,
+ &rdev->disable_work,
+ msecs_to_jiffies(ms));
if (ret < 0)
return ret;
else
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
There is no need to use a normal per-CPU workqueue for delayed power downs
as they're not timing or performance critical and waking up a core for them
would defeat some of the point.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/soc-pcm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index b6c6403..f4f68cb 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -411,8 +411,9 @@ static int soc_pcm_close(struct snd_pcm_substream *substream)
} else {
/* start delayed pop wq here for playback streams */
rtd->pop_wait = 1;
- schedule_delayed_work(&rtd->delayed_work,
- msecs_to_jiffies(rtd->pmdown_time));
+ queue_delayed_work(system_power_efficient_wq,
+ &rtd->delayed_work,
+ msecs_to_jiffies(rtd->pmdown_time));
}
} else {
/* capture streams can be powered down now */
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
The jack detection code holds runtime PM references when required so
there is no need for suspend to do any checks.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/mfd/wm8994-core.c | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
index 781115e..e8ecb8e 100644
--- a/drivers/mfd/wm8994-core.c
+++ b/drivers/mfd/wm8994-core.c
@@ -245,20 +245,6 @@ static int wm8994_suspend(struct device *dev)
break;
}
- switch (wm8994->type) {
- case WM1811:
- ret = wm8994_reg_read(wm8994, WM8994_ANTIPOP_2);
- if (ret < 0) {
- dev_err(dev, "Failed to read jackdet: %d\n", ret);
- } else if (ret & WM1811_JACKDET_MODE_MASK) {
- dev_dbg(dev, "CODEC still active, ignoring suspend\n");
- return 0;
- }
- break;
- default:
- break;
- }
-
/* Disable LDO pulldowns while the device is suspended if we
* don't know that something will be driving them. */
if (!wm8994->ldo_ena_always_driven)
--
1.8.3.2
Hi All,
This series patches extend Pawel's patches to
Versatile Express HDLCD DVI output support.
Before apply this patches, please apply Pawel's patches first.
This series patches implements base on Linaro release 13.06 branch "ll_20130621.0".
here is Pawel's patches
[1] http://lists.freedesktop.org/archives/dri-devel/2013-April/037519.html
Show Liu (2):
Fixed for compatible with kernel 3.10.0-rc6
CDFv2 for VExpress HDLCD DVI output support
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 6 +-
drivers/video/Kconfig | 2 +
drivers/video/arm-hdlcd.c | 116 +++++++++++++++++++++++++---
drivers/video/fbmon.c | 12 ++-
drivers/video/vexpress-dvimode.c | 11 +++
drivers/video/vexpress-muxfpga.c | 8 +-
include/linux/arm-hdlcd.h | 6 ++
7 files changed, 142 insertions(+), 19 deletions(-)
--
1.7.9.5
Hi Viresh,
Sorry for the delay in sending these patches, but I have discovered that
ARM's servers have been blocking my emails sent through the old non-disclaimer
server, so early messages have not reached you.
Here is a set of patches that we would like to add to your tree (while you are
still maintaining it?). They improve the HMP behaviour, specially when running
under Android on TC2.
I'm attaching the emails and also an archive, to work around the broken Exchange
server.
Best regards,
Liviu
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
Adding linaro-kernel to get others involved in it.
On 17 July 2013 05:58, 이가람 <wind351(a)gmail.com> wrote:
> Hello. My name is Karam Lee in Korea.
>
> I am obviously interested in your "Queue work on power efficient wq" patch.
>
> This is an interesting field for me, and I think the idea is good.
>
> So I want to try to test the patch, Can you explain to me how you did it in
> detail?
>
> What tool did you use to draw the results?
>
> If you give me an answer, I will appreciate your kindness.
I copied below from my cover-letter only, where numbers are
given. We used ARM Versatile express with TC2 for our tests which had
a on board hwmon to get us energy numbers for A7 and A15 clusters.
Test was simple, just run some audio in background and monitor power
numbers for that time.
I used to run mytrace.sh (attached), which also takes some trace for
me, which I used to analyse with kernelshark then to see how wakeups
are happening on my board.
-------x--------------x--------------
Setup:
-----
- ARM Vexpress TC2 - big.LITTLE CPU
- Core 0-1: A15, 2-4: A7
- rootfs: linaro-ubuntu-devel
This patchset has been tested on a big LITTLE system (heterogeneous) but is
useful for all other homogeneous systems as well. During these tests audio was
played in background using aplay.
Results:
-------
Cluster A15 Energy Cluster A7 Energy Total
------------------------- ----------------------- ------
Without this patchset (Energy in Joules):
---------------------------------------------------
0.151162 2.183545 2.334707
0.223730 2.687067 2.910797
0.289687 2.732702 3.022389
0.454198 2.745908 3.200106
0.495552 2.746465 3.242017
Average:
0.322866 2.619137 2.942003
With this patchset (Energy in Joules):
-----------------------------------------------
0.226421 2.283658 2.510079
0.151361 2.236656 2.388017
0.197726 2.249849 2.447575
0.221915 2.229446 2.451361
0.347098 2.257707 2.604805
Average:
0.2289042 2.2514632 2.4803674
Above tests are repeated multiple times and events are tracked using trace-cmd
and analysed using kernelshark. And it was easily noticeable that idle time for
many cpus has increased considerably, which eventually saved some power.
From: Mark Brown <broonie(a)linaro.org>
Since DT based boards don't have any dependency on arch/arm enable them
if COMPILE_TEST is enabled.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/fsl/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig
index aa43854..87e28bc 100644
--- a/sound/soc/fsl/Kconfig
+++ b/sound/soc/fsl/Kconfig
@@ -98,7 +98,7 @@ endif # SND_POWERPC_SOC
menuconfig SND_IMX_SOC
tristate "SoC Audio for Freescale i.MX CPUs"
- depends on ARCH_MXC
+ depends on ARCH_MXC || COMPILE_TEST
help
Say Y or M if you want to add support for codecs attached to
the i.MX CPUs.
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
Since there is no architecture dependency in the code allow it to be built
on any platform when COMPILE_TEST is enabled.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/tegra/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/tegra/Kconfig b/sound/soc/tegra/Kconfig
index 995b120..cd168a7 100644
--- a/sound/soc/tegra/Kconfig
+++ b/sound/soc/tegra/Kconfig
@@ -1,6 +1,6 @@
config SND_SOC_TEGRA
tristate "SoC Audio for the Tegra System-on-Chip"
- depends on ARCH_TEGRA && TEGRA20_APB_DMA
+ depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
select REGMAP_MMIO
select SND_SOC_GENERIC_DMAENGINE_PCM if TEGRA20_APB_DMA
help
--
1.8.3.2
Hi All
I built a 'latest' kernel following the receipe, I tried t boot it and
got a panic right away.
.
.
.
INIT: version 2.88 booting
init[390]: undefined instruction: pc=0000007f988b64b8
Code: 2947bcce d50339bf b94038cd d5033fdf (d53be029)
init[1]: undefined instruction: pc=0000007f988b64b8
Code: 2947bcce d50339bf b94038cd d5033fdf (d53be029)
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004
Call trace:
[<ffffffc000087568>] dump_backtrace+0x0/0x12c
[<ffffffc0003a3ff0>] dump_stack+0x14/0x1c
[<ffffffc0003a4240>] panic+0xe8/0x214
[<ffffffc0000986ec>] do_exit+0x748/0x7ac
[<ffffffc000098acc>] do_group_exit+0x3c/0xcc
[<ffffffc0000a3e0c>] get_signal_to_deliver+0x150/0x48c
[<ffffffc000086ee8>] do_signal+0x5a4/0x5cc
[<ffffffc000087174>] do_notify_resume+0x7c/0x8c
=========================================
Here are the build element.
FM000-KT-00035-r0p8-48rel5.tgz
gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux.tar.bz2
gits for
boot-wrapper-aarch64 linaro-aarch64
Initial testing
vexpress64-openembedded_lamp-armv8_20130623-376.img.gz
img-foundation.axf
The initial boot works fine from the FM000-KT-00035-r0p8-48rel5.tgz
using the vexpress64-openembedded_lamp-armv8_20130623-376.img.gz
image.
Then I build linaro-aarch64 using
tsocks git clone git://git.linaro.org/kernel/linaro-aarch64.git
Tools chain OK and build OK
Then I build the
make CROSS_COMPILE=aarch64-linux-gnu- BOOTARGS='"root=/dev/vda2 consolelog=9 rw
console=ttyAMA0"' IMAGE=linux-system-foundation.axf
Symlink to files are k and the build is ok
Then I boot the same way I boot the prebuild
./Foundation_v8 --image boot.axf --block-device ./root.img --network=nat
I copy in boot.axf the linux-system-foundation.axf and got panic, I
copy back the prebuild img-foundation.axf and it boot OK
My linux-system-foundation has my kernel Image inside.
Any ideas?
Cheers,
Phi
The commit 19976c2a88d125aec16b9255c7197c297bbdd637 changed the target
residency to 100000, assuming this is a careless mistake.
commit 19976c2a88d125aec16b9255c7197c297bbdd637
Author: Robert Lee <rob.lee(a)linaro.org>
Date: Tue Mar 20 15:22:45 2012 -0500
ARM: davinci: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee <rob.lee(a)linaro.org>
Reviewed-by: Kevin Hilman <khilman(a)ti.com>
Reviewed-by: Daniel Lezcano <daniel.lezcano(a)linaro.org>
Acked-by: Jean Pihet <j-pihet(a)ti.com>
Signed-off-by: Len Brown <len.brown(a)intel.com>
The same happened to the at91's cpuidle driver.
Fix it by putting the initial value to 10000.
Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org>
---
arch/arm/mach-davinci/cpuidle.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index 36aef3a..f1ac1c9 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -65,7 +65,7 @@ static struct cpuidle_driver davinci_idle_driver = {
.states[1] = {
.enter = davinci_enter_idle,
.exit_latency = 10,
- .target_residency = 100000,
+ .target_residency = 10000,
.flags = CPUIDLE_FLAG_TIME_VALID,
.name = "DDR SR",
.desc = "WFI and DDR Self Refresh",
--
1.7.9.5
From: Mark Brown <broonie(a)linaro.org>
The version number has never been updated and the printk isn't based on
any interaction with the device.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/codecs/pcm3008.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/sound/soc/codecs/pcm3008.c b/sound/soc/codecs/pcm3008.c
index f2a6282..32e5a59 100644
--- a/sound/soc/codecs/pcm3008.c
+++ b/sound/soc/codecs/pcm3008.c
@@ -28,8 +28,6 @@
#include "pcm3008.h"
-#define PCM3008_VERSION "0.2"
-
#define PCM3008_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000)
@@ -64,8 +62,6 @@ static int pcm3008_soc_probe(struct snd_soc_codec *codec)
struct pcm3008_setup_data *setup = codec->dev->platform_data;
int ret = 0;
- printk(KERN_INFO "PCM3008 SoC Audio Codec %s\n", PCM3008_VERSION);
-
/* DEM1 DEM0 DE-EMPHASIS_MODE
* Low Low De-emphasis 44.1 kHz ON
* Low High De-emphasis OFF
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
Allow drivers to avoid implementing their own checks for simple rates by
specifying the limits in the master structure.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/spi/spi.c | 7 +++++++
include/linux/spi/spi.h | 6 ++++++
2 files changed, 13 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 978dda2..a52f166 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1387,6 +1387,13 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
BIT(xfer->bits_per_word - 1)))
return -EINVAL;
}
+
+ if (xfer->speed_hz && master->min_speed_hz &&
+ xfer->speed_hz < master->min_speed_hz)
+ return -EINVAL;
+ if (xfer->speed_hz && master->max_speed_hz &&
+ xfer->speed_hz > master->max_speed_hz)
+ return -EINVAL;
}
message->spi = spi;
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 28e440b..cdf6681 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -233,6 +233,8 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
* suported. If set, the SPI core will reject any transfer with an
* unsupported bits_per_word. If not set, this value is simply ignored,
* and it's up to the individual driver to perform any validation.
+ * @min_speed_hz: Lowest supported transfer speed
+ * @max_speed_hz: Highest supported transfer speed
* @flags: other constraints relevant to this driver
* @bus_lock_spinlock: spinlock for SPI bus locking
* @bus_lock_mutex: mutex for SPI bus locking
@@ -312,6 +314,10 @@ struct spi_master {
#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0UL : (BIT(bits) - 1))
#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
+ /* limits on transfer speed */
+ u32 min_speed_hz;
+ u32 max_speed_hz;
+
/* other constraints relevant to this driver */
u16 flags;
#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
It is not used outside of this file so doesn't need to be in the global
namespace.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/of/platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index e0a6514..b0d1ff8 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -196,7 +196,7 @@ EXPORT_SYMBOL(of_device_alloc);
* Returns pointer to created platform device, or NULL if a device was not
* registered. Unavailable devices will not get registered.
*/
-struct platform_device *of_platform_device_create_pdata(
+static struct platform_device *of_platform_device_create_pdata(
struct device_node *np,
const char *bus_id,
void *platform_data,
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
Reduces merge issues if nothing else.
Signed-off-by: Mark Brown <broonie(a)kernel.org>
---
drivers/regulator/Kconfig | 244 ++++++++++++++++++++++-----------------------
drivers/regulator/Makefile | 2 +-
2 files changed, 123 insertions(+), 123 deletions(-)
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index f1e6ad9..759b601 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -64,15 +64,11 @@ config REGULATOR_USERSPACE_CONSUMER
If unsure, say no.
-config REGULATOR_GPIO
- tristate "GPIO regulator support"
- depends on GPIOLIB
+config REGULATOR_88PM8607
+ bool "Marvell 88PM8607 Power regulators"
+ depends on MFD_88PM860X=y
help
- This driver provides support for regulators that can be
- controlled via gpios.
- It is capable of supporting current and voltage regulators
- and the platform has to provide a mapping of GPIO-states
- to target volts/amps.
+ This driver supports 88PM8607 voltage regulator chips.
config REGULATOR_AD5398
tristate "Analog Devices AD5398/AD5821 regulators"
@@ -81,6 +77,14 @@ config REGULATOR_AD5398
This driver supports AD5398 and AD5821 current regulator chips.
If building into module, its name is ad5398.ko.
+config REGULATOR_ANATOP
+ tristate "Freescale i.MX on-chip ANATOP LDO regulators"
+ depends on MFD_SYSCON
+ help
+ Say y here to support Freescale i.MX on-chip ANATOP LDOs
+ regulators. It is recommended that this option be
+ enabled on i.MX6 platform.
+
config REGULATOR_AAT2870
tristate "AnalogicTech AAT2870 Regulators"
depends on MFD_AAT2870_CORE
@@ -88,6 +92,22 @@ config REGULATOR_AAT2870
If you have a AnalogicTech AAT2870 say Y to enable the
regulator driver.
+config REGULATOR_AB3100
+ tristate "ST-Ericsson AB3100 Regulator functions"
+ depends on AB3100_CORE
+ default y if AB3100_CORE
+ help
+ These regulators correspond to functionality in the
+ AB3100 analog baseband dealing with power regulators
+ for the system.
+
+config REGULATOR_AB8500
+ bool "ST-Ericsson AB8500 Power Regulators"
+ depends on AB8500_CORE
+ help
+ This driver supports the regulators found on the ST-Ericsson mixed
+ signal AB8500 PMIC
+
config REGULATOR_ARIZONA
tristate "Wolfson Arizona class devices"
depends on MFD_ARIZONA
@@ -96,6 +116,13 @@ config REGULATOR_ARIZONA
Support for the regulators found on Wolfson Arizona class
devices.
+config REGULATOR_AS3711
+ tristate "AS3711 PMIC"
+ depends on MFD_AS3711
+ help
+ This driver provides support for the voltage regulators on the
+ AS3711 PMIC
+
config REGULATOR_DA903X
tristate "Dialog Semiconductor DA9030/DA9034 regulators"
depends on PMIC_DA903X
@@ -120,6 +147,17 @@ config REGULATOR_DA9055
This driver can also be built as a module. If so, the module
will be called da9055-regulator.
+config REGULATOR_DBX500_PRCMU
+ bool
+
+config REGULATOR_DB8500_PRCMU
+ bool "ST-Ericsson DB8500 Voltage Domain Regulators"
+ depends on MFD_DB8500_PRCMU
+ select REGULATOR_DBX500_PRCMU
+ help
+ This driver supports the voltage domain regulators controlled by the
+ DB8500 PRCMU
+
config REGULATOR_FAN53555
tristate "Fairchild FAN53555 Regulator"
depends on I2C
@@ -131,44 +169,57 @@ config REGULATOR_FAN53555
input voltage supply of 2.5V to 5.5V. The output voltage is
programmed through an I2C interface.
-config REGULATOR_ANATOP
- tristate "Freescale i.MX on-chip ANATOP LDO regulators"
- depends on MFD_SYSCON
+config REGULATOR_GPIO
+ tristate "GPIO regulator support"
+ depends on GPIOLIB
help
- Say y here to support Freescale i.MX on-chip ANATOP LDOs
- regulators. It is recommended that this option be
- enabled on i.MX6 platform.
+ This driver provides support for regulators that can be
+ controlled via gpios.
+ It is capable of supporting current and voltage regulators
+ and the platform has to provide a mapping of GPIO-states
+ to target volts/amps.
-config REGULATOR_MC13XXX_CORE
- tristate
+config REGULATOR_ISL6271A
+ tristate "Intersil ISL6271A Power regulator"
+ depends on I2C
+ help
+ This driver supports ISL6271A voltage regulator chip.
-config REGULATOR_MC13783
- tristate "Freescale MC13783 regulator driver"
- depends on MFD_MC13783
- select REGULATOR_MC13XXX_CORE
+config REGULATOR_LP3971
+ tristate "National Semiconductors LP3971 PMIC regulator driver"
+ depends on I2C
help
- Say y here to support the regulators found on the Freescale MC13783
- PMIC.
+ Say Y here to support the voltage regulators and convertors
+ on National Semiconductors LP3971 PMIC
-config REGULATOR_MC13892
- tristate "Freescale MC13892 regulator driver"
- depends on MFD_MC13XXX
- select REGULATOR_MC13XXX_CORE
+config REGULATOR_LP3972
+ tristate "National Semiconductors LP3972 PMIC regulator driver"
+ depends on I2C
help
- Say y here to support the regulators found on the Freescale MC13892
- PMIC.
+ Say Y here to support the voltage regulators and convertors
+ on National Semiconductors LP3972 PMIC
-config REGULATOR_ISL6271A
- tristate "Intersil ISL6271A Power regulator"
+config REGULATOR_LP872X
+ bool "TI/National Semiconductor LP8720/LP8725 voltage regulators"
+ depends on I2C=y
+ select REGMAP_I2C
+ help
+ This driver supports LP8720/LP8725 PMIC
+
+config REGULATOR_LP8755
+ tristate "TI LP8755 High Performance PMU driver"
depends on I2C
+ select REGMAP_I2C
help
- This driver supports ISL6271A voltage regulator chip.
+ This driver supports LP8755 High Performance PMU driver. This
+ chip contains six step-down DC/DC converters which can support
+ 9 mode multiphase configuration.
-config REGULATOR_88PM8607
- bool "Marvell 88PM8607 Power regulators"
- depends on MFD_88PM860X=y
+config REGULATOR_LP8788
+ bool "TI LP8788 Power Regulators"
+ depends on MFD_LP8788
help
- This driver supports 88PM8607 voltage regulator chips.
+ This driver supports LP8788 voltage regulator chip.
config REGULATOR_MAX1586
tristate "Maxim 1586/1587 voltage regulator"
@@ -259,48 +310,43 @@ config REGULATOR_MAX77693
and one current regulator 'CHARGER'. This is suitable for
Exynos-4x12 chips.
-config REGULATOR_PCAP
- tristate "Motorola PCAP2 regulator driver"
- depends on EZX_PCAP
- help
- This driver provides support for the voltage regulators of the
- PCAP2 PMIC.
+config REGULATOR_MC13XXX_CORE
+ tristate
-config REGULATOR_LP3971
- tristate "National Semiconductors LP3971 PMIC regulator driver"
- depends on I2C
+config REGULATOR_MC13783
+ tristate "Freescale MC13783 regulator driver"
+ depends on MFD_MC13783
+ select REGULATOR_MC13XXX_CORE
help
- Say Y here to support the voltage regulators and convertors
- on National Semiconductors LP3971 PMIC
+ Say y here to support the regulators found on the Freescale MC13783
+ PMIC.
-config REGULATOR_LP3972
- tristate "National Semiconductors LP3972 PMIC regulator driver"
- depends on I2C
+config REGULATOR_MC13892
+ tristate "Freescale MC13892 regulator driver"
+ depends on MFD_MC13XXX
+ select REGULATOR_MC13XXX_CORE
help
- Say Y here to support the voltage regulators and convertors
- on National Semiconductors LP3972 PMIC
+ Say y here to support the regulators found on the Freescale MC13892
+ PMIC.
-config REGULATOR_LP872X
- bool "TI/National Semiconductor LP8720/LP8725 voltage regulators"
- depends on I2C=y
- select REGMAP_I2C
+config REGULATOR_PALMAS
+ tristate "TI Palmas PMIC Regulators"
+ depends on MFD_PALMAS
help
- This driver supports LP8720/LP8725 PMIC
+ If you wish to control the regulators on the Palmas series of
+ chips say Y here. This will enable support for all the software
+ controllable SMPS/LDO regulators.
-config REGULATOR_LP8755
- tristate "TI LP8755 High Performance PMU driver"
- depends on I2C
- select REGMAP_I2C
- help
- This driver supports LP8755 High Performance PMU driver. This
- chip contains six step-down DC/DC converters which can support
- 9 mode multiphase configuration.
+ The regulators available on Palmas series chips vary depending
+ on the muxing. This is handled automatically in the driver by
+ reading the mux info from OTP.
-config REGULATOR_LP8788
- bool "TI LP8788 Power Regulators"
- depends on MFD_LP8788
+config REGULATOR_PCAP
+ tristate "Motorola PCAP2 regulator driver"
+ depends on EZX_PCAP
help
- This driver supports LP8788 voltage regulator chip.
+ This driver provides support for the voltage regulators of the
+ PCAP2 PMIC.
config REGULATOR_PCF50633
tristate "NXP PCF50633 regulator driver"
@@ -335,44 +381,15 @@ config REGULATOR_S5M8767
via I2C bus. S5M8767A have 9 Bucks and 28 LDOs output and
supports DVS mode with 8bits of output voltage control.
-config REGULATOR_AB3100
- tristate "ST-Ericsson AB3100 Regulator functions"
- depends on AB3100_CORE
- default y if AB3100_CORE
- help
- These regulators correspond to functionality in the
- AB3100 analog baseband dealing with power regulators
- for the system.
-
-config REGULATOR_AB8500
- bool "ST-Ericsson AB8500 Power Regulators"
- depends on AB8500_CORE
- help
- This driver supports the regulators found on the ST-Ericsson mixed
- signal AB8500 PMIC
-
-config REGULATOR_DBX500_PRCMU
- bool
-
-config REGULATOR_DB8500_PRCMU
- bool "ST-Ericsson DB8500 Voltage Domain Regulators"
- depends on MFD_DB8500_PRCMU
- select REGULATOR_DBX500_PRCMU
- help
- This driver supports the voltage domain regulators controlled by the
- DB8500 PRCMU
-
-config REGULATOR_PALMAS
- tristate "TI Palmas PMIC Regulators"
- depends on MFD_PALMAS
+config REGULATOR_TI_ABB
+ bool "TI Adaptive Body Bias on-chip LDO"
+ depends on ARCH_OMAP
help
- If you wish to control the regulators on the Palmas series of
- chips say Y here. This will enable support for all the software
- controllable SMPS/LDO regulators.
-
- The regulators available on Palmas series chips vary depending
- on the muxing. This is handled automatically in the driver by
- reading the mux info from OTP.
+ Select this option to support Texas Instruments' on-chip Adaptive Body
+ Bias (ABB) LDO regulators. It is recommended that this option be
+ enabled on required TI SoC. Certain Operating Performance Points
+ on TI SoCs may be unstable without enabling this as it provides
+ device specific optimized bias to allow/optimize functionality.
config REGULATOR_TPS51632
tristate "TI TPS51632 Power Regulator"
@@ -481,16 +498,6 @@ config REGULATOR_TWL4030
This driver supports the voltage regulators provided by
this family of companion chips.
-config REGULATOR_TI_ABB
- bool "TI Adaptive Body Bias on-chip LDO"
- depends on ARCH_OMAP
- help
- Select this option to support Texas Instruments' on-chip Adaptive Body
- Bias (ABB) LDO regulators. It is recommended that this option be
- enabled on required TI SoC. Certain Operating Performance Points
- on TI SoCs may be unstable without enabling this as it provides
- device specific optimized bias to allow/optimize functionality.
-
config REGULATOR_VEXPRESS
tristate "Versatile Express regulators"
depends on VEXPRESS_CONFIG
@@ -526,12 +533,5 @@ config REGULATOR_WM8994
This driver provides support for the voltage regulators on the
WM8994 CODEC.
-config REGULATOR_AS3711
- tristate "AS3711 PMIC"
- depends on MFD_AS3711
- help
- This driver provides support for the voltage regulators on the
- AS3711 PMIC
-
endif
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index ba4a3cf..d240772 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
obj-$(CONFIG_REGULATOR_RC5T583) += rc5t583-regulator.o
obj-$(CONFIG_REGULATOR_S2MPS11) += s2mps11.o
obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
+obj-$(CONFIG_REGULATOR_TI_ABB) += ti-abb-regulator.o
obj-$(CONFIG_REGULATOR_TPS6105X) += tps6105x-regulator.o
obj-$(CONFIG_REGULATOR_TPS62360) += tps62360-regulator.o
obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o
@@ -64,7 +65,6 @@ obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
obj-$(CONFIG_REGULATOR_TPS65912) += tps65912-regulator.o
obj-$(CONFIG_REGULATOR_TPS80031) += tps80031-regulator.o
obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o
-obj-$(CONFIG_REGULATOR_TI_ABB) += ti-abb-regulator.o
obj-$(CONFIG_REGULATOR_VEXPRESS) += vexpress.o
obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o
obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
Enable the build of drivers which don't have any real build time
dependency on their architecture or platform with COMPILE_TEST,
providing better build time coverage.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/spi/Kconfig | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 175491f..d39c998 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -70,14 +70,14 @@ config SPI_ATH79
config SPI_ATMEL
tristate "Atmel SPI Controller"
- depends on (ARCH_AT91 || AVR32)
+ depends on (ARCH_AT91 || AVR32 || COMPILE_TEST)
help
This selects a driver for the Atmel SPI Controller, present on
many AT32 (AVR32) and AT91 (ARM) chips.
config SPI_BCM2835
tristate "BCM2835 SPI controller"
- depends on ARCH_BCM2835
+ depends on ARCH_BCM2835 || COMPILE_TEST
help
This selects a driver for the Broadcom BCM2835 SPI master.
@@ -159,7 +159,7 @@ config SPI_DAVINCI
config SPI_EP93XX
tristate "Cirrus Logic EP93xx SPI controller"
- depends on ARCH_EP93XX
+ depends on ARCH_EP93XX || COMPILE_TEST
help
This enables using the Cirrus EP93xx SPI controller in master
mode.
@@ -191,7 +191,7 @@ config SPI_GPIO
config SPI_IMX
tristate "Freescale i.MX SPI controllers"
- depends on ARCH_MXC
+ depends on ARCH_MXC || COMPILE_TEST
select SPI_BITBANG
default m if IMX_HAVE_PLATFORM_SPI_IMX
help
@@ -280,20 +280,20 @@ config SPI_OMAP_UWIRE
config SPI_OMAP24XX
tristate "McSPI driver for OMAP"
- depends on ARCH_OMAP2PLUS
+ depends on ARCH_OMAP2PLUS || COMPILE_TEST
help
SPI master controller for OMAP24XX and later Multichannel SPI
(McSPI) modules.
config SPI_OMAP_100K
tristate "OMAP SPI 100K"
- depends on ARCH_OMAP850 || ARCH_OMAP730
+ depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST
help
OMAP SPI 100K master controller for omap7xx boards.
config SPI_ORION
tristate "Orion SPI master"
- depends on PLAT_ORION
+ depends on PLAT_ORION || COMPILE_TEST
help
This enables using the SPI master controller on the Orion chips.
@@ -318,7 +318,7 @@ config SPI_PPC4xx
config SPI_PXA2XX_PXADMA
bool "PXA2xx SSP legacy PXA DMA API support"
- depends on SPI_PXA2XX && ARCH_PXA
+ depends on (SPI_PXA2XX && ARCH_PXA) || COMPILE_TEST
help
Enable PXA private legacy DMA API support. Note that this is
deprecated in favor of generic DMA engine API.
@@ -385,7 +385,7 @@ config SPI_SH_MSIOF
config SPI_SH
tristate "SuperH SPI controller"
- depends on SUPERH
+ depends on SUPERH || COMPILE_TEST
help
SPI driver for SuperH SPI blocks.
@@ -398,13 +398,13 @@ config SPI_SH_SCI
config SPI_SH_HSPI
tristate "SuperH HSPI controller"
- depends on ARCH_SHMOBILE
+ depends on ARCH_SHMOBILE || COMPILE_TEST
help
SPI driver for SuperH HSPI blocks.
config SPI_SIRF
tristate "CSR SiRFprimaII SPI controller"
- depends on ARCH_SIRF
+ depends on ARCH_SIRF || COMPILE_TEST
select SPI_BITBANG
help
SPI driver for CSR SiRFprimaII SoCs
@@ -418,7 +418,7 @@ config SPI_MXS
config SPI_TEGRA114
tristate "NVIDIA Tegra114 SPI Controller"
- depends on ARCH_TEGRA && TEGRA20_APB_DMA
+ depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
help
SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller
is different than the older SoCs SPI controller and also register interface
@@ -426,7 +426,7 @@ config SPI_TEGRA114
config SPI_TEGRA20_SFLASH
tristate "Nvidia Tegra20 Serial flash Controller"
- depends on ARCH_TEGRA
+ depends on ARCH_TEGRA || COMPILE_TEST
help
SPI driver for Nvidia Tegra20 Serial flash Controller interface.
The main usecase of this controller is to use spi flash as boot
@@ -434,7 +434,7 @@ config SPI_TEGRA20_SFLASH
config SPI_TEGRA20_SLINK
tristate "Nvidia Tegra20/Tegra30 SLINK Controller"
- depends on ARCH_TEGRA && TEGRA20_APB_DMA
+ depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
help
SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface.
@@ -457,7 +457,7 @@ config SPI_TOPCLIFF_PCH
config SPI_TXX9
tristate "Toshiba TXx9 SPI controller"
- depends on GPIOLIB && CPU_TX49XX
+ depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST)
help
SPI driver for Toshiba TXx9 MIPS SoCs
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
In order to make it easier to convert to transfer_one_message() lift the
code that does the actual message transfer out of the work function that
implements the message pump. This should have no functional impact, it's
just a simple code motion patch.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/spi/spi-bitbang.c | 199 ++++++++++++++++++++++++----------------------
1 file changed, 104 insertions(+), 95 deletions(-)
diff --git a/drivers/spi/spi-bitbang.c b/drivers/spi/spi-bitbang.c
index 495ce0a..8b8487c 100644
--- a/drivers/spi/spi-bitbang.c
+++ b/drivers/spi/spi-bitbang.c
@@ -255,117 +255,126 @@ static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
* Drivers can provide word-at-a-time i/o primitives, or provide
* transfer-at-a-time ones to leverage dma or fifo hardware.
*/
-static void bitbang_work(struct work_struct *work)
+static int spi_bitbang_transfer_one(struct spi_device *spi,
+ struct spi_message *m)
{
- struct spi_bitbang *bitbang =
- container_of(work, struct spi_bitbang, work);
- unsigned long flags;
- struct spi_message *m, *_m;
+ struct spi_bitbang *bitbang;
+ unsigned nsecs;
+ struct spi_transfer *t = NULL;
+ unsigned tmp;
+ unsigned cs_change;
+ int status;
+ int do_setup = -1;
- spin_lock_irqsave(&bitbang->lock, flags);
- bitbang->busy = 1;
- list_for_each_entry_safe(m, _m, &bitbang->queue, queue) {
- struct spi_device *spi;
- unsigned nsecs;
- struct spi_transfer *t = NULL;
- unsigned tmp;
- unsigned cs_change;
- int status;
- int do_setup = -1;
+ bitbang = spi_master_get_devdata(spi->master);
- list_del(&m->queue);
- spin_unlock_irqrestore(&bitbang->lock, flags);
+ /* FIXME this is made-up ... the correct value is known to
+ * word-at-a-time bitbang code, and presumably chipselect()
+ * should enforce these requirements too?
+ */
+ nsecs = 100;
- /* FIXME this is made-up ... the correct value is known to
- * word-at-a-time bitbang code, and presumably chipselect()
- * should enforce these requirements too?
- */
- nsecs = 100;
+ tmp = 0;
+ cs_change = 1;
+ status = 0;
- spi = m->spi;
- tmp = 0;
- cs_change = 1;
- status = 0;
+ list_for_each_entry (t, &m->transfers, transfer_list) {
- list_for_each_entry (t, &m->transfers, transfer_list) {
-
- /* override speed or wordsize? */
- if (t->speed_hz || t->bits_per_word)
- do_setup = 1;
-
- /* init (-1) or override (1) transfer params */
- if (do_setup != 0) {
- status = bitbang->setup_transfer(spi, t);
- if (status < 0)
- break;
- if (do_setup == -1)
- do_setup = 0;
- }
-
- /* set up default clock polarity, and activate chip;
- * this implicitly updates clock and spi modes as
- * previously recorded for this device via setup().
- * (and also deselects any other chip that might be
- * selected ...)
- */
- if (cs_change) {
- bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
- ndelay(nsecs);
- }
- cs_change = t->cs_change;
- if (!t->tx_buf && !t->rx_buf && t->len) {
- status = -EINVAL;
- break;
- }
+ /* override speed or wordsize? */
+ if (t->speed_hz || t->bits_per_word)
+ do_setup = 1;
- /* transfer data. the lower level code handles any
- * new dma mappings it needs. our caller always gave
- * us dma-safe buffers.
- */
- if (t->len) {
- /* REVISIT dma API still needs a designated
- * DMA_ADDR_INVALID; ~0 might be better.
- */
- if (!m->is_dma_mapped)
- t->rx_dma = t->tx_dma = 0;
- status = bitbang->txrx_bufs(spi, t);
- }
- if (status > 0)
- m->actual_length += status;
- if (status != t->len) {
- /* always report some kind of error */
- if (status >= 0)
- status = -EREMOTEIO;
+ /* init (-1) or override (1) transfer params */
+ if (do_setup != 0) {
+ status = bitbang->setup_transfer(spi, t);
+ if (status < 0)
break;
- }
- status = 0;
-
- /* protocol tweaks before next transfer */
- if (t->delay_usecs)
- udelay(t->delay_usecs);
-
- if (cs_change && !list_is_last(&t->transfer_list, &m->transfers)) {
- /* sometimes a short mid-message deselect of the chip
- * may be needed to terminate a mode or command
- */
- ndelay(nsecs);
- bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
- ndelay(nsecs);
- }
+ if (do_setup == -1)
+ do_setup = 0;
}
- m->status = status;
- m->complete(m->context);
+ /* set up default clock polarity, and activate chip;
+ * this implicitly updates clock and spi modes as
+ * previously recorded for this device via setup().
+ * (and also deselects any other chip that might be
+ * selected ...)
+ */
+ if (cs_change) {
+ bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
+ ndelay(nsecs);
+ }
+ cs_change = t->cs_change;
+ if (!t->tx_buf && !t->rx_buf && t->len) {
+ status = -EINVAL;
+ break;
+ }
- /* normally deactivate chipselect ... unless no error and
- * cs_change has hinted that the next message will probably
- * be for this chip too.
+ /* transfer data. the lower level code handles any
+ * new dma mappings it needs. our caller always gave
+ * us dma-safe buffers.
*/
- if (!(status == 0 && cs_change)) {
+ if (t->len) {
+ /* REVISIT dma API still needs a designated
+ * DMA_ADDR_INVALID; ~0 might be better.
+ */
+ if (!m->is_dma_mapped)
+ t->rx_dma = t->tx_dma = 0;
+ status = bitbang->txrx_bufs(spi, t);
+ }
+ if (status > 0)
+ m->actual_length += status;
+ if (status != t->len) {
+ /* always report some kind of error */
+ if (status >= 0)
+ status = -EREMOTEIO;
+ break;
+ }
+ status = 0;
+
+ /* protocol tweaks before next transfer */
+ if (t->delay_usecs)
+ udelay(t->delay_usecs);
+
+ if (cs_change && !list_is_last(&t->transfer_list, &m->transfers)) {
+ /* sometimes a short mid-message deselect of the chip
+ * may be needed to terminate a mode or command
+ */
ndelay(nsecs);
bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
ndelay(nsecs);
}
+ }
+
+ m->status = status;
+ m->complete(m->context);
+
+ /* normally deactivate chipselect ... unless no error and
+ * cs_change has hinted that the next message will probably
+ * be for this chip too.
+ */
+ if (!(status == 0 && cs_change)) {
+ ndelay(nsecs);
+ bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
+ ndelay(nsecs);
+ }
+
+ return status;
+}
+
+static void bitbang_work(struct work_struct *work)
+{
+ struct spi_bitbang *bitbang =
+ container_of(work, struct spi_bitbang, work);
+ unsigned long flags;
+ struct spi_message *m, *_m;
+
+ spin_lock_irqsave(&bitbang->lock, flags);
+ bitbang->busy = 1;
+ list_for_each_entry_safe(m, _m, &bitbang->queue, queue) {
+ list_del(&m->queue);
+ spin_unlock_irqrestore(&bitbang->lock, flags);
+
+ spi_bitbang_transfer_one(m->spi, m);
spin_lock_irqsave(&bitbang->lock, flags);
}
--
1.8.3.2
From: Mark Brown <broonie(a)linaro.org>
Currently no drivers use the ability to override spi_bitbang_transfer()
and if any started this would make it harder to convert the bitbang code
to use transfer_one_message() so remove the export in order to prevent
anyone starting.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/spi/spi-bitbang.c | 3 +--
include/linux/spi/spi_bitbang.h | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/spi/spi-bitbang.c b/drivers/spi/spi-bitbang.c
index a63d7da..495ce0a 100644
--- a/drivers/spi/spi-bitbang.c
+++ b/drivers/spi/spi-bitbang.c
@@ -376,7 +376,7 @@ static void bitbang_work(struct work_struct *work)
/**
* spi_bitbang_transfer - default submit to transfer queue
*/
-int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
+static int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
{
struct spi_bitbang *bitbang;
unsigned long flags;
@@ -398,7 +398,6 @@ int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
return status;
}
-EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
/*----------------------------------------------------------------------*/
diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h
index f987a2b..b5aa215 100644
--- a/include/linux/spi/spi_bitbang.h
+++ b/include/linux/spi/spi_bitbang.h
@@ -41,7 +41,6 @@ struct spi_bitbang {
*/
extern int spi_bitbang_setup(struct spi_device *spi);
extern void spi_bitbang_cleanup(struct spi_device *spi);
-extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
extern int spi_bitbang_setup_transfer(struct spi_device *spi,
struct spi_transfer *t);
--
1.8.3.2