From: Arnaldo Carvalho de Melo <acme(a)ghostprotocols.net>
Hi Ingo,
There are more patchkits outstanding that I have to revisit/retest, but
lets get this first batch in to keep pull reqs at a reasonable size.
Please consider pulling,
- Arnaldo
The following changes since commit 1341f3e4c0276aae3de6d902c9202265d89fe438:
Merge tag 'perf-core-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core (2014-01-12 17:39:47 +0100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux tags/perf-core-for-mingo
for you to fetch changes up to 26f7f9877234e6b9ed87eff4ca450631bafe0182:
perf tools: Remove unused test-volatile-register-var.c (2014-01-13 17:20:05 -0300)
----------------------------------------------------------------
New features:
. perf record: Add --initial-delay option (Andi Kleen)
. Column colouring improvements in 'diff' (Ramkumar Ramachandra)
Fixes:
. Don't show counter information when workload fails (Arnaldo Carvalho de Melo)
. Fixup leak on error path in parse events test. (Arnaldo Carvalho de Melo)
. Fix --delay option in 'stat' man page (Andi Kleen)
. Use the DWARF unwind info only if loaded (Jean Pihet):
Developer stuff:
. Improve forked workload error reporting by sending the errno in the signal
data queueing integer field, using sigqueue and by doing the signal setup in
the evlist methods, removing open coded equivalents in various tools. (Arnaldo Carvalho de Melo)
. Do more auto exit cleanup shores in the 'evlist' destructor, so that the tools
don't have to all do that sequence. (Arnaldo Carvalho de Melo)
. Pack 'struct perf_session_env' and 'struct trace' (Arnaldo Carvalho de Melo)
. Include tools/lib/api/ in MANIFEST, fixing detached tarballs (Arnaldo Carvalho de Melo)
. Add test for building detached source tarballs (Arnaldo Carvalho de Melo)
. Shut up libtracevent plugins make message (Jiri Olsa)
. Fix installation tests path setup (Jiri Olsa)
. Fix id_hdr_size initialization (Jiri Olsa)
. Move some header files from tools/perf/ to tools/include/ to make them available to
other tools/ dwelling codebases (Namhyung Kim)
. Fix 'probe' build when DWARF support libraries not present (Arnaldo Carvalho de Melo)
Refactorings:
. Move logic to warn about kptr_restrict'ed kernels to separate
function in 'report' (Arnaldo Carvalho de Melo)
. Move hist browser selection code to separate function (Arnaldo Carvalho de Melo)
. Move histogram entries collapsing to separate function (Arnaldo Carvalho de Melo)
. Introduce evlist__for_each() & friends (Arnaldo Carvalho de Melo)
. Automate setup of FEATURE_CHECK_(C|LD)FLAGS-all variables (Jiri Olsa)
. Move arch setup into seprate Makefile (Jiri Olsa)
Trivial stuff:
. Remove misplaced __maybe_unused in 'stat' (Arnaldo Carvalho de Melo)
. Remove old evsel_list usage in 'record' (Arnaldo Carvalho de Melo)
. Comment typo fix (Cody P Schafer)
. Remove unused test-volatile-register-var.c (Yann Droneaud)
Signed-off-by: Arnaldo Carvalho de Melo <acme(a)redhat.com>
----------------------------------------------------------------
Andi Kleen (2):
perf stat: Fix --delay option in man page
perf record: Add --initial-delay option
Arnaldo Carvalho de Melo (18):
perf stat: Don't show counter information when workload fails
perf evlist: Send the errno in the signal when workload fails
perf evlist: Move the SIGUSR1 error reporting logic to prepare_workload
perf record: Remove old evsel_list usage
perf evlist: Move destruction of maps to evlist destructor
perf evlist: Close fds on destructor
perf evlist: Auto unmap on destructor
perf tests: Fixup leak on error path in parse events test
perf stat: Remove misplaced __maybe_unused
perf header: Pack 'struct perf_session_env'
perf trace: Pack 'struct trace'
perf report: Move logic to warn about kptr_restrict'ed kernels to separate function
perf report: Move hist browser selection code to separate function
perf report: Move histogram entries collapsing to separate function
perf evlist: Introduce evlist__for_each() & friends
perf tools: Include tools/lib/api/ in MANIFEST
perf tools: Add test for building detached source tarballs
perf probe: Fix build when DWARF support libraries not present
Cody P Schafer (1):
tools perf: Comment typo fix
Jean Pihet (1):
perf tools: Use the DWARF unwind info only if loaded
Jiri Olsa (7):
perf tools: Move arch setup into seprate Makefile
perf tests: Fix installation tests path setup
tools lib traceevent: Replace tabs with spaces for all non-commands statements
tools lib traceevent: Shut up plugins make message
perf tools: Automate setup of FEATURE_CHECK_(C|LD)FLAGS-all variables
perf machine: Fix id_hdr_size initialization
perf tools: Make perf_event__synthesize_mmap_events global
Namhyung Kim (4):
tools include: Move perf's linux/compiler.h to a generic place
tools include: Define likely/unlikely in linux/compiler.h
tools include: Move perf's bug.h to a generic place
tools include: Include <linux/compiler.h> from asm/bug.h
Ramkumar Ramachandra (4):
perf tools: Generalize percent_color_snprintf()
perf diff: Color the Delta column
perf diff: Color the Ratio column
perf diff: Color the Weighted Diff column
Yann Droneaud (1):
perf tools: Remove unused test-volatile-register-var.c
tools/{perf/util => }/include/asm/bug.h | 9 +-
tools/{perf/util => }/include/linux/compiler.h | 12 +-
tools/lib/traceevent/Makefile | 59 ++++---
tools/perf/Documentation/perf-record.txt | 4 +
tools/perf/Documentation/perf-stat.txt | 2 +-
tools/perf/MANIFEST | 4 +-
tools/perf/Makefile.perf | 4 +-
tools/perf/builtin-annotate.c | 2 +-
tools/perf/builtin-diff.c | 98 ++++++++++-
tools/perf/builtin-evlist.c | 2 +-
tools/perf/builtin-inject.c | 2 +-
tools/perf/builtin-kvm.c | 6 +-
tools/perf/builtin-record.c | 82 +++++----
tools/perf/builtin-report.c | 192 ++++++++++++---------
tools/perf/builtin-script.c | 5 +-
tools/perf/builtin-stat.c | 66 ++++---
tools/perf/builtin-top.c | 14 +-
tools/perf/builtin-trace.c | 30 ++--
tools/perf/config/Makefile | 67 ++++---
tools/perf/config/Makefile.arch | 22 +++
.../feature-checks/test-volatile-register-var.c | 6 -
tools/perf/perf.h | 1 +
tools/perf/tests/code-reading.c | 7 +-
tools/perf/tests/evsel-roundtrip-name.c | 2 +-
tools/perf/tests/hists_link.c | 4 +-
tools/perf/tests/keep-tracking.c | 7 +-
tools/perf/tests/make | 40 +++--
tools/perf/tests/mmap-basic.c | 25 ++-
tools/perf/tests/open-syscall-tp-fields.c | 16 +-
tools/perf/tests/parse-events.c | 10 +-
tools/perf/tests/perf-record.c | 21 +--
tools/perf/tests/perf-targz-src-pkg | 21 +++
tools/perf/tests/perf-time-to-tsc.c | 6 -
tools/perf/tests/sw-clock.c | 18 +-
tools/perf/tests/task-exit.c | 33 ++--
tools/perf/ui/browsers/hists.c | 5 +-
tools/perf/ui/gtk/hists.c | 2 +-
tools/perf/util/cgroup.c | 4 +-
tools/perf/util/color.c | 15 +-
tools/perf/util/color.h | 1 +
tools/perf/util/event.c | 12 +-
tools/perf/util/event.h | 7 +
tools/perf/util/evlist.c | 78 +++++----
tools/perf/util/evlist.h | 69 +++++++-
tools/perf/util/evsel.c | 3 +-
tools/perf/util/header.c | 19 +-
tools/perf/util/header.h | 10 +-
tools/perf/util/machine.c | 1 +
tools/perf/util/parse-events.c | 5 +-
tools/perf/util/pmu.c | 2 +-
tools/perf/util/probe-event.c | 5 +-
tools/perf/util/python.c | 3 +-
tools/perf/util/record.c | 6 +-
tools/perf/util/session.c | 6 +-
tools/perf/util/unwind.c | 8 +-
55 files changed, 724 insertions(+), 436 deletions(-)
rename tools/{perf/util => }/include/asm/bug.h (81%)
rename tools/{perf/util => }/include/linux/compiler.h (64%)
create mode 100644 tools/perf/config/Makefile.arch
delete mode 100644 tools/perf/config/feature-checks/test-volatile-register-var.c
create mode 100755 tools/perf/tests/perf-targz-src-pkg
- A few trivial renames requested by Catalin
- Pass cluster_id around by value outside of parse_cluster
arm64: topology: Implement basic CPU topology support
arm64: topology: Add support for topology DT bindings
arm64: topology: Tell the scheduler about the relative
arm64: topology: Provide relative power numbers for cores
Mark & Catalin,
Could you like to review the merge conflict patch, which at:
git://git.linaro.org/kernel/linux-linaro-stable.git linux-linaro-lsk-test
===
commit 450cdfa9c5713551ab1438ab210679868b52a994
Merge: bf78886 8b4ed85
Author: Alex Shi <alex.shi(a)linaro.org>
Date: Fri Jan 10 10:50:57 2014 +0800
Merge remote-tracking branch 'stable/linux-3.10.y' into linux-linaro-lsk
Conflicts:
arch/arm64/kernel/smp.c
Signed-off-by: Alex Shi <alex.shi(a)linaro.org>
diff --cc arch/arm64/kernel/smp.c
index 5e9d274,9c93e12..87340fd
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@@ -150,17 -187,17 +150,10 @@@ asmlinkage void __cpuinit secondary_sta
preempt_disable();
trace_hardirqs_off();
- /*
- * Let the primary processor know we're out of the
- * pen, then head off into the C entry point
- */
- write_pen_release(INVALID_HWID);
+ if (cpu_ops[cpu]->cpu_postboot)
+ cpu_ops[cpu]->cpu_postboot();
-- /*
- * Enable local interrupts.
- */
- notify_cpu_starting(cpu);
- local_irq_enable();
- local_fiq_enable();
-
- * Synchronise with the boot thread.
- */
- raw_spin_lock(&boot_lock);
- raw_spin_unlock(&boot_lock);
+ smp_store_cpu_info(cpu);
/*
* OK, now it's safe to let the boot CPU continue. Wait for
From: Victor Kamensky <victor.kamensky(a)linaro.org>
If kernel operates in BE mode on device that has LE bootloader/ROM code,
we need to switch CPU to operate in BE mode before it will start to
access BE data. Generic secondary_startup function that is called from
OMAP specific secondary startup code will do the switch, but we need
to do it earlier because OMAP's secondary_startup code works with BE data.
Signed-off-by: Victor Kamensky <victor.kamensky(a)linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk(a)linaro.org>
---
This is a part of RFC series [1].
Based on v3.13-rc8.
[1] http://www.spinics.net/lists/linux-omap/msg99927.html
arch/arm/mach-omap2/omap-headsmp.S | 13 +++++++++++++
arch/arm/mach-omap2/sleep44xx.S | 6 ++++++
2 files changed, 19 insertions(+)
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 75e9295..75c98d4 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -17,6 +17,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
+#include <asm/assembler.h>
#include "omap44xx.h"
@@ -58,6 +59,12 @@ hold: ldr r12,=0x103
bne hold
/*
+ * ROM code operates in little endian mode, when we get control we
+ * need to switch it back to big endian mode.
+ */
+ARM_BE8(setend be)
+
+ /*
* we've been released from the wait loop,secondary_stack
* should now contain the SVC stack for this core
*/
@@ -75,6 +82,12 @@ hold_2: ldr r12,=0x103
bne hold_2
/*
+ * ROM code operates in little endian mode, when we get control we
+ * need to switch it back to big endian mode.
+ */
+ARM_BE8(setend be)
+
+ /*
* GIC distributor control register has changed between
* CortexA9 r1pX and r2pX. The Control Register secure
* banked version is now composed of 2 bits:
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 9086ce0..e556c8b 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -249,6 +249,12 @@ ENDPROC(omap4_finish_suspend)
*/
ENTRY(omap4_cpu_resume)
/*
+ * ROM code operates in little endian mode, when we get control we
+ * need to switch it back to big endian mode.
+ */
+ARM_BE8(setend be)
+
+ /*
* Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
* OMAP44XX EMU/HS devices - CPU0 SMP bit access is enabled in PPA
* init and for CPU1, a secure PPA API provided. CPU0 must be ON
--
1.7.9.5
This patchset does a cleanup on the parameters passed from the function
'trigger_load_balance' to the underneath functions.
The cpu is passed as parameter to the different functions as well as the struct
rq but this one contains already the cpu information. Moreover, in the call
stack for these functions, we have the struct rq retrieved from the cpu, and then
the cpu retrieve from the struct rq, etc ...
The patchset unifies all these functions to have a struct rq parameter and
removes the pointless parameters.
-static inline int find_new_ilb(int call_cpu)
+static inline int find_new_ilb(void)
-static void nohz_balancer_kick(int cpu)
+static void nohz_balancer_kick(void)
-static void rebalance_domains(int cpu, enum cpu_idle_type idle)
+static void rebalance_domains(struct rq *rq, enum cpu_idle_type idle)
-static void nohz_idle_balance(int this_cpu, enum cpu_idle_type idle)
+static void nohz_idle_balance(struct rq *this_rq, enum cpu_idle_type idle)
-static inline int nohz_kick_needed(struct rq *rq, int cpu)
+static inline int nohz_kick_needed(struct rq *rq)
-static inline int on_null_domain(int cpu)
+static inline int on_null_domain(struct rq *rq)
Changelog:
V2:
- added missing patch 1/8
- added acked-by from Preeti U Murthy for patch 4 and 5
Daniel Lezcano (8):
sched: reduce trigger_load_balance parameters
sched: reduce nohz_kick_needed parameters
sched: pass struct rq to on_null_domain function
sched: remove unused parameter for find_new_ilb
sched: remove unused parameter in nohz_balancer_kick function
sched: pass struct rq to rebalance_domains function
sched: pass struct rq to nohz_idle_balance function
sched: factor out on_null_domain check in trigger_load_balance
function
kernel/sched/core.c | 2 +-
kernel/sched/fair.c | 45 +++++++++++++++++++++++----------------------
kernel/sched/sched.h | 2 +-
3 files changed, 25 insertions(+), 24 deletions(-)
--
1.7.9.5
On 28 December 2013 00:14, Greg KH <gregkh(a)linuxfoundation.org> wrote:
> On Fri, Dec 27, 2013 at 03:47:31PM +0530, Tushar Behera wrote:
>> On 27 December 2013 12:08, Greg KH <gregkh(a)linuxfoundation.org> wrote:
>> > On Fri, Dec 27, 2013 at 12:00:20PM +0530, Tushar Behera wrote:
>> >> On 27 December 2013 10:48, Greg KH <gregkh(a)linuxfoundation.org> wrote:
>> >> > On Fri, Dec 27, 2013 at 10:37:28AM +0530, Tushar Behera wrote:
>>
>> [ ... ]
>>
>> >> >> @@ -951,8 +949,6 @@ static struct uart_driver s3c24xx_uart_drv = {
>> >> >> .nr = CONFIG_SERIAL_SAMSUNG_UARTS,
>> >> >> .cons = S3C24XX_SERIAL_CONSOLE,
>> >> >> .dev_name = S3C24XX_SERIAL_NAME,
>> >> >> - .major = S3C24XX_SERIAL_MAJOR,
>> >> >> - .minor = S3C24XX_SERIAL_MINOR,
>> >> >
>> >> > Doesn't this break existing systems and configurations that are
>> >> > expecting 204:64 as the location of this serial port?
>> >> >
>> >>
>> >> I tested this on Exynos4210-Origen, Exynos5250-Arndale board, it works
>> >> fine there. I haven't tested on any older boards.
>> >
>> > How did it work? You are relying on some userspace tools to do this
>> > properly, right? What about systems without those specific tools?
>> >
>>
>> Enabling CONFIG_DEVTMPFS, all the /dev/ttySAC<n> nodes are generated
>> and the appropriate console is specified through command line
>> argument.
>
> But what about systems that rely on a hard-coded /dev?
>
> Look, I'm all for making everyone use devtmpfs, but just changing
> major:minor numbers for drivers isn't ok, as you are changing the
> userspace ABI for the device.
>
> Please realize what you are asking for here, I really don't think you
> grasp it given that you didn't ask any of the maintainers of this driver
> about the change in the first place.
>
> Please get approval for this patch from others within Linaro before
> sending it out again. Linaro has a process in place for this type of
> thing, please use it, otherwise it makes people like me really grumpy
> and upset and causes me to yell at people at their conferences.
>
> greg k-h
Asking for opinion about this ... Without this patch, I can't get
serial console to come up on Exynos platforms when amba-pl011 driver
enabled. But Greg is particularly not at all happy with this patch.
Any comments with respect to fixing this issue would be highly
appreciated.
Attaching the complete patch for reference.
--
Tushar Behera
Reworked initial Ben's series for big endian support [1].
Dropped patches that are not directly related to kprobes.
Current set of patches is enough to have functional BE kprobes.
One ARM kprobe test fails on Cortex-A15 boards (TC2 and Keystone2 EVM),
while it passes on Pandaboard. The issue is not related to this series
and already present in v3.13-rc7. I'll try to look into it later.
v1..v2: Fixed coprocessor instruction building for ARM tests in the patch
"ARM: kprobes-test: use <asm/opcodes.h> for ARM instruction building"
Based on v3.13-rc7.
[1] http://www.spinics.net/lists/arm-kernel/msg285210.html
Ben Dooks (4):
ARM: kprobes: fix instruction fetch order with <asm/opcodes.h>
ARM: kprobes-test: use <asm/opcodes.h> for instruction accesses
ARM: kprobes-test: use <asm/opcodes.h> for ARM instruction building
ARM: kprobes-test: use <asm/opcodes.h> for Thumb instruction building
Taras Kondratiuk (1):
ARM: kprobes-test: Workaround GAS .align bug
arch/arm/kernel/kprobes-common.c | 19 +-
arch/arm/kernel/kprobes-test-arm.c | 603 +++++++++++++++++-----------------
arch/arm/kernel/kprobes-test-thumb.c | 447 ++++++++++++-------------
arch/arm/kernel/kprobes-test.c | 13 +-
arch/arm/kernel/kprobes-test.h | 2 +-
arch/arm/kernel/kprobes-thumb.c | 20 +-
arch/arm/kernel/kprobes.c | 9 +-
7 files changed, 562 insertions(+), 551 deletions(-)
--
1.7.9.5
From: Mark Brown <broonie(a)linaro.org>
Trent Piepho observed that since the current realistic maximum number of
data lines is four we can pack the spi_transfer struct more efficiently
if we use a bitfield for the number of bits, allowing the fields to fit
in a single byte along with cs_change.
If space becomes an issue further optimiation is possible by only using
the constants and packing the values chosen for them.
Reported-by: Trent Piepho <tpiepho(a)gmail.com>
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
include/linux/spi/spi.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 27a882978c15..77b529e418d5 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -576,8 +576,8 @@ struct spi_transfer {
dma_addr_t rx_dma;
unsigned cs_change:1;
- u8 tx_nbits;
- u8 rx_nbits;
+ unsigned tx_nbits:3;
+ unsigned rx_nbits:3;
#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
--
1.8.5.2
From: Al Stone <al.stone(a)linaro.org>
This series of patches starts with Hanjun's patch to create a kernel
config item for CONFIG_ACPI_REDUCED_HARDWARE [0]. Building on that, I
then reviewed all of the code that touched any of several fields in the
FADT that the OSPM is supposed to ignore when ACPI is in Hardware Reduced
mode [1]. Any time there was a use of one of the fields to be ignored,
I evaluated whether or not the code was implementing Hardware Reduced
mode correctly. Similarly, for each the flags in the FADT flags field
that are to be ignored in Hardware Reduced mode, the kernel code was again
scanned for proper usage. The remainder of the patches are to fix all of
the situations I could find where the kernel would not behave correctly
in this ACPI mode.
These seem to work just fine on the RTSM model for ARMv7, both with and
without ACPI enabled, and with and without ACPI_REDUCED_HARDWARE enabled;
similarly for the FVP model for ARMv8. The patches for ACPI on ARM
hardware have been submitted elsewhere but they presume that reduced HW
mode is functioning correctly. In the meantime, there's no way I can think
of to test all possible scenarios so feedback would be greatly appreciated.
[0] List at https://wiki.linaro.org/LEG/Engineering/Kernel/ACPI/AcpiReducedHw#Section_5…
[1] Please see the ACPI Specification v5.0 for details on Hardware Reduced
mode (sections 3.11.1, 4.1, 5.2.9, at a minimum).
Changes for v5:
-- Clarify that if the kernel config option to build ACPI hardware reduced
mode is used, it builds a hardware reduced *only* kernel (i.e., full
legacy ACPI mode will no longer work).
Changes for v4:
-- Given the current state of ACPICA, disable CONFIG_ACPI_REDUCED_HARDWARE
for use on anything other than ARM.
-- Replaced #ifdefs with run-time checking for hardware reduced mode,
whenever possible
Changes for v3:
-- Modified enabling ACPI_REDUCED_HARDWARE in ACPICA when using
kernel config item CONFIG_ACPI_REDUCED_HARDWARE; now consistent
with ACPICA code base where needed
-- Enable X86 for CONFIG_ACPI_REDUCED_HARDWARE
-- Minimize bus master reload patching
-- Remove unneeded patch for dmi_check_system() (was 4/6)
-- Correct the patch for removing unneeded map/unmap of FADT fields
Changes for v2:
-- Remove patch that was outside of reduced HW mode changes
-- Simplify CONFIG_ACPI_REDUCED_HARDWARE in Kconfig
-- Simplify use of CONFIG_ACPI_REDUCED_HARDWARE in #ifdefs
-- Ensure changelogs are present
-- Combine and simplify previous patches 8 & 10
Al Stone (5):
ACPI: introduce CONFIG_ACPI_REDUCED_HARDWARE_ONLY to enforce this ACPI
mode
ACPI: bus master reload not supported in reduced HW mode
ACPI: HW reduced mode does not allow use of the FADT sci_interrupt
field
ACPI: in HW reduced mode, using FADT PM information is not allowed.
ACPI: do not map/unmap memory regions for FADT entries in reduced HW
mode
drivers/acpi/Kconfig | 12 ++++++++++++
drivers/acpi/bus.c | 30 ++++++++++++++++--------------
drivers/acpi/osl.c | 38 +++++++++++++++++++-------------------
drivers/acpi/pci_link.c | 2 ++
drivers/acpi/processor_idle.c | 14 ++++++++++++--
include/acpi/platform/aclinux.h | 6 ++++++
6 files changed, 67 insertions(+), 35 deletions(-)
--
1.8.4.2
When merge lsk into lsk-android, I resolved mm_types.h conflict
as following.
Since just new function definition. I pushed the merge into lsk-android.
Vishal, does the testing will be started automatically?
And then how to check the testing results?
==========
commit 60d29b4f9bf5466c1d6eccac414765b7ac2e8eb4
Merge: 0a1e99e 450cdfa
Author: Alex Shi <alex.shi(a)linaro.org>
Date: Fri Jan 10 23:56:41 2014 +0800
Merge branch 'linux-linaro-lsk' into linux-linaro-lsk-android
Conflicts:
include/linux/mm_types.h
diff --cc include/linux/mm_types.h
index 93ddd4e,10a9a17..c14df44
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@@ -462,14 -465,45 +470,53 @@@ static inline cpumask_t *mm_cpumask(str
return mm->cpu_vm_mask_var;
}
-
+/* Return the name for an anonymous mapping or NULL for a file-backed mapping */
+static inline const char __user *vma_get_anon_name(struct vm_area_struct *vma)
+{
+ if (vma->vm_file)
+ return NULL;
+
+ return vma->shared.anon_name;
+}
+ #if defined(CONFIG_NUMA_BALANCING) || defined(CONFIG_COMPACTION)
+ /*
+ * Memory barriers to keep this state in sync are graciously provided by
+ * the page table locks, outside of which no page table modifications happen.
+ * The barriers below prevent the compiler from re-ordering the instructions
+ * around the memory barriers that are already present in the code.
+ */
+ static inline bool mm_tlb_flush_pending(struct mm_struct *mm)
+ {
+ barrier();
+ return mm->tlb_flush_pending;
+ }
+ static inline void set_tlb_flush_pending(struct mm_struct *mm)
+ {
+ mm->tlb_flush_pending = true;
+
+ /*
+ * Guarantee that the tlb_flush_pending store does not leak into the
+ * critical section updating the page tables
+ */
+ smp_mb__before_spinlock();
+ }
+ /* Clearing is done after a TLB flush, which also provides a barrier. */
+ static inline void clear_tlb_flush_pending(struct mm_struct *mm)
+ {
+ barrier();
+ mm->tlb_flush_pending = false;
+ }
+ #else
+ static inline bool mm_tlb_flush_pending(struct mm_struct *mm)
+ {
+ return false;
+ }
+ static inline void set_tlb_flush_pending(struct mm_struct *mm)
+ {
+ }
+ static inline void clear_tlb_flush_pending(struct mm_struct *mm)
+ {
+ }
+ #endif
#endif /* _LINUX_MM_TYPES_H */
--
Thanks
Alex
Reworked initial Ben's series for big endian support [1].
Dropped patches that are not directly related to kprobes.
Current set of patches is enough to have functional BE kprobes.
All kprobes-tests pass in any LE/BE and ARM/Thumb combination.
Based on v3.13-rc5.
[1] http://www.spinics.net/lists/arm-kernel/msg285210.html
Ben Dooks (4):
ARM: kprobes: fix instruction fetch order with <asm/opcodes.h>
ARM: kprobes-test: use <asm/opcodes.h> for instruction accesses
ARM: kprobes-test: use <asm/opcodes.h> for ARM instruction building
ARM: kprobes-test: use <asm/opcodes.h> for Thumb instruction building
Taras Kondratiuk (1):
ARM: kprobes-test: Workaround GAS .align bug
arch/arm/kernel/kprobes-common.c | 19 +-
arch/arm/kernel/kprobes-test-arm.c | 595 +++++++++++++++++-----------------
arch/arm/kernel/kprobes-test-thumb.c | 447 ++++++++++++-------------
arch/arm/kernel/kprobes-test.c | 14 +-
arch/arm/kernel/kprobes-test.h | 2 +-
arch/arm/kernel/kprobes-thumb.c | 20 +-
arch/arm/kernel/kprobes.c | 9 +-
7 files changed, 558 insertions(+), 548 deletions(-)
--
1.7.9.5
The Power State and Coordination Interface (PSCI) specification defines
SYSTEM_OFF and SYSTEM_RESET functions for system poweroff and reboot.
This patchset adds emulation of PSCI SYSTEM_OFF and SYSTEM_RESET functions
in KVM ARM/ARM64 by forwarding them to user space (QEMU or KVMTOOL) using
KVM_EXIT_SYSTEM_EVENT exit reason.
To try this patch from guest kernel, we will need PSCI-based restart and
poweroff support in the guest kenel for both ARM and ARM64.
Rob Herring has already submitted patches for PSCI-based restart and
poweroff in ARM kernel but these are not merged yet due unstable device
tree bindings of kernel PSCI support. We will be having similar patches
for PSCI-based restart and poweroff in ARM64 kernel.
(Refer http://www.spinics.net/lists/arm-kernel/msg262217.html)
(Refer http://www.spinics.net/lists/devicetree/msg05348.html)
Change Log:
V3:
- Simplify handle_hvc() for both ARM and ARM64
- Minor fix in comments for kvm_psci_call()
V2:
- Replace KVM_EXIT_RESET with KVM_EXIT_SYSTEM_EVENT
- Make kvm_psci_call() return convention to match
KVM ARM return convention
V1:
- Initial revised patch after RFC PATCH.
Anup Patel (2):
KVM: Add KVM_EXIT_SYSTEM_EVENT to user space API header
ARM/ARM64: KVM: Forward PSCI SYSTEM_OFF and SYSTEM_RESET to user
space
Documentation/virtual/kvm/api.txt | 15 ++++++++++++
arch/arm/include/asm/kvm_psci.h | 2 +-
arch/arm/include/uapi/asm/kvm.h | 2 ++
arch/arm/kvm/handle_exit.c | 11 ++++++---
arch/arm/kvm/psci.c | 47 ++++++++++++++++++++++++++++++-------
arch/arm64/include/asm/kvm_psci.h | 2 +-
arch/arm64/include/uapi/asm/kvm.h | 2 ++
arch/arm64/kvm/handle_exit.c | 10 +++++---
include/uapi/linux/kvm.h | 8 +++++++
9 files changed, 83 insertions(+), 16 deletions(-)
--
1.7.9.5
There are some parts of common kernel which would be using routines like
clk_get_rate() on some platforms. Currently these wouldn't be called for SA1100
boards but we need these routines for successful builds of these boards.
So, this patch creates a dummy clk_get_rate() routine which is being used by
cpufreq core. More dummy routines might be added later if there is a need for
that.
Cc: Russell King <linux(a)arm.linux.org.uk>
Cc: Arnd Bergmann <arnd.bergmann(a)linaro.org>
Reported-by: <Olof Johansson> olof(a)lixom.net
Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org>
---
Hi Rafael,
This is the only new part here. 2/2 is still the same. Its compiled for Assabet
board. And the issue reported by Olof is resolved with it.
arch/arm/mach-sa1100/clock.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index 172ebd0..9fa6a99 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -33,6 +33,13 @@ struct clk clk_##_name = { \
static DEFINE_SPINLOCK(clocks_lock);
+/* Dummy clk routine to build generic kernel parts that may be using them */
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return 0;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
static void clk_gpio27_enable(struct clk *clk)
{
/*
--
1.7.12.rc2.18.g61b472e
From: Mark Brown <broonie(a)linaro.org>
The CLCD driver is used on ARM reference models for ARMv8 so add ARM64
to the list of dependencies. The driver also has no build time dependencies
on ARM (stubs are provided for ARM-specific DMA functions in the code) so
make it available with COMPILE_TEST in order to maximise build coverage.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/video/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 4f2e1b35eb38..e6c7fb1a389b 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -312,7 +312,8 @@ config FB_PM2_FIFO_DISCONNECT
config FB_ARMCLCD
tristate "ARM PrimeCell PL110 support"
- depends on FB && ARM && ARM_AMBA
+ depends on ARM || ARM64 || COMPILE_TEST
+ depends on FB && ARM_AMBA
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
--
1.8.5.1
Currently code has an inverted logic: opcode from user memory
is swapped to a proper endianness only in case of read error.
While normally opcode should be swapped only if it was read
correctly from user memory.
Signed-off-by: Ben Dooks <ben.dooks(a)codethink.co.uk>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk(a)linaro.org>
---
arch/arm/kernel/traps.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 7940241..36a844e 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -425,9 +425,10 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
instr2 = __mem_to_opcode_thumb16(instr2);
instr = __opcode_thumb32_compose(instr, instr2);
}
- } else if (get_user(instr, (u32 __user *)pc)) {
+ } else {
+ if (get_user(instr, (u32 __user *)pc))
+ goto die_sig;
instr = __mem_to_opcode_arm(instr);
- goto die_sig;
}
if (call_undef_hook(regs, instr) == 0)
--
1.7.9.5
From: Mark Brown <broonie(a)linaro.org>
Add basic CPU topology support to arm64, based on the existing pre-v8
code and some work done by Mark Hambleton. This patch does not
implement any topology discovery support since that should be based on
information from firmware, it merely implements the scaffolding for
integration of topology support in the architecture.
The goal is to separate the architecture hookup for providing topology
information from the DT parsing in order to ease review and avoid
blocking the architecture code (which will be built on by other work)
with the DT code review by providing something something simple
and basic.
A following patch will implement support for parsing the DT topology
bindings for ARM, similar patches will be needed for ACPI.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
arch/arm64/Kconfig | 24 +++++++++++
arch/arm64/include/asm/topology.h | 39 +++++++++++++++++
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/smp.c | 12 ++++++
arch/arm64/kernel/topology.c | 91 +++++++++++++++++++++++++++++++++++++++
5 files changed, 167 insertions(+)
create mode 100644 arch/arm64/include/asm/topology.h
create mode 100644 arch/arm64/kernel/topology.c
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 249acb9da4e3..a53514cdf39c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -162,6 +162,30 @@ config SMP
If you don't know what to do here, say N.
+config ARM_CPU_TOPOLOGY
+ bool "Support CPU topology definition"
+ depends on SMP
+ default y
+ help
+ Support CPU topology definition, based on configuration
+ provided by the firmware.
+
+config SCHED_MC
+ bool "Multi-core scheduler support"
+ depends on ARM_CPU_TOPOLOGY
+ help
+ Multi-core scheduler support improves the CPU scheduler's decision
+ making when dealing with multi-core CPU chips at a cost of slightly
+ increased overhead in some places. If unsure say N here.
+
+config SCHED_SMT
+ bool "SMT scheduler support"
+ depends on ARM_CPU_TOPOLOGY
+ help
+ Improves the CPU scheduler's decision making when dealing with
+ MultiThreading at a cost of slightly increased overhead in some
+ places. If unsure say N here.
+
config NR_CPUS
int "Maximum number of CPUs (2-32)"
range 2 32
diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h
new file mode 100644
index 000000000000..58b8b84adcd2
--- /dev/null
+++ b/arch/arm64/include/asm/topology.h
@@ -0,0 +1,39 @@
+#ifndef _ASM_ARM_TOPOLOGY_H
+#define _ASM_ARM_TOPOLOGY_H
+
+#ifdef CONFIG_ARM_CPU_TOPOLOGY
+
+#include <linux/cpumask.h>
+
+struct cputopo_arm {
+ int thread_id;
+ int core_id;
+ int socket_id;
+ cpumask_t thread_sibling;
+ cpumask_t core_sibling;
+};
+
+extern struct cputopo_arm cpu_topology[NR_CPUS];
+
+#define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id)
+#define topology_core_id(cpu) (cpu_topology[cpu].core_id)
+#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling)
+#define topology_thread_cpumask(cpu) (&cpu_topology[cpu].thread_sibling)
+
+#define mc_capable() (cpu_topology[0].socket_id != -1)
+#define smt_capable() (cpu_topology[0].thread_id != -1)
+
+void init_cpu_topology(void);
+void store_cpu_topology(unsigned int cpuid);
+const struct cpumask *cpu_coregroup_mask(int cpu);
+
+#else
+
+static inline void init_cpu_topology(void) { }
+static inline void store_cpu_topology(unsigned int cpuid) { }
+
+#endif
+
+#include <asm-generic/topology.h>
+
+#endif /* _ASM_ARM_TOPOLOGY_H */
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 1cd339d5037b..b2fe6ba97080 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -19,6 +19,7 @@ arm64-obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o
arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o
arm64-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
+arm64-obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o
obj-y += $(arm64-obj-y) vdso/
obj-m += $(arm64-obj-m)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 1b7617ab499b..40e20efc13e6 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -114,6 +114,11 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
return ret;
}
+static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
+{
+ store_cpu_topology(cpuid);
+}
+
/*
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
@@ -152,6 +157,8 @@ asmlinkage void secondary_start_kernel(void)
*/
notify_cpu_starting(cpu);
+ smp_store_cpu_info(cpu);
+
/*
* OK, now it's safe to let the boot CPU continue. Wait for
* the CPU migration code to notice that the CPU is online
@@ -391,6 +398,11 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
int err;
unsigned int cpu, ncores = num_possible_cpus();
+ init_cpu_topology();
+
+ smp_store_cpu_info(smp_processor_id());
+
+
/*
* are we trying to boot more cores than exist?
*/
diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
new file mode 100644
index 000000000000..20eef01a4707
--- /dev/null
+++ b/arch/arm64/kernel/topology.c
@@ -0,0 +1,91 @@
+/*
+ * arch/arm64/kernel/topology.c
+ *
+ * Copyright (C) 2011,2013 Linaro Limited.
+ *
+ * Based on the arm32 version written by Vincent Guittot in turn based on
+ * arch/sh/kernel/topology.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/cpu.h>
+#include <linux/cpumask.h>
+#include <linux/init.h>
+#include <linux/percpu.h>
+#include <linux/node.h>
+#include <linux/nodemask.h>
+#include <linux/sched.h>
+
+#include <asm/topology.h>
+
+/*
+ * cpu topology table
+ */
+struct cputopo_arm cpu_topology[NR_CPUS];
+EXPORT_SYMBOL_GPL(cpu_topology);
+
+const struct cpumask *cpu_coregroup_mask(int cpu)
+{
+ return &cpu_topology[cpu].core_sibling;
+}
+
+static void update_siblings_masks(unsigned int cpuid)
+{
+ struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
+ int cpu;
+
+ /* update core and thread sibling masks */
+ for_each_possible_cpu(cpu) {
+ cpu_topo = &cpu_topology[cpu];
+
+ if (cpuid_topo->socket_id != cpu_topo->socket_id)
+ continue;
+
+ cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
+ if (cpu != cpuid)
+ cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
+
+ if (cpuid_topo->core_id != cpu_topo->core_id)
+ continue;
+
+ cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
+ if (cpu != cpuid)
+ cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
+ }
+ smp_wmb();
+}
+
+void store_cpu_topology(unsigned int cpuid)
+{
+ struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
+
+ /* DT should have been parsed by the time we get here */
+ if (cpuid_topo->core_id == -1)
+ pr_info("CPU%u: No topology information configured\n", cpuid);
+ else
+ update_siblings_masks(cpuid);
+}
+
+/*
+ * init_cpu_topology is called at boot when only one cpu is running
+ * which prevent simultaneous write access to cpu_topology array
+ */
+void __init init_cpu_topology(void)
+{
+ unsigned int cpu;
+
+ /* init core mask and power*/
+ for_each_possible_cpu(cpu) {
+ struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
+
+ cpu_topo->thread_id = -1;
+ cpu_topo->core_id = -1;
+ cpu_topo->socket_id = -1;
+ cpumask_clear(&cpu_topo->core_sibling);
+ cpumask_clear(&cpu_topo->thread_sibling);
+ }
+ smp_wmb();
+}
--
1.8.5.2
From: Mark Brown <broonie(a)linaro.org>
Add basic CPU topology support to arm64, based on the existing pre-v8
code and some work done by Mark Hambleton. This patch does not
implement any topology discovery support since that should be based on
information from firmware, it merely implements the scaffolding for
integration of topology support in the architecture.
The goal is to separate the architecture hookup for providing topology
information from the DT parsing in order to ease review and avoid
blocking the architecture code (which will be built on by other work)
with the DT code review by providing something something simple
and basic.
A following patch will implement support for parsing the DT topology
bindings for ARM, similar patches will be needed for ACPI.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
arch/arm64/Kconfig | 24 ++++++++++
arch/arm64/include/asm/topology.h | 39 +++++++++++++++++
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/smp.c | 12 +++++
arch/arm64/kernel/topology.c | 92 +++++++++++++++++++++++++++++++++++++++
5 files changed, 168 insertions(+)
create mode 100644 arch/arm64/include/asm/topology.h
create mode 100644 arch/arm64/kernel/topology.c
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 249acb9da4e3..a53514cdf39c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -162,6 +162,30 @@ config SMP
If you don't know what to do here, say N.
+config ARM_CPU_TOPOLOGY
+ bool "Support CPU topology definition"
+ depends on SMP
+ default y
+ help
+ Support CPU topology definition, based on configuration
+ provided by the firmware.
+
+config SCHED_MC
+ bool "Multi-core scheduler support"
+ depends on ARM_CPU_TOPOLOGY
+ help
+ Multi-core scheduler support improves the CPU scheduler's decision
+ making when dealing with multi-core CPU chips at a cost of slightly
+ increased overhead in some places. If unsure say N here.
+
+config SCHED_SMT
+ bool "SMT scheduler support"
+ depends on ARM_CPU_TOPOLOGY
+ help
+ Improves the CPU scheduler's decision making when dealing with
+ MultiThreading at a cost of slightly increased overhead in some
+ places. If unsure say N here.
+
config NR_CPUS
int "Maximum number of CPUs (2-32)"
range 2 32
diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h
new file mode 100644
index 000000000000..58b8b84adcd2
--- /dev/null
+++ b/arch/arm64/include/asm/topology.h
@@ -0,0 +1,39 @@
+#ifndef _ASM_ARM_TOPOLOGY_H
+#define _ASM_ARM_TOPOLOGY_H
+
+#ifdef CONFIG_ARM_CPU_TOPOLOGY
+
+#include <linux/cpumask.h>
+
+struct cputopo_arm {
+ int thread_id;
+ int core_id;
+ int socket_id;
+ cpumask_t thread_sibling;
+ cpumask_t core_sibling;
+};
+
+extern struct cputopo_arm cpu_topology[NR_CPUS];
+
+#define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id)
+#define topology_core_id(cpu) (cpu_topology[cpu].core_id)
+#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling)
+#define topology_thread_cpumask(cpu) (&cpu_topology[cpu].thread_sibling)
+
+#define mc_capable() (cpu_topology[0].socket_id != -1)
+#define smt_capable() (cpu_topology[0].thread_id != -1)
+
+void init_cpu_topology(void);
+void store_cpu_topology(unsigned int cpuid);
+const struct cpumask *cpu_coregroup_mask(int cpu);
+
+#else
+
+static inline void init_cpu_topology(void) { }
+static inline void store_cpu_topology(unsigned int cpuid) { }
+
+#endif
+
+#include <asm-generic/topology.h>
+
+#endif /* _ASM_ARM_TOPOLOGY_H */
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 1cd339d5037b..b2fe6ba97080 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -19,6 +19,7 @@ arm64-obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o
arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o
arm64-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
+arm64-obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o
obj-y += $(arm64-obj-y) vdso/
obj-m += $(arm64-obj-m)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 1b7617ab499b..40e20efc13e6 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -114,6 +114,11 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
return ret;
}
+static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
+{
+ store_cpu_topology(cpuid);
+}
+
/*
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
@@ -152,6 +157,8 @@ asmlinkage void secondary_start_kernel(void)
*/
notify_cpu_starting(cpu);
+ smp_store_cpu_info(cpu);
+
/*
* OK, now it's safe to let the boot CPU continue. Wait for
* the CPU migration code to notice that the CPU is online
@@ -391,6 +398,11 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
int err;
unsigned int cpu, ncores = num_possible_cpus();
+ init_cpu_topology();
+
+ smp_store_cpu_info(smp_processor_id());
+
+
/*
* are we trying to boot more cores than exist?
*/
diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
new file mode 100644
index 000000000000..853544f30a8b
--- /dev/null
+++ b/arch/arm64/kernel/topology.c
@@ -0,0 +1,92 @@
+/*
+ * arch/arm64/kernel/topology.c
+ *
+ * Copyright (C) 2011,2013 Linaro Limited.
+ *
+ * Based on the arm32 version written by Vincent Guittot in turn based on
+ * arch/sh/kernel/topology.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/cpu.h>
+#include <linux/cpumask.h>
+#include <linux/init.h>
+#include <linux/percpu.h>
+#include <linux/node.h>
+#include <linux/nodemask.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+
+#include <asm/topology.h>
+
+/*
+ * cpu topology table
+ */
+struct cputopo_arm cpu_topology[NR_CPUS];
+EXPORT_SYMBOL_GPL(cpu_topology);
+
+const struct cpumask *cpu_coregroup_mask(int cpu)
+{
+ return &cpu_topology[cpu].core_sibling;
+}
+
+static void update_siblings_masks(unsigned int cpuid)
+{
+ struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
+ int cpu;
+
+ /* update core and thread sibling masks */
+ for_each_possible_cpu(cpu) {
+ cpu_topo = &cpu_topology[cpu];
+
+ if (cpuid_topo->socket_id != cpu_topo->socket_id)
+ continue;
+
+ cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
+ if (cpu != cpuid)
+ cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
+
+ if (cpuid_topo->core_id != cpu_topo->core_id)
+ continue;
+
+ cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
+ if (cpu != cpuid)
+ cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
+ }
+ smp_wmb();
+}
+
+void store_cpu_topology(unsigned int cpuid)
+{
+ struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
+
+ /* DT should have been parsed by the time we get here */
+ if (cpuid_topo->core_id == -1)
+ pr_info("CPU%u: No topology information configured\n", cpuid);
+ else
+ update_siblings_masks(cpuid);
+}
+
+/*
+ * init_cpu_topology is called at boot when only one cpu is running
+ * which prevent simultaneous write access to cpu_topology array
+ */
+void __init init_cpu_topology(void)
+{
+ unsigned int cpu;
+
+ /* init core mask and power*/
+ for_each_possible_cpu(cpu) {
+ struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
+
+ cpu_topo->thread_id = -1;
+ cpu_topo->core_id = -1;
+ cpu_topo->socket_id = -1;
+ cpumask_clear(&cpu_topo->core_sibling);
+ cpumask_clear(&cpu_topo->thread_sibling);
+ }
+ smp_wmb();
+}
--
1.8.5.2
This patch enables ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR as default configs
to EP93XX platforms from Cirrus.
Introduction of PHYS_VIRT config as default config enables phy-to-virt and
virt-to-phy translation functions at boot and module loading time, and enforce
dynamic reallocation of memory. PHYS_VIRT config is mutually exclusive to
XIP_KERNEL, XIP_KERNEL is used in systems with NOR flash devices.
AUTO_ZRELADDR config enables auto calculation of the decompressed kernel image
address. AUTO_ZRELADDR config is mutually exclusive to ZBOOT_ROM, and also
assumes zImage to be loaded in the first 128MiB from start of memory.
CFT::Call For Testing
Requesting maintainers of EP93XX platform to evaluate the changes on the
board and comment, as I dont have the board for testing and also requesting
an ACK.
Signed-off-by: panchaxari <panchaxari.prasannamurthy(a)linaro.org>
Cc: Hartley Sweeten <hsweeten(a)visionengravers.com>
Cc: Ryan Mallon <rmallon(a)gmail.com>
Cc: Linus Walleij <linus.walleij(a)linaro.org>
Cc: Russell King <linux(a)arm.linux.org.uk>
Cc: linux-arm-kernel(a)lists.infradead.org
Cc: linux-kernel(a)vger.kernel.org
---
Below lkml link is a quoting by Russell which explains more on concept of
PHYS_VIRT and ZRELADDR
-------------------------------------------------
https://lkml.org/lkml/2011/10/14/434
-------------------------------------------------
---
arch/arm/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3501362..077ef9d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -420,10 +420,12 @@ config ARCH_EBSA110
config ARCH_EP93XX
bool "EP93xx-based"
select ARCH_HAS_HOLES_MEMORYMODEL
+ select ARCH_PATCH_PHYS_VIRT
select ARCH_REQUIRE_GPIOLIB
select ARCH_USES_GETTIMEOFFSET
select ARM_AMBA
select ARM_VIC
+ select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select CPU_ARM920T
select NEED_MACH_MEMORY_H
--
1.7.10.4
This patch enables AUTO_ZRELADDR as default config to Renasas R-Mobile and
SH-Mobile platforms.
AUTO_ZRELADDR config enables auto calculation of the decompressed kernel image
address. AUTO_ZRELADDR config is mutually exclusive to ZBOOT_ROM, and also
assumes zImage to be loaded in the first 128MiB from start of memory.
CFT::Call For Testing
Requesting maintainers of R-Mobile and SH-Mobile platforms to evaluate the
changes on the board and comment, as I dont have the board for testing, and
also requesting an ACK.
Signed-off-by: panchaxari <panchaxari.prasannamurthy(a)linaro.org>
Cc: Laurent Pinchart <laurent.pinchart+renesas(a)ideasonboard.com>
Cc: Simon Horman <horms(a)verge.net.au>
Cc: Magnus Damm <damm(a)opensource.se>
Cc: Russell King <linux(a)arm.linux.org.uk>
Cc: Linus Walleij <linus.walleij(a)linaro.org>
Cc: linux-sh(a)vger.kernel.org
Cc: linux-arm-kernel(a)lists.infradead.org
Cc: linux-kernel(a)vger.kernel.org
---
Below lkml link is a quoting by Russell which clears the concept of PHYS_VIRT
and ZRELADDR
---------------------------------------------------
https://lkml.org/lkml/2011/10/14/434
-------------------------------------------------
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8e668e2..077ef9d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -674,6 +674,7 @@ config ARCH_MSM
config ARCH_SHMOBILE
bool "Renesas SH-Mobile / R-Mobile"
select ARM_PATCH_PHYS_VIRT
+ select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU if SMP
--
1.7.10.4
This patch enables ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR as default configs
to versatile platform.
Introduction of PHYS_VIRT config as default enables phy-to-virt and virt-to-phy
translation functions at boot and module loading time, and enforce dynamic
reallocation of memory. PHYS_VIRT config is mutually exclusive to XIP_KERNEL,
XIP_KERNEL is used in systems with NOR flash devices.
AUTO_ZRELADDR config enables auto calculation of the decompressed kernel image
address. AUTO_ZRELADDR config is mutually exclusive to ZBOOT_ROM, and also
assumes zImage to be loaded in the first 128MiB from start of memory.
CFT::Call For Testing
Requesting maintainers of Versatile platform to evaluate the changes on the
board and comment, as I dont have the board for testing and also requesting
an ACK.
Signed-off-by: panchaxari <panchaxari.prasannamurthy(a)linaro.org>
Cc: Jon Medhurst (Tixy) <tixy(a)linaro.org>
Cc: Will Deacon <will.deacon(a)arm.com>
Cc: Pawel Moll <Pawel.Moll(a)arm.com>
Cc: Russell King <linux(a)arm.linux.org.uk>
Cc: Linus Walleij <linus.walleij(a)linaro.org>
Cc: Rob Herring <robh(a)kernel.org>
Cc: Arnd Bergmann <arnd(a)arndb.de>
Cc: Nicolas Pitre <nicolas.pitre(a)linaro.org>
Cc: Peter Maydell <peter.maydell(a)linaro.org>
Cc: Santosh Shilimkar <santosh.shilimkar(a)ti.com>
Cc: linux-arm-kernel(a)lists.infradead.org
Cc: linux-kernel(a)vger.kernel.org
---
arch/arm/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7f316c0..077ef9d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -348,8 +348,10 @@ config ARCH_VERSATILE
bool "ARM Ltd. Versatile family"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
+ select ARM_PATCH_PHYS_VIRT
select ARM_TIMER_SP804
select ARM_VIC
+ select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
select HAVE_MACH_CLKDEV
--
1.7.10.4
This patch enables AUTO_ZRELADDR as default config to Realview platform.
AUTO_ZRELADDR config enables auto calculation of the decompressed kernel image
address. AUTO_ZRELADDR config is mutually exclusive to ZBOOT_ROM, and also
assumes zImage to be loaded in the first 128MiB from start of memory.
CFT::Call For Testing
Requesting maintainers of Realview platforms to evaluate the changes on the
board and comment, as I dont have the board for testing, and also requesting
an ACK.
Signed-off-by: panchaxari <panchaxari.prasannamurthy(a)linaro.org>
Cc: Will Deacon <will.deacon(a)arm.com>
Cc: Pawel Moll <Pawel.Moll(a)arm.com>
Cc: Russell King <linux(a)arm.linux.org.uk>
Cc: Rob Herring <rob.herring(a)calxeda.com>
Cc: Viresh Kumar <viresh.linux(a)gmail.com>
Cc: Shawn Guo <shawn.guo(a)linaro.org>
Cc: Olof Johansson <olof(a)lixom.net>
Cc: Linus Walleij <linus.walleij(a)linaro.org>
Cc: linux-arm-kernel(a)lists.infradead.org
Cc: linux-kernel(a)vger.kernel.org
---
Below lkml link is a quoting by Russell, which explains more on concept of
PHYS_VIRT and ZRELADDR
-------------------------------------------------
https://lkml.org/lkml/2011/10/14/434
-------------------------------------------------
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3dfc3b8..077ef9d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -332,6 +332,7 @@ config ARCH_REALVIEW
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_TIMER_SP804
+ select AUTO_ZRELADDR
select COMMON_CLK
select COMMON_CLK_VERSATILE
select GENERIC_CLOCKEVENTS
--
1.7.10.4
From: Mark Brown <broonie(a)linaro.org>
arm64 is unlikely to have a VGA console and does not export screen_info
causing build failures if the driver is build, for example in all*config.
Add a dependency on !ARM64 to prevent this.
This list is getting quite long, it may be easier to depend on a symbol
which architectures that do support the driver can select.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/video/console/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index 846caab75a46..c39d6c42c3ef 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -8,7 +8,8 @@ config VGA_CONSOLE
bool "VGA text console" if EXPERT || !X86
depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && \
!SUPERH && !BLACKFIN && !AVR32 && !MN10300 && !CRIS && \
- (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER)
+ (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER) \
+ && !ARM64
default y
help
Saying Y here will allow you to use Linux in text mode through a
--
1.8.5.1
This is the 5th version of the previously named "packing small tasks" patchset.
"small" has been removed because the patchset doesn't only target small tasks
anymore.
This patchset takes advantage of the new per-task load tracking that is
available in the scheduler to pack the tasks in a minimum number of
CPU/Cluster/Core. The packing mechanism takes into account the power gating
topology of the CPUs to minimize the number of power domains that need to be
powered on simultaneously.
Most of the code has been put in fair.c file but it can be easily moved to
another location. This patchset tries to solve one part of the larger
energy-efficient scheduling problem and it should be merged with other
proposals that solve other parts like the power-scheduler made by Morten.
The packing is done in 3 steps:
The 1st step creates a topology of the power gating of the CPUs that will help
the scheduler to choose which CPUs will handle the current activity. This
topology is described thanks to a new flag SD_SHARE_POWERDOMAIN that indicates
whether the groups of CPUs of a scheduling domain share their power state. In
order to be efficient, a group of CPUs that share their power state will be
used (or not) simultaneously. By default, this flag is set in all sched_domain
in order to keep the current behavior of the scheduler unchanged.
The 2nd step evaluates the current activity of the system and creates a list of
CPUs for handling it. The average activity level of CPUs is set to 80% but is
configurable by changing the sched_packing_level knob. The activity level and
the involvement of a CPU in the packing effort is evaluated during the periodic
load balance similarly to cpu_power. Then, the default load balancing behavior
is used to balance tasks between this reduced list of CPUs.
As the current activity doesn't take into account a new task, an unused CPUs
can also be selected during the 1st wake up and until the activity is updated.
The 3rd step occurs when the scheduler selects a target CPU for a newly
awakened task. The current wakeup latency of idle CPUs is used to select the
one with the most shallow c-state. In some situation where the task load is
small compared to the latency, the newly awakened task can even stay on the
current CPU. Since the load is the main metric for the scheduler, the wakeup
latency is transposed into an equivalent load so that the current mechanism of
the load balance that is based on load comparison, is kept unchanged. A shared
structure has been created to exchange information between scheduler and
cpuidle (or any other framework that needs to share information). The wakeup
latency is the only field for the moment but it could be extended with
additional useful information like the target load or the expected sleep
duration of a CPU.
The patchset is based on v3.12-rc2 and is available in the git tree:
git://git.linaro.org/people/vingu/kernel.git
branch sched-packing-small-tasks-v5
If you want to test the patchset, you must enable CONFIG_PACKING_TASKS first.
Then, you also need to create a arch_sd_local_flags that will clear the
SD_SHARE_POWERDOMAIN flag at the appropriate level for your architecture. This
has already be done for ARM architecture in the patchset.
The figures below show the latency of cyclictest with and without the patchset
on an ARM platform with a v3.11. The test has been runned 10 times on each kernel.
#cyclictest -t 3 -q -e 1000000 -l 3000 -i 1800 -d 100
average (us) stdev
v3.11 381,5 79,86
v3.11 + patches 173,83 13,62
Change since V4:
- v4 posting:https://lkml.org/lkml/2013/4/25/396
- Keep only the aggressive packing mode.
- Add a finer grain power domain description mechanism that includes
DT description
- Add a structure to share information with other framework
- Use current wakeup latency of an idle CPU when selecting the target idle CPU
- All the task packing mechanism can be disabled with a single config option
Change since V3:
- v3 posting: https://lkml.org/lkml/2013/3/22/183
- Take into account comments on previous version.
- Add an aggressive packing mode and a knob to select between the various mode
Change since V2:
- v2 posting: https://lkml.org/lkml/2012/12/12/164
- Migrate only a task that wakes up
- Change the light tasks threshold to 20%
- Change the loaded CPU threshold to not pull tasks if the current number of
running tasks is null but the load average is already greater than 50%
- Fix the algorithm for selecting the buddy CPU.
Change since V1:
-v1 posting: https://lkml.org/lkml/2012/10/7/19
Patch 2/6
- Change the flag name which was not clear. The new name is
SD_SHARE_POWERDOMAIN.
- Create an architecture dependent function to tune the sched_domain flags
Patch 3/6
- Fix issues in the algorithm that looks for the best buddy CPU
- Use pr_debug instead of pr_info
- Fix for uniprocessor
Patch 4/6
- Remove the use of usage_avg_sum which has not been merged
Patch 5/6
- Change the way the coherency of runnable_avg_sum and runnable_avg_period is
ensured
Patch 6/6
- Use the arch dependent function to set/clear SD_SHARE_POWERDOMAIN for ARM
platform
Vincent Guittot (14):
sched: add a new arch_sd_local_flags for sched_domain init
ARM: sched: clear SD_SHARE_POWERDOMAIN
sched: define pack buddy CPUs
sched: do load balance only with packing cpus
sched: add a packing level knob
sched: create a new field with available capacity
sched: get CPU's activity statistic
sched: move load idx selection in find_idlest_group
sched: update the packing cpu list
sched: init this_load to max in find_idlest_group
sched: add a SCHED_PACKING_TASKS config
sched: create a statistic structure
sched: differantiate idle cpu
cpuidle: set the current wake up latency
arch/arm/include/asm/topology.h | 4 +
arch/arm/kernel/topology.c | 50 ++++-
arch/ia64/include/asm/topology.h | 3 +-
arch/tile/include/asm/topology.h | 3 +-
drivers/cpuidle/cpuidle.c | 11 ++
include/linux/sched.h | 13 +-
include/linux/sched/sysctl.h | 9 +
include/linux/topology.h | 11 +-
init/Kconfig | 11 ++
kernel/sched/core.c | 11 +-
kernel/sched/fair.c | 395 ++++++++++++++++++++++++++++++++++++--
kernel/sched/sched.h | 8 +-
kernel/sysctl.c | 17 ++
13 files changed, 521 insertions(+), 25 deletions(-)
--
1.7.9.5
From: Mark Brown <broonie(a)linaro.org>
Commit bfd8303af0c46 (drm: Kill DRM_HZ) removed the definition of DRM_HZ
but did not remove its use in the Exynos DRM driver causing it to fail to
build. Fix that.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 267aca91b70d..bdfe31fb731b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -347,7 +347,7 @@ static void fimd_wait_for_vblank(struct device *dev)
*/
if (!wait_event_timeout(ctx->wait_vsync_queue,
!atomic_read(&ctx->wait_vsync_event),
- DRM_HZ/20))
+ HZ / 20))
DRM_DEBUG_KMS("vblank wait timed out.\n");
}
--
1.8.5.2