Arm64 supports 32-bit mode(AArch32) and 64-bit mode(AArch64).
To enable audit on arm64, we want to use lib/audit.c and re-work it
to support compat system calls as well without copying it under
arch sub-directory.
So this patch is mandatory for my "system call audit support for arm64"
patch. Please review it as well for better understandings.
This code was tested on armv8 fast model with 64-bit and 32-bit userland
by using modified audit-test-code.
Changes v1 -> v2:
* Specify AUDIT_CLASS_XYZ_32 instead of AUDIT_CLASS_XYZ when registering
compat syscalls (bug fix)
AKASHI Takahiro (1):
audit: Add generic compat syscall support
include/linux/audit.h | 9 +++++++++
lib/Makefile | 3 +++
lib/audit.c | 17 +++++++++++++++++
lib/compat_audit.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 80 insertions(+)
create mode 100644 lib/compat_audit.c
--
1.7.9.5
Currently vexpress big LITTLE driver selects ARM_BIG_LITTLE_CPUFREQ and so if
CONFIG_BIG_LITTLE isn't enabled and CONFIG_ARM_VEXPRESS_SPC_CPUFREQ is enabled
we get below warnings while compiling:
warning: (ARM_VEXPRESS_SPC_CPUFREQ) selects ARM_BIG_LITTLE_CPUFREQ which has
unmet direct dependencies (ARCH_HAS_CPUFREQ && CPU_FREQ && (ARM || ARM64) && ARM
&& BIG_LITTLE && ARM_CPU_TOPOLOGY && HAVE_CLK)
To fix this make ARM_VEXPRESS_SPC_CPUFREQ dependent on ARM_BIG_LITTLE_CPUFREQ
instead of selecting it.
This also moves entry for ARM_VEXPRESS_SPC_CPUFREQ along with other big LITTLE
config entries.
Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org>
---
Hi Rafael,
Both of these are fixes, please see if they can make it to 3.14 only.
Thanks.
drivers/cpufreq/Kconfig.arm | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 3129749..9fb6270 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -2,6 +2,7 @@
# ARM CPU Frequency scaling drivers
#
+# big LITTLE core layer and glue drivers
config ARM_BIG_LITTLE_CPUFREQ
tristate "Generic ARM big LITTLE CPUfreq driver"
depends on ARM && BIG_LITTLE && ARM_CPU_TOPOLOGY && HAVE_CLK
@@ -16,6 +17,14 @@ config ARM_DT_BL_CPUFREQ
This enables probing via DT for Generic CPUfreq driver for ARM
big.LITTLE platform. This gets frequency tables from DT.
+config ARM_VEXPRESS_SPC_CPUFREQ
+ tristate "Versatile Express SPC based CPUfreq driver"
+ depends on ARM_BIG_LITTLE_CPUFREQ && ARCH_VEXPRESS_SPC
+ help
+ This add the CPUfreq driver support for Versatile Express
+ big.LITTLE platforms using SPC for power management.
+
+
config ARM_EXYNOS_CPUFREQ
bool
@@ -241,11 +250,3 @@ config ARM_TEGRA_CPUFREQ
default y
help
This adds the CPUFreq driver support for TEGRA SOCs.
-
-config ARM_VEXPRESS_SPC_CPUFREQ
- tristate "Versatile Express SPC based CPUfreq driver"
- select ARM_BIG_LITTLE_CPUFREQ
- depends on ARCH_VEXPRESS_SPC
- help
- This add the CPUfreq driver support for Versatile Express
- big.LITTLE platforms using SPC for power management.
--
1.7.12.rc2.18.g61b472e
Hi,
This patch adds support for PCI to AArch64. It is based on my v6 patch
that adds support for creating generic host bridge structure from
device tree. With that in place, I was able to boot a platform that
has PCIe host bridge support and use a PCIe network card.
Changes from v5:
- Removed pcibios_fixup_bridge_ranges() as the week default version is fine.
- Removed the ALIGN() call in pcibios_align_resource()
- Stopped exporting pcibios_align_resource()
Changes from v4:
- Fixed the pci_domain_nr() implementation for arm64. Now we use
find_pci_host_bride() to find the host bridge before we retrieve
the domain number.
Changes from v3:
- Added Acks accumulated so far ;)
- Still carrying Catalin's patch for moving the PCI_IO_BASE until it
lands in linux-next or mainline, in order to ease applying the series
Changes from v2:
- Implement an arch specific version of pci_register_io_range() and
pci_address_to_pio().
- Return 1 from pci_proc_domain().
Changes from v1:
- Added Catalin's patch for moving the PCI_IO_BASE location and extend
its size to 16MB
- Integrated Arnd's version of pci_ioremap_io that uses a bitmap for
keeping track of assigned IO space and returns an io_offset. At the
moment the code is added in arch/arm64 but it can be moved in drivers/pci.
- Added a fix for the generic ioport_map() function when !CONFIG_GENERIC_IOMAP
as suggested by Arnd.
v5 thread here: https://lkml.org/lkml/2014/3/4/307
v4 thread here: https://lkml.org/lkml/2014/3/3/298
v3 thread here: https://lkml.org/lkml/2014/2/28/211
v2 thread here: https://lkml.org/lkml/2014/2/27/255
v1 thread here: https://lkml.org/lkml/2014/2/3/389
The API used is different from the one used by ARM architecture. There is
no pci_common_init_dev() function and no hw_pci structure, as that is no
longer needed. Once the last signature is added to the legal agreement, I
will post the host bridge driver code that I am using. Meanwhile, here
is an example of what the probe function looks like, posted as an example:
static int myhostbridge_probe(struct platform_device *pdev)
{
int err;
struct device_node *dev;
struct pci_host_bridge *bridge;
struct myhostbridge_port *pp;
resource_size_t lastbus;
dev = pdev->dev.of_node;
if (!of_device_is_available(dev)) {
pr_warn("%s: disabled\n", dev->full_name);
return -ENODEV;
}
pp = kzalloc(sizeof(struct myhostbridge_port), GFP_KERNEL);
if (!pp)
return -ENOMEM;
bridge = of_create_pci_host_bridge(&pdev->dev, &myhostbridge_ops, pp);
if (IS_ERR(bridge)) {
err = PTR_ERR(bridge);
goto bridge_create_fail;
}
err = myhostbridge_setup(bridge->bus);
if (err)
goto bridge_setup_fail;
/* We always enable PCI domains and we keep domain 0 backward
* compatible in /proc for video cards
*/
pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
lastbus = pci_scan_child_bus(bridge->bus);
pci_bus_update_busn_res_end(bridge->bus, lastbus);
pci_assign_unassigned_bus_resources(bridge->bus);
pci_bus_add_devices(bridge->bus);
return 0;
bridge_setup_fail:
put_device(&bridge->dev);
device_unregister(&bridge->dev);
bridge_create_fail:
kfree(pp);
return err;
}
Best regards,
Liviu
Catalin Marinas (1):
arm64: Extend the PCI I/O space to 16MB
Liviu Dudau (2):
Fix ioport_map() for !CONFIG_GENERIC_IOMAP cases.
arm64: Add architecture support for PCI
Documentation/arm64/memory.txt | 16 ++--
arch/arm64/Kconfig | 19 ++++-
arch/arm64/include/asm/Kbuild | 1 +
arch/arm64/include/asm/io.h | 5 +-
arch/arm64/include/asm/pci.h | 49 ++++++++++++
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/pci.c | 173 +++++++++++++++++++++++++++++++++++++++++
include/asm-generic/io.h | 2 +-
8 files changed, 256 insertions(+), 10 deletions(-)
create mode 100644 arch/arm64/include/asm/pci.h
create mode 100644 arch/arm64/kernel/pci.c
--
1.9.0
Hello,
We will be holding a one-day, ARM kernel mini-summit at ELC this year in
San Jose[1]. The mini-summit will be Monday, April 28th, and ELC starts
on Tuesday.
The ARM summit brings together maintainers and developers in the ARM
community face to face to discuss current work and to plan for what is
coming next. To keep the group small and encourage open discussion the
event is invite-only.
To propose a discussion topic and/or request an invitation:
1) subscribe yourself to arm-summit-discuss(a)lists.infradead.org:
http://lists.infradead.org/mailman/listinfo/arm-summit-discuss
2) send your invite request and/or topic proposal to
arm-summit-discuss(a)lists.infradead.org with a subject prefix of
"[ARM ATTEND]". Also, please Cc the main linux-arm-kernel list.
All topics and invitation requests will be reviewed by the program
committee and decisions will be made by the end of March, so please get
your requests/topics in soon.
ARM mini-summit Program Committee,
Arnd Bergmann
Magnus Damm
Kevin Hilman
Simon Horman
Olof Johansson
Grant Likely
[1] http://events.linuxfoundation.org/events/embedded-linux-conference
Add AARCH64 specific support. This includes the following:
- AARCH64 perf registers definition and hooks,
- compat mode registers use, i.e. profiling a 32-bit binary on
a 64-bit system,
- unwinding using the dwarf information from the .debug_frame
section of the ELF binary,
- unwinding using the frame pointer information; in 64-bit and
compat modes.
Notes:
- the tools/perf change is submitted separately on LKML,
- support for unwinding using the dwarf information in compat
mode requires some changes to the libunwind code. Those changes
have been submitted on the libunwind ML and are in discussion.
Tested on ARMv7, ARMv8 and x86_64 platforms. The compat mode has been
tested on ARMv8 using statically built 32-bit binaries.
Jean Pihet (3):
ARM64: perf: add support for perf registers API
ARM64: perf: add support for frame pointer unwinding in compat mode
ARM64: perf: support dwarf unwinding in compat mode
arch/arm64/Kconfig | 2 +
arch/arm64/include/asm/compat.h | 2 +-
arch/arm64/include/asm/ptrace.h | 3 +-
arch/arm64/include/uapi/asm/Kbuild | 1 +
arch/arm64/include/uapi/asm/perf_regs.h | 40 ++++++++++++++++++
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/perf_event.c | 75 +++++++++++++++++++++++++++++----
arch/arm64/kernel/perf_regs.c | 44 +++++++++++++++++++
8 files changed, 158 insertions(+), 10 deletions(-)
create mode 100644 arch/arm64/include/uapi/asm/perf_regs.h
create mode 100644 arch/arm64/kernel/perf_regs.c
--
1.7.11.7
From: Mark Brown <broonie(a)linaro.org>
regmap should handle any byte ordering issues required, it is looking for
a byte stream from the bus, so don't set 16 bits per word. This is likely
to have tested out OK due to use of an unmerged SPI controller driver.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
sound/soc/codecs/tlv320aic23-spi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/sound/soc/codecs/tlv320aic23-spi.c b/sound/soc/codecs/tlv320aic23-spi.c
index 585aea436c6a..3b387e41d75d 100644
--- a/sound/soc/codecs/tlv320aic23-spi.c
+++ b/sound/soc/codecs/tlv320aic23-spi.c
@@ -25,7 +25,6 @@ static int aic23_spi_probe(struct spi_device *spi)
dev_dbg(&spi->dev, "probing tlv320aic23 spi device\n");
- spi->bits_per_word = 16;
spi->mode = SPI_MODE_0;
ret = spi_setup(spi);
if (ret < 0)
--
1.9.0
From: Mark Brown <broonie(a)linaro.org>
Probably due to rebasing over the lengthy time it took to get the patch
merged commit addea9ef055b (cpufreq: enable ARM drivers on arm64) added
a duplicate Power management options section. Add CPUfreq to the CPU
power management section and remove a duplicate include of the main
power section.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
arch/arm64/Kconfig | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index a3c40d65128b..2474c24dc229 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -318,12 +318,6 @@ menu "CPU Power Management"
source "drivers/cpuidle/Kconfig"
-endmenu
-
-menu "Power management options"
-
-source "kernel/power/Kconfig"
-
source "drivers/cpufreq/Kconfig"
endmenu
--
1.9.0
Adding libdw DWARF post unwind support, which is part
of elfutils-devel/libdw-dev package from version 0.158.
Also includes the test suite for dwarf unwinding, by adding the
arch specific test code and the perf_regs_load function.
Jean Pihet (3):
perf tests: Introduce perf_regs_load function on ARM
perf tests: Add dwarf unwind test on ARM
perf tools: Add libdw DWARF post unwind support for ARM
tools/perf/Makefile.perf | 2 +-
tools/perf/arch/arm/Makefile | 7 ++++
tools/perf/arch/arm/include/perf_regs.h | 5 +++
tools/perf/arch/arm/tests/dwarf-unwind.c | 59 ++++++++++++++++++++++++++++++++
tools/perf/arch/arm/tests/regs_load.S | 51 +++++++++++++++++++++++++++
tools/perf/arch/arm/util/unwind-libdw.c | 36 +++++++++++++++++++
tools/perf/tests/builtin-test.c | 2 +-
tools/perf/tests/tests.h | 2 +-
8 files changed, 161 insertions(+), 3 deletions(-)
create mode 100644 tools/perf/arch/arm/tests/dwarf-unwind.c
create mode 100644 tools/perf/arch/arm/tests/regs_load.S
create mode 100644 tools/perf/arch/arm/util/unwind-libdw.c
---
- Rebased on latest acme/perf/core git tree,
- Tested on quad-core ARMv7 machine
--
1.7.11.7
The cpu_load decays on time according past cpu load of rq. The sched_avg
also decays tasks' load on time. Now we has 2 kind decay for cpu_load.
That is a kind of redundancy. And increase the system load by decay
calculation. This patch try to remove the cpu_load decay.
There are 5 load_idx used for cpu_load in sched_domain. busy_idx and
idle_idx are not zero usually, but newidle_idx, wake_idx and forkexec_idx
are all zero on every arch. A shortcut to remove cpu_Load decay in the first
patch. just one line patch for this change. Then I try to clean up code
followed by this change.
V4,
1, rebase on latest tip/master
2, replace target_load by biased_load as Morten's suggestion
V3,
1, correct the wake_affine bias. Thanks for Morten's reminder!
2, replace source_load by weighted_cpuload for better function name meaning.
V2,
1, This version do some tuning on load bias of target load.
2, Got further to remove the cpu_load in rq.
3, Revert the patch 'Limit sd->*_idx range on sysctl' since no needs
Any testing/comments are appreciated.
This patch rebase on latest tip/master.
The git tree for this patchset at:
git@github.com:alexshi/power-scheduling.git noload
Thanks
Alex
[PATCH 01/11] sched: shortcut to remove load_idx
[PATCH 02/11] sched: remove rq->cpu_load[load_idx] array
[PATCH 03/11] sched: clean up cpu_load update
[PATCH 04/11] sched: unify imbalance bias for target group
[PATCH 05/11] sched: rewrite update_cpu_load_nohz
[PATCH 06/11] sched: clean up source_load/target_load
[PATCH 07/11] sched: replace source_load by weighted_cpuload
[PATCH 08/11] sched: replace target_load by biased_load
[PATCH 09/11] sched: remove rq->cpu_load and rq->nr_load_updates
[PATCH 10/11] sched: rename update_*_cpu_load
[PATCH 11/11] sched: clean up task_hot function
Patches adding support for hibernation on ARM
- ARM hibernation / suspend-to-disk
- Change soft_restart to use non-tracing raw_local_irq_disable
Patches based on v3.14-rc5 tag, verified hibernation on beaglebone black on a
branch based on 3.13 merged with initial omap support from Russ Dill which
can be found here (includes v1 patchset):
http://git.linaro.org/git-ro/people/sebastian.capella/linux.git hibernation_3.13_russMerge
[PATCH v8 1/2] ARM: avoid tracers in soft_restart
arch/arm/kernel/process.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Use raw_local_irq_disable in place of local_irq_disable to avoid
infinite abort recursion while tracing. (unchanged since v3)
[PATCH v8 2/2] ARM hibernation / suspend-to-disk
arch/arm/kernel/Makefile | 1 +
arch/arm/kernel/hibernate.c | 107 +++++++++++++++++++++++++++++++++++++++++++
arch/arm/mm/Kconfig | 5 ++
include/linux/suspend.h | 2 +
4 files changed, 115 insertions(+)
Adds support for ARM based hibernation
Additional notes:
-----------------
There are two checkpatch warnings added by this patch. These follow
behavior in existing hibernation implementations on other platforms.
WARNING: externs should be avoided in .c files
#108: FILE: arch/arm/kernel/hibernate.c:25:
+extern const void __nosave_begin, __nosave_end;
This extern is picking up the linker nosave region definitions, only
used in hibernate. Follows same extern line used mips, powerpc, s390,
sh, sparc, x86 & unicore32
WARNING: externs should be avoided in .c files
#186: FILE: arch/arm/kernel/hibernate.c:103:
+ extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
This extern is used in the arch/arm/ in hibernate, process and bL_switcher
Changes in v8:
--------------
* remove definition and use of __pa_symbol
Changes in v7:
--------------
* remove use of RELOC_HIDE macro
* remove unused #includes
* fixup comment for arch_restore_image
* ensure alignment of resume stack on 8 byte boundary
Changes in v6:
--------------
* Simplify static variable names
Changes in v5:
--------------
* Fixed checkpatch warning on trailing whitespace
Changes in v4:
--------------
* updated comment for soft_restart with review feedback
* dropped freeze_processes patch which was queued separately
to 3.14 by Rafael Wysocki:
https://lkml.org/lkml/2014/2/25/683
Changes in v3:
--------------
* added comment to use of soft_restart
* drop irq disable soft_restart patch
* add patch to avoid tracers in soft_restart by using raw_local_irq_*
Changes in v2:
--------------
* Removed unneeded flush_thread, use of __naked and cpu_init.
* dropped Cyril Chemparathy <cyril(a)ti.com> from Cc: list as
emails are bouncing.
Thanks,
Sebastian Capella
This is v6 of my attempt to add support for a generic pci_host_bridge controller created
from a description passed in the device tree.
Changes from v5:
- Tested by Tanmay Inamdar, thanks Tanmay!
- dropped v5 5/7 pci: Use parent domain number when allocating child busses.
- Added weak implementation of pcibios_fixup_bridge_ranges() in drivers/pci/host-bridge.c
so that architectures that enable CONFIG_OF and CONFIG_PCI don't suddenly get compilation
errors. While at this, changed the signature of the function so that an error can be
returned.
- With the new error code in pcibios_fixup_bridge_ranges(), reworked the error handling
in pci_host_bridge_of_get_ranges() and of_create_pci_host_bridge().
- Add linux/slab.h to the #include list
- Revisit the error path in pci_create_root_bus[_in_domain]() and fixed the case where
failing to allocate the bus will not return an error.
Changes from v4:
- Export pci_find_host_bridge() to be used by arch code. There is scope for
making the arch/arm64 version of pci_domain_nr the default weak implementation
but that would double the size of this series in order to handle all #define
versions of the pci_domain_nr() function, so I suggest keeping that for a separate
cleanup series.
Changes from v3:
- Dynamically allocate bus_range resource in of_create_pci_host_bridge()
- Fix the domain number used when creating child busses.
- Changed domain number allocator to use atomic operations.
- Use ERR_PTR() to propagate the error out of pci_create_root_bus_in_domain()
and of_create_pci_host_bridge().
Changes from v2:
- Use range->cpu_addr when calling pci_address_to_pio()
- Introduce pci_register_io_range() helper function in order to register
io ranges ahead of their conversion to PIO values. This is needed as no
information is being stored yet regarding the range mapping, making
pci_address_to_pio() fail. Default weak implementation does nothing,
to cover the default weak implementation of pci_address_to_pio() that
expects direct mapping of physical addresses into PIO values (x86 view).
Changes from v1:
- Add patch to fix conversion of IO ranges into IO resources.
- Added a domain_nr member to pci_host_bridge structure, and a new function
to create a root bus in a given domain number. In order to facilitate that
I propose changing the order of initialisation between pci_host_bridge and
it's related bus in pci_create_root_bus() as sort of a rever of 7b5436635800.
This is done in patch 1/4 and 2/4.
- Added a simple allocator of domain numbers in drivers/pci/host-bridge.c. The
code will first try to get a domain id from of_alias_get_id(..., "pci-domain")
and if that fails assign the next unallocated domain id.
- Changed the name of the function that creates the generic host bridge from
pci_host_bridge_of_init to of_create_pci_host_bridge and exported as GPL symbol.
v5 thread here: https://lkml.org/lkml/2014/3/4/318
v4 thread here: https://lkml.org/lkml/2014/3/3/301
v3 thread here: https://lkml.org/lkml/2014/2/28/216
v2 thread here: https://lkml.org/lkml/2014/2/27/245
v1 thread here: https://lkml.org/lkml/2014/2/3/380
Best regards,
Liviu
Liviu Dudau (6):
pci: Introduce pci_register_io_range() helper function.
pci: OF: Fix the conversion of IO ranges into IO resources.
pci: Create pci_host_bridge before its associated bus in pci_create_root_bus.
pci: Introduce a domain number for pci_host_bridge.
pci: Export find_pci_host_bridge() function.
pci: Add support for creating a generic host_bridge from device tree
drivers/of/address.c | 39 +++++++++++
drivers/pci/host-bridge.c | 159 ++++++++++++++++++++++++++++++++++++++++++++-
drivers/pci/probe.c | 70 +++++++++++++-------
include/linux/of_address.h | 14 +---
include/linux/pci.h | 17 +++++
5 files changed, 264 insertions(+), 35 deletions(-)
--
1.9.0
Double ! or !! are normally required to get 0 or 1 out of a expression. A
comparision always returns 0 or 1 and hence there is no need to apply double !
over it again.
Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org>
---
kernel/power/suspend.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c
index 62ee437..90b3d93 100644
--- a/kernel/power/suspend.c
+++ b/kernel/power/suspend.c
@@ -39,7 +39,7 @@ static const struct platform_suspend_ops *suspend_ops;
static bool need_suspend_ops(suspend_state_t state)
{
- return !!(state > PM_SUSPEND_FREEZE);
+ return state > PM_SUSPEND_FREEZE;
}
static DECLARE_WAIT_QUEUE_HEAD(suspend_freeze_wait_head);
--
1.7.12.rc2.18.g61b472e
From: Mark Brown <broonie(a)linaro.org>
During init the core checks if the wm5102 has finished starting by reading
register 0x19 and looking at the value. This read always fails since this
is not a readable register, mark it as being one. While we're at it provide
a constant for the register name (as supplied by Charles Keepax).
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/mfd/arizona-core.c | 3 ++-
drivers/mfd/wm5102-tables.c | 1 +
include/linux/mfd/arizona/registers.h | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index 1c3ae57082ed..d4919fa2797a 100644
--- a/drivers/mfd/arizona-core.c
+++ b/drivers/mfd/arizona-core.c
@@ -745,7 +745,8 @@ int arizona_dev_init(struct arizona *arizona)
/* Ensure device startup is complete */
switch (arizona->type) {
case WM5102:
- ret = regmap_read(arizona->regmap, 0x19, &val);
+ ret = regmap_read(arizona->regmap,
+ ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
if (ret != 0)
dev_err(dev,
"Failed to check write sequencer state: %d\n",
diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c
index f4668d39e542..e32736c3ab57 100644
--- a/drivers/mfd/wm5102-tables.c
+++ b/drivers/mfd/wm5102-tables.c
@@ -1016,6 +1016,7 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
case ARIZONA_WRITE_SEQUENCER_CTRL_0:
case ARIZONA_WRITE_SEQUENCER_CTRL_1:
case ARIZONA_WRITE_SEQUENCER_CTRL_2:
+ case ARIZONA_WRITE_SEQUENCER_CTRL_3:
case ARIZONA_WRITE_SEQUENCER_PROM:
case ARIZONA_TONE_GENERATOR_1:
case ARIZONA_TONE_GENERATOR_2:
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index 90d57aec34e7..f6ad81e923ac 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -27,6 +27,7 @@
#define ARIZONA_WRITE_SEQUENCER_CTRL_0 0x16
#define ARIZONA_WRITE_SEQUENCER_CTRL_1 0x17
#define ARIZONA_WRITE_SEQUENCER_CTRL_2 0x18
+#define ARIZONA_WRITE_SEQUENCER_CTRL_3 0x19
#define ARIZONA_WRITE_SEQUENCER_PROM 0x1A
#define ARIZONA_TONE_GENERATOR_1 0x20
#define ARIZONA_TONE_GENERATOR_2 0x21
--
1.9.0
From: Mark Brown <broonie(a)linaro.org>
During init the core checks if the wm5102 has finished starting by reading
register 0x19 and looking at the value. This read always fails since this
is not a readable register, mark it as being one.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/mfd/wm5102-tables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c
index f4668d39e542..07f024fd4ded 100644
--- a/drivers/mfd/wm5102-tables.c
+++ b/drivers/mfd/wm5102-tables.c
@@ -1016,6 +1016,7 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
case ARIZONA_WRITE_SEQUENCER_CTRL_0:
case ARIZONA_WRITE_SEQUENCER_CTRL_1:
case ARIZONA_WRITE_SEQUENCER_CTRL_2:
+ case 0x19:
case ARIZONA_WRITE_SEQUENCER_PROM:
case ARIZONA_TONE_GENERATOR_1:
case ARIZONA_TONE_GENERATOR_2:
--
1.9.0
This is v5 of my attempt to add support for a generic pci_host_bridge controller created
from a description passed in the device tree.
Changes from v4:
- Export pci_find_host_bridge() to be used by arch code. There is scope for
making the arch/arm64 version of pci_domain_nr the default weak implementation
but that would double the size of this series in order to handle all #define
versions of the pci_domain_nr() function, so I suggest keeping that for a separate
cleanup series.
Changes from v3:
- Dynamically allocate bus_range resource in of_create_pci_host_bridge()
- Fix the domain number used when creating child busses.
- Changed domain number allocator to use atomic operations.
- Use ERR_PTR() to propagate the error out of pci_create_root_bus_in_domain()
and of_create_pci_host_bridge().
Changes from v2:
- Use range->cpu_addr when calling pci_address_to_pio()
- Introduce pci_register_io_range() helper function in order to register
io ranges ahead of their conversion to PIO values. This is needed as no
information is being stored yet regarding the range mapping, making
pci_address_to_pio() fail. Default weak implementation does nothing,
to cover the default weak implementation of pci_address_to_pio() that
expects direct mapping of physical addresses into PIO values (x86 view).
Changes from v1:
- Add patch to fix conversion of IO ranges into IO resources.
- Added a domain_nr member to pci_host_bridge structure, and a new function
to create a root bus in a given domain number. In order to facilitate that
I propose changing the order of initialisation between pci_host_bridge and
it's related bus in pci_create_root_bus() as sort of a rever of 7b5436635800.
This is done in patch 1/4 and 2/4.
- Added a simple allocator of domain numbers in drivers/pci/host-bridge.c. The
code will first try to get a domain id from of_alias_get_id(..., "pci-domain")
and if that fails assign the next unallocated domain id.
- Changed the name of the function that creates the generic host bridge from
pci_host_bridge_of_init to of_create_pci_host_bridge and exported as GPL symbol.
v4 thread here: https://lkml.org/lkml/2014/3/3/301
v3 thread here: https://lkml.org/lkml/2014/2/28/216
v2 thread here: https://lkml.org/lkml/2014/2/27/245
v1 thread here: https://lkml.org/lkml/2014/2/3/380
Best regards,
Liviu
Liviu Dudau (7):
pci: Introduce pci_register_io_range() helper function.
pci: OF: Fix the conversion of IO ranges into IO resources.
pci: Create pci_host_bridge before its associated bus in pci_create_root_bus.
pci: Introduce a domain number for pci_host_bridge.
pci: Use parent domain number when allocating child busses.
pci: Export find_pci_host_bridge() function.
pci: Add support for creating a generic host_bridge from device tree
drivers/of/address.c | 39 +++++++++++++
drivers/pci/host-bridge.c | 142 ++++++++++++++++++++++++++++++++++++++++++++-
drivers/pci/probe.c | 72 +++++++++++++++--------
include/linux/of_address.h | 14 +----
include/linux/pci.h | 17 ++++++
5 files changed, 248 insertions(+), 36 deletions(-)
--
1.9.0
cpufreq_update_policy() calls cpufreq_driver->get() to get current frequency of
a CPU and it is not supposed to fail or return zero. Return error in case that
happens.
Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org>
---
Pierre,
I don't think this will fix the issue you were facing but might supress it :)..
And so you need to understand what causes your ->get() to return zero.
@Rafael: I got to these patches while looking at code recently after Pierre
complained about. Came to this conclusion after having discussions with Srivatsa
over IRC..
drivers/cpufreq/cpufreq.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 08ca8c9..383362b 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -2151,6 +2151,13 @@ int cpufreq_update_policy(unsigned int cpu)
*/
if (cpufreq_driver->get) {
new_policy.cur = cpufreq_driver->get(cpu);
+
+ if (!new_policy.cur) {
+ pr_err("%s: ->get() returned 0 KHz\n", __func__);
+ ret = -EINVAL;
+ goto no_policy;
+ }
+
if (!policy->cur) {
pr_debug("Driver did not initialize current freq");
policy->cur = new_policy.cur;
--
1.7.12.rc2.18.g61b472e
This is v2 of my attempt to add support for a generic pci_host_bridge controller created
from a description passed in the device tree.
Changes from v1:
- Add patch to fix conversion of IO ranges into IO resources.
- Added a domain_nr member to pci_host_bridge structure, and a new function
to create a root bus in a given domain number. In order to facilitate that
I propose changing the order of initialisation between pci_host_bridge and
it's related bus in pci_create_root_bus() as sort of a rever of 7b5436635800.
This is done in patch 1/4 and 2/4.
- Added a simple allocator of domain numbers in drivers/pci/host-bridge.c. The
code will first try to get a domain id from of_alias_get_id(..., "pci-domain")
and if that fails assign the next unallocated domain id.
- Changed the name of the function that creates the generic host bridge from
pci_host_bridge_of_init to of_create_pci_host_bridge and exported as GPL symbol.
v1 thread here: https://lkml.org/lkml/2014/2/3/380
The following is an edit of the original blurb:
Following the discussion started here [1], I now have a proposal for tackling
generic support for host bridges described via device tree. It is an initial
stab at it, to try to get feedback and suggestions, but it is functional enough
that I have PCI Express for arm64 working on an FPGA using the patch that I am
also publishing that adds support for PCI for that platform.
Looking at the existing architectures that fit the requirements (use of device
tree and PCI) yields the powerpc and microblaze as generic enough to make them
candidates for conversion. I have a tentative patch for microblaze that I can
only compile test it, unfortunately using qemu-microblaze leads to an early
crash in the kernel.
As Bjorn has mentioned in the previous discussion, the idea is to add to
struct pci_host_bridge enough data to be able to reduce the size or remove the
architecture specific pci_controller structure. arm64 support actually manages
to get rid of all the architecture static data and has no pci_controller structure
defined. For host bridge drivers that means a change of API unless architectures
decide to provide a compatibility layer (comments here please).
In order to initialise a host bridge with the new API, the following example
code is sufficient for a _probe() function:
static int myhostbridge_probe(struct platform_device *pdev)
{
int err;
struct device_node *dev;
struct pci_host_bridge *bridge;
struct myhostbridge_port *pp;
resource_size_t lastbus;
dev = pdev->dev.of_node;
if (!of_device_is_available(dev)) {
pr_warn("%s: disabled\n", dev->full_name);
return -ENODEV;
}
pp = kzalloc(sizeof(struct myhostbridge_port), GFP_KERNEL);
if (!pp)
return -ENOMEM;
bridge = of_create_pci_host_bridge(&pdev->dev, &myhostbridge_ops, pp);
if (!bridge) {
err = -EINVAL;
goto bridge_init_fail;
}
err = myhostbridge_setup(bridge->bus);
if (err)
goto bridge_init_fail;
/* We always enable PCI domains and we keep domain 0 backward
* compatible in /proc for video cards
*/
pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0);
pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
lastbus = pci_scan_child_bus(bridge->bus);
pci_bus_update_busn_res_end(bridge->bus, lastbus);
pci_assign_unassigned_bus_resources(bridge->bus);
pci_bus_add_devices(bridge->bus);
return 0;
bridge_init_fail:
kfree(pp);
return err;
}
[1] http://thread.gmane.org/gmane.linux.kernel.pci/25946
Best regards,
Liviu
Liviu Dudau (4):
pci: OF: Fix the conversion of IO ranges into IO resources.
pci: Create pci_host_bridge before its associated bus in pci_create_root_bus.
pci: Introduce a domain number for pci_host_bridge.
pci: Add support for creating a generic host_bridge from device tree
drivers/of/address.c | 31 +++++++++++
drivers/pci/host-bridge.c | 134 +++++++++++++++++++++++++++++++++++++++++++++
drivers/pci/probe.c | 66 ++++++++++++++--------
include/linux/of_address.h | 13 +----
include/linux/pci.h | 17 ++++++
5 files changed, 227 insertions(+), 34 deletions(-)
--
1.9.0