I'm dropping the RFC tag now as I have the feeling that we are starting to have something in
a good shape that can be pushed for more testing in near future.
This is v7 of my attempt to add support for a generic pci_host_bridge controller created
from a description passed in the device tree.
Changes from v6:
- Made pci_register_io_range() return an error if PCI_IOBASE is not defined. When the
cleanup of PCI_IOBASE use is going to happen, that will catch all those architectures
that don't use virtual mapping of I/O ranges (like x86) or don't support PCI at all.
- Improved the error handling in of_pci_range_to_resource() and made it propagate the
error as well.
- Bail out of the parsing of PCI ranges if of_pci_range_to_resource() fails.
Changes from v5:
- Tested by Tanmay Inamdar, thanks Tanmay!
- dropped v5 5/7 pci: Use parent domain number when allocating child busses.
- Added weak implementation of pcibios_fixup_bridge_ranges() in drivers/pci/host-bridge.c
so that architectures that enable CONFIG_OF and CONFIG_PCI don't suddenly get compilation
errors. While at this, changed the signature of the function so that an error can be
returned.
- With the new error code in pcibios_fixup_bridge_ranges(), reworked the error handling
in pci_host_bridge_of_get_ranges() and of_create_pci_host_bridge().
- Add linux/slab.h to the #include list
- Revisit the error path in pci_create_root_bus[_in_domain]() and fixed the case where
failing to allocate the bus will not return an error.
Changes from v4:
- Export pci_find_host_bridge() to be used by arch code. There is scope for
making the arch/arm64 version of pci_domain_nr the default weak implementation
but that would double the size of this series in order to handle all #define
versions of the pci_domain_nr() function, so I suggest keeping that for a separate
cleanup series.
Changes from v3:
- Dynamically allocate bus_range resource in of_create_pci_host_bridge()
- Fix the domain number used when creating child busses.
- Changed domain number allocator to use atomic operations.
- Use ERR_PTR() to propagate the error out of pci_create_root_bus_in_domain()
and of_create_pci_host_bridge().
Changes from v2:
- Use range->cpu_addr when calling pci_address_to_pio()
- Introduce pci_register_io_range() helper function in order to register
io ranges ahead of their conversion to PIO values. This is needed as no
information is being stored yet regarding the range mapping, making
pci_address_to_pio() fail. Default weak implementation does nothing,
to cover the default weak implementation of pci_address_to_pio() that
expects direct mapping of physical addresses into PIO values (x86 view).
Changes from v1:
- Add patch to fix conversion of IO ranges into IO resources.
- Added a domain_nr member to pci_host_bridge structure, and a new function
to create a root bus in a given domain number. In order to facilitate that
I propose changing the order of initialisation between pci_host_bridge and
it's related bus in pci_create_root_bus() as sort of a rever of 7b5436635800.
This is done in patch 1/4 and 2/4.
- Added a simple allocator of domain numbers in drivers/pci/host-bridge.c. The
code will first try to get a domain id from of_alias_get_id(..., "pci-domain")
and if that fails assign the next unallocated domain id.
- Changed the name of the function that creates the generic host bridge from
pci_host_bridge_of_init to of_create_pci_host_bridge and exported as GPL symbol.
v6 thread here: https://lkml.org/lkml/2014/3/5/179
v5 thread here: https://lkml.org/lkml/2014/3/4/318
v4 thread here: https://lkml.org/lkml/2014/3/3/301
v3 thread here: https://lkml.org/lkml/2014/2/28/216
v2 thread here: https://lkml.org/lkml/2014/2/27/245
v1 thread here: https://lkml.org/lkml/2014/2/3/380
Best regards,
Liviu
Liviu Dudau (6):
pci: Introduce pci_register_io_range() helper function.
pci: OF: Fix the conversion of IO ranges into IO resources.
pci: Create pci_host_bridge before its associated bus in pci_create_root_bus.
pci: Introduce a domain number for pci_host_bridge.
pci: Export find_pci_host_bridge() function.
pci: Add support for creating a generic host_bridge from device tree
drivers/of/address.c | 49 +++++++++++
drivers/pci/host-bridge.c | 161 ++++++++++++++++++++++++++++++++++-
drivers/pci/probe.c | 73 ++++++++++------
include/linux/of_address.h | 14 +--
include/linux/pci.h | 17 ++++
5 files changed, 278 insertions(+), 36 deletions(-)
--
1.9.0
Hello,
On Linaro Android 14.04, with custom compiled kernel (config file attached),
I am facing a kernel crash (details log attached).
I am running on Samsung Arndale Board with Exynos 5250.
Output from my /sys/kernel/debug/gpio looks as below -
root@arndale:/ # cat /sys/kernel/debug/gpio
GPIOs 0-7, GPA0:
gpio-0 (s3c24xx-uart ) in hi
gpio-1 (s3c24xx-uart ) in hi
gpio-2 (s3c24xx-uart ) in lo
gpio-3 (s3c24xx-uart ) in hi
gpio-6 (i2c-bus ) in hi
gpio-7 (i2c-bus ) in hi
GPIOs 9-14, GPA1:
gpio-9 (s3c24xx-uart ) in hi
gpio-10 (s3c24xx-uart ) in hi
gpio-11 (s3c24xx-uart ) in hi
gpio-12 (s3c24xx-uart ) in hi
gpio-13 (s3c24xx-uart ) in lo
gpio-14 (s3c24xx-uart ) in hi
GPIOs 16-23, GPA2:
GPIOs 25-29, GPB0:
GPIOs 31-35, GPB1:
GPIOs 37-40, GPB2:
GPIOs 42-45, GPB3:
gpio-42 (i2c-bus ) in hi
gpio-43 (i2c-bus ) in hi
GPIOs 47-53, GPC0:
gpio-47 (dw-mci-bus ) in lo
gpio-48 (dw-mci-bus ) in hi
gpio-50 (dw-mci-bus ) in hi
gpio-51 (dw-mci-bus ) in hi
gpio-52 (dw-mci-bus ) in hi
gpio-53 (dw-mci-bus ) in hi
GPIOs 55-58, GPC1:
gpio-55 (dw-mci-bus ) in hi
gpio-56 (dw-mci-bus ) in hi
gpio-57 (dw-mci-bus ) in hi
gpio-58 (dw-mci-bus ) in hi
GPIOs 60-66, GPC2:
GPIOs 68-74, GPC3:
gpio-68 (dw-mci-bus ) in lo
gpio-69 (dw-mci-bus ) in hi
gpio-70 (dw-mci-cd ) in lo
gpio-71 (dw-mci-bus ) in lo
gpio-72 (dw-mci-bus ) in hi
gpio-73 (dw-mci-bus ) in hi
gpio-74 (dw-mci-bus ) in hi
GPIOs 76-82, GPC4:
GPIOs 84-87, GPD0:
gpio-84 (s3c24xx-uart ) in lo
gpio-85 (s3c24xx-uart ) in hi
gpio-86 (s3c24xx-uart ) in lo
gpio-87 (s3c24xx-uart ) in hi
GPIOs 89-96, GPD1:
GPIOs 98-103, GPY0:
GPIOs 105-108, GPY1:
GPIOs 110-115, GPY2:
GPIOs 117-124, GPY3:
GPIOs 126-133, GPY4:
GPIOs 135-142, GPY5:
GPIOs 144-151, GPY6:
GPIOs 153-160, GPX0:
GPIOs 162-169, GPX1:
gpio-163 (VDD_33ON_2.8V ) out hi
GPIOs 171-178, GPX2:
gpio-174 (S5M8767 DS2 ) out lo
gpio-175 (S5M8767 DS3 ) out lo
gpio-176 (S5M8767 DS4 ) out lo
GPIOs 180-187, GPX3:
gpio-187 (HPD ) in lo
GPIOs 189-196, GPE0:
GPIOs 198-199, GPE1:
GPIOs 201-204, GPF0:
GPIOs 206-209, GPF1:
GPIOs 211-218, GPG0:
GPIOs 220-227, GPG1:
GPIOs 229-230, GPG2:
GPIOs 232-235, GPH0:
GPIOs 237-244, GPH1:
GPIOs 246-253, GPV0:
GPIOs 255-262, GPV1:
GPIOs 264-271, GPV2:
GPIOs 273-280, GPV3:
GPIOs 282-283, GPV4:
GPIOs 285-291, GPZ:
While trying to export gpio 8, the crash happens -
root@arndale:/ # echo 8 > /sys/class/gpio/export
1Unable to handle kernel NULL pointer dereference at virtual address 00000044
[ 26.700000] Unable to handle kernel NULL pointer dereference at
virtual address 00000044
1pgd = e8848000
[ 26.700000] pgd = e8848000
[00000044] *pgd=00000000[ 26.720000] [00000044] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[ 26.730000] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
>From above, I noted that gpio 0 - 7 are associated with GPA0 and gpio
9 - 14 with GPA1.
gpio 8 is not existent in /sys/kernel/debug/gpio file.
On the same board, I ran Linaro Saucy server, and there the crash does
not happen. /sys/kernel/debug/gpio
on saucy server looks as below -
GPIOs 0-7, platform/11400000.pinctrl, gpa0:
GPIOs 8-13, platform/11400000.pinctrl, gpa1:
GPIOs 14-21, platform/11400000.pinctrl, gpa2:
GPIOs 22-26, platform/11400000.pinctrl, gpb0:
GPIOs 27-31, platform/11400000.pinctrl, gpb1:
GPIOs 32-35, platform/11400000.pinctrl, gpb2:
GPIOs 36-39, platform/11400000.pinctrl, gpb3:
GPIOs 40-46, platform/11400000.pinctrl, gpc0:
GPIOs 47-50, platform/11400000.pinctrl, gpc1:
GPIOs 51-57, platform/11400000.pinctrl, gpc2:
GPIOs 58-64, platform/11400000.pinctrl, gpc3:
GPIOs 65-68, platform/11400000.pinctrl, gpd0:
GPIOs 69-76, platform/11400000.pinctrl, gpd1:
gpio-76 (usb3503 connect ) out hi
GPIOs 77-83, platform/11400000.pinctrl, gpc4:
GPIOs 84-89, platform/11400000.pinctrl, gpy0:
GPIOs 90-93, platform/11400000.pinctrl, gpy1:
GPIOs 94-99, platform/11400000.pinctrl, gpy2:
GPIOs 100-107, platform/11400000.pinctrl, gpy3:
GPIOs 108-115, platform/11400000.pinctrl, gpy4:
GPIOs 116-123, platform/11400000.pinctrl, gpy5:
GPIOs 124-131, platform/11400000.pinctrl, gpy6:
GPIOs 132-139, platform/11400000.pinctrl, gpx0:
GPIOs 140-147, platform/11400000.pinctrl, gpx1:
gpio-141 (VDD_33ON_2.8V ) out hi
gpio-144 (SW-TACT2 ) in hi
gpio-145 (SW-TACT3 ) in hi
gpio-146 (SW-TACT4 ) in hi
gpio-147 (SW-TACT5 ) in hi
GPIOs 148-155, platform/11400000.pinctrl, gpx2:
gpio-148 (SW-TACT6 ) in hi
gpio-149 (SW-TACT7 ) in hi
gpio-151 (S5M8767 DS2 ) out lo
gpio-152 (S5M8767 DS3 ) out lo
gpio-153 (S5M8767 DS4 ) out lo
GPIOs 156-163, platform/11400000.pinctrl, gpx3:
gpio-161 (usb3503 reset ) out hi
gpio-163 (HPD ) in lo
GPIOs 164-171, platform/13400000.pinctrl, gpe0:
GPIOs 172-173, platform/13400000.pinctrl, gpe1:
GPIOs 174-177, platform/13400000.pinctrl, gpf0:
GPIOs 178-181, platform/13400000.pinctrl, gpf1:
GPIOs 182-189, platform/13400000.pinctrl, gpg0:
GPIOs 190-197, platform/13400000.pinctrl, gpg1:
GPIOs 198-199, platform/13400000.pinctrl, gpg2:
GPIOs 200-203, platform/13400000.pinctrl, gph0:
GPIOs 204-211, platform/13400000.pinctrl, gph1:
GPIOs 212-219, platform/10d10000.pinctrl, gpv0:
GPIOs 220-227, platform/10d10000.pinctrl, gpv1:
GPIOs 228-235, platform/10d10000.pinctrl, gpv2:
GPIOs 236-243, platform/10d10000.pinctrl, gpv3:
GPIOs 244-245, platform/10d10000.pinctrl, gpv4:
GPIOs 246-252, platform/3860000.pinctrl, gpz:
Questions -
1. Is it kernel bug?
2. Why are some gpios (8, 15, 24, etc) not mapped to any device on android?
--
Thanks,
- Meraj
- Robustify the user backtrace code, as done on other architectures.
- Provide the symbols resolution when triggering from tracepoints.
Tested with perf record and tracepoints triggering (-e <tracepoint>), with
unwinding using fp (--call-graph fp) and dwarf info (--call-graph dwarf).
Jean Pihet (3):
ARM: perf: Check that current->mm is alive before getting user
callchain
ARM: perf: disable the pagefault handler when reading from user space
ARM: perf: allow tracing with kernel tracepoints events
arch/arm/include/asm/perf_event.h | 19 +++++++++++++++++++
arch/arm/kernel/perf_event.c | 13 +++++++++++--
2 files changed, 30 insertions(+), 2 deletions(-)
--
1.8.1.2
When expiry is set to KTIME_MAX, we cancel the 'tick-sched' hrtimer in highres
mode and skip reprogramming clockevent device in lowres mode. But, the
clockevent device is already reprogrammed from tick-handler.
We will surely get interrupted atleast one more time at tick-interval.
In highres mode, as there is no tick-sched hrtimer to service, we wouldn't
restart the tick.
But in lowres mode, we unconditionally reschedule the tick every time
tick_nohz_handler() is called. So, even if 'tick_stopped' is set to '1', we will
never be in full dynticks mode.
To fix this, lets skip rescheduling next tick from tick-handler when we are
running tickless.
'tick_stopped' can be set to '1' in one more case, i.e. when expires isn't equal
to KTIME_MAX but is greater than equal to two jiffies. We can still avoid
reprogramming clock device from the tick in this case as it's going to be
reprogrammed from irq_exit() anyway. So we could avoid one useless device write.
Similar piece of code was present initially when dynticks functionality was
first added: 79bf2bb3.
But later commit fb02fbc removed this check to keep jiffies updated for the sake
of long running softirqs, but was later again reverted in ae99286b due to
spurious wakeups. However it was not entirely reverted. The long running
softirqs were asked to fix themselves.
Introducing this change again shouldn't result in 'long running softirqs' issue
discussed in fb02fbc, as tick_nohz_kick_tick() is still commented out.
Reviewed-by: Preeti U Murthy <preeti(a)linux.vnet.ibm.com>
Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org>
---
V1->V2:
- Updated comments a bit for this one and added new patch 2/2.
- Rebased over 3.16-rc3
Pushed here:
git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux.git tick/lowres-go-tickless
kernel/time/tick-sched.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index 6558b7a..bb7b736 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -956,6 +956,12 @@ static void tick_nohz_handler(struct clock_event_device *dev)
tick_sched_do_timer(now);
tick_sched_handle(ts, regs);
+ /*
+ * Skip reprogramming next event if we are running tickless.
+ */
+ if (unlikely(ts->tick_stopped))
+ return;
+
while (tick_nohz_reprogram(ts, now)) {
now = ktime_get();
tick_do_update_jiffies64(now);
--
2.0.0.rc2