Signed-off-by: Jason Liu r64343@freescale.com --- arch/arm/mach-mx5/Kconfig | 8 ++++ arch/arm/mach-mx5/Makefile | 1 + arch/arm/mach-mx5/board-dt.c | 64 +++++++++++++++++++++++++++++++ arch/arm/mach-mx5/clock-mx51-mx53.c | 43 ++++++++++++++++++++- arch/arm/plat-mxc/include/mach/common.h | 1 + 5 files changed, 116 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index de4fa99..6438f87 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -47,6 +47,14 @@ config MACH_MX51_BABBAGE u-boot. This includes specific configurations for the board and its peripherals.

+config MACH_MX51_DT + bool "Generic MX51 board (FDT support)" + select USE_OF + select SOC_IMX51 + help + Support for generic Freescale i.MX51 boards using Flattened Device + Tree. + config MACH_MX51_3DS bool "Support MX51PDK (3DS)" select SOC_IMX51 diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 0d43be9..540697e 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o +obj-$(CONFIG_MACH_MX51_DT) += board-dt.o diff --git a/arch/arm/mach-mx5/board-dt.c b/arch/arm/mach-mx5/board-dt.c new file mode 100644 index 0000000..cfb3813 --- /dev/null +++ b/arch/arm/mach-mx5/board-dt.c @@ -0,0 +1,64 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <linux/err.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#include <linux/of_platform.h> +#include <linux/of_fdt.h> + +#include <mach/common.h> +#include <mach/hardware.h> +#include <mach/imx-uart.h> +#include <mach/iomux-mx51.h> + +#include <asm/irq.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> + +#include "devices.h" + +static struct of_device_id mx51_dt_match_table[] __initdata = { + { .compatible = "simple-bus", }, + {} +}; + +static void __init mx51_dt_board_init(void) +{ + of_platform_bus_probe(NULL, mx51_dt_match_table, NULL); +} + +static void __init mx51_dt_timer_init(void) +{ + mx51_clocks_init(32768, 24000000, 22579200, 0); + mx5_clk_dt_init(); +} + +static struct sys_timer mxc_timer = { + .init = mx51_dt_timer_init, +}; + +static const char *mx51_dt_board_compat[] = { + "fsl,mx51-babbage", + NULL +}; + +DT_MACHINE_START(MX51_DT, "Freescale MX51 (Flattened Device Tree)") + .boot_params = PHYS_OFFSET + 0x100, + .map_io = mx51_map_io, + .init_irq = mx51_init_irq, + .init_machine = mx51_dt_board_init, + .dt_compat = mx51_dt_board_compat, + .timer = &mxc_timer, +MACHINE_END diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 0a19e75..dedb7f9 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -15,13 +15,19 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/clkdev.h> - +#include <linux/err.h> #include <asm/div64.h>

#include <mach/hardware.h> #include <mach/common.h> #include <mach/clock.h>

+#ifdef CONFIG_OF +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_clk.h> +#endif /* CONFIG_OF */ + #include "crm_regs.h"

/* External clock values passed-in by the board code */ @@ -1432,3 +1438,38 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, MX53_INT_GPT); return 0; } + +#ifdef CONFIG_OF +static struct clk *mx5_dt_clk_get(struct device_node *np, + const char *output_id, void *data) +{ + return data; +} + +static __init void mx5_dt_scan_clks(void) +{ + struct device_node *node; + struct clk *clk; + const char *id; + int rc; + + for_each_compatible_node(node, NULL, "clock") { + id = of_get_property(node, "clock-outputs", NULL); + if (!id) + continue; + + clk = clk_get_sys(id, NULL); + if (IS_ERR(clk)) + continue; + + rc = of_clk_add_provider(node, mx5_dt_clk_get, clk); + if (rc) + pr_err("error adding fixed clk %s\n", node->name); + } +} + +void __init mx5_clk_dt_init(void) +{ + mx5_dt_scan_clks(); +} +#endif diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index aea2cd3..a28e84a 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -58,4 +58,5 @@ extern void mxc91231_arch_reset(int, const char *); extern void mxc91231_prepare_idle(void); extern void mx51_efikamx_reset(void); extern int mx53_revision(void); +extern void mx5_clk_dt_init(void); #endif

Signed-off-by: Jason Liu r64343@freescale.com Singed-off-by: Rob Herring robherring2@gmail.com --- arch/arm/boot/dts/babbage.dts | 110 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 110 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/babbage.dts b/arch/arm/boot/dts/babbage.dts new file mode 100644 index 0000000..303dcd5 --- /dev/null +++ b/arch/arm/boot/dts/babbage.dts @@ -0,0 +1,110 @@ +/dts-v1/; + +/ { + model = "Freescale i.MX51 Babbage"; + compatible = "fsl,mx51-babbage"; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + interrupt-parent = <&tzic>; + + memory { + reg = <0x90000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttymxc0,115200n8 debug earlyprintk ip=dhcp"; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + tzic: tz-interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + reg = <0xe0000000 0x1000>; + compatible = "fsl,imx51-tzic"; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + uart0_clk: uart0 { + compatible = "clock"; + clock-outputs = "imx-uart.0"; + }; + + uart1_clk: uart1 { + compatible = "clock"; + clock-outputs = "imx-uart.1"; + }; + + uart2_clk: uart2 { + compatible = "clock"; + clock-outputs = "imx-uart.2"; + }; + + fec_clk: fec { + compatible = "clock"; + clock-outputs = "fec.0"; + }; + }; + + aips@73f00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x73f00000 0x100000>; + + imx-uart@bc000 { + compatible = "fsl,imx51-uart"; + reg = <0xbc000 0x1000>; + interrupts = <0x1f>; + fsl,has-rts-cts; + uart-clock = <&uart0_clk>, "uart"; + }; + + imx-uart@c0000 { + compatible = "fsl,imx51-uart"; + reg = <0xc0000 0x1000>; + interrupts = <0x20>; + fsl,has-rts-cts; + uart-clock = <&uart1_clk>, "uart"; + }; + }; + + spba@70000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x70000000 0x100000>; + + imx-uart@c000 { + compatible = "fsl,imx51-uart"; + reg = <0xc000 0x1000>; + interrupts = <0x21>; + fsl,has-rts-cts; + uart-clock = <&uart2_clk>, "uart"; + }; + }; + + aips@83f00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x83f00000 0x100000>; + + fec@ec000 { + compatible = "fsl,imx-fec"; + reg = <0xec000 0x1000>; + interrupts = <0x57>; + fec_clk-clock = <&fec_clk>, "fec"; + }; + }; +};

The id_entry will possibly be NULL, So, need check id_entry and make sure it not NULL before using it.

Signed-off-by: Jason Liu r64343@freescale.com --- drivers/net/fec.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/fec.c b/drivers/net/fec.c index 2a71373..02cdd71 100644 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c @@ -293,7 +293,7 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) * the system that it's running on. As the result, driver has to * swap every frame going to and coming from the controller. */ - if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) + if (id_entry && id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) swap_buffer(bufaddr, skb->len);

/* Save skb pointer */ @@ -529,7 +529,7 @@ fec_enet_rx(struct net_device *dev) dma_unmap_single(NULL, bdp->cbd_bufaddr, bdp->cbd_datlen, DMA_FROM_DEVICE);

- if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) + if (id_entry && id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) swap_buffer(data, pkt_len);

/* This does 16 byte alignment, exactly what we need. @@ -808,7 +808,7 @@ static int fec_enet_mii_init(struct platform_device *pdev) * mdio interface in board design, and need to be configured by * fec0 mii_bus. */ - if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && pdev->id) { + if (id_entry && (id_entry->driver_data & FEC_QUIRK_ENET_MAC) && pdev->id) { /* fec1 uses fec0 mii_bus */ fep->mii_bus = fec0_mii_bus; return 0; @@ -851,7 +851,7 @@ static int fec_enet_mii_init(struct platform_device *pdev) goto err_out_free_mdio_irq;

/* save fec0 mii_bus */ - if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) + if (id_entry && id_entry->driver_data & FEC_QUIRK_ENET_MAC) fec0_mii_bus = fep->mii_bus;

return 0; @@ -1238,7 +1238,7 @@ fec_restart(struct net_device *dev, int duplex) * enet-mac reset will reset mac address registers too, * so need to reconfigure it. */ - if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) { + if (id_entry && id_entry->driver_data & FEC_QUIRK_ENET_MAC) { memcpy(&temp_mac, dev->dev_addr, ETH_ALEN); writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW); writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH); @@ -1294,7 +1294,7 @@ fec_restart(struct net_device *dev, int duplex) * The phy interface and speed need to get configured * differently on enet-mac. */ - if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) { + if (id_entry && id_entry->driver_data & FEC_QUIRK_ENET_MAC) { val = readl(fep->hwp + FEC_R_CNTRL);

/* MII or RMII */