linaro-dev

linaro-dev@lists.linaro.org

4332 discussions

by Koen Kooi

== Progress == * OpenEmbedded (90%) * Build failures (CARD-787 <https://cards.linaro.org/browse/CARD-787>) * OE Training * Despairing at vendor kernels (10%) == Plans == * Release * B&B sprint * FOSDEM -- Koen Kooi Builds and Baselines | Release Manager Linaro.org | Open source software for ARM SoCs

11 years

[ACTIVITY] LAVA team weekly report, week 5

by lava-team＠linaro.org

**************** Team Work Logged **************** # tyler-baker Progress # * LAVA-1317 - lava-dispatcher maintenance * LAVA-1785 - Investigate and Integrate member development board (22.22%) * Basic ramdisk, nfs, and nfs master image implemented. Issue with ethernet driver is outstanding. Awaiting more information from Member LT. * LAVA-1511 - Upstream Kernel CI * LAVA-1829 - Improve Kernel-CI E-mail Reporting (77.78%) * Setup local development instance of dashboard. Loaded it with various bits of test data to check that most all use cases work properly. Added the additional information missing to the boot e-mail report as discussed in the kernel-ci meeting. Code has been tested locally, and pushed for review. https://review.linaro.org/#/c/4410/ # stylesen Progress # * LAVA-1536 - LAVA Server * LAVA-1823 - Provide support for Asian Languages (32.0%) * Did the following analysis and presented to the LAVA team during design discussion: * LAVA translation status * Unicode and non-unicode support * Consensus on some basic user defined inputs to support non-english characters * Came up with patches to support it without much code churn. * LAVA-1317 - lava-dispatcher maintenance * LAVA-1414 - LC: Linaro login integration with LAVA (36.0%) * A document was prepared with recommendations and sent to ARM team. * LAVA extension for login.linaro.org in progress. * LAVA-1536 - LAVA Server * LAVA-1622 - Create Charts with non-numeric build numbers (24.0%) * reviewed https://review.linaro.org/#/c/3623 * LAVA-1429 - Dispatcher Refactoring * LAVA-1401 - DF: Implement basic use cases for Panda, BBB (32.0%) * reviewed and merged https://review.linaro.org/#/c/4066/ # remi.duraffort(a)st.com Progress # * LAVA-1608 - General Team Items * LAVA-1611 - Remi's Bugs (100.0%) * Connect slides about umeq (understanding umeq design + first slides) # stevan.radakovic Progress # * LAVA-1608 - General Team Items * LAVA-1813 - LSK image reports migration (97.44%) * Added document to track changes. Created couple of reports as a working examples. * Migrate android armv8 reports. * Migrate juno reports. * Migrate arndale and vexpress image reports. * Grouping reports for multiple boards. * LAVA-1536 - LAVA Server * LAVA-1622 - Create Charts with non-numeric build numbers (2.56%) * Fix pep8 issues. # neil.williams(a)linaro.org Progress # * LAVA-1429 - Dispatcher Refactoring * LAVA-1804 - DF: Implement advanced use cases (100.0%) * First part of the port to similar support as the current dispatcher. # milo Progress # * LAVA-1511 - Upstream Kernel CI * LAVA-1811 - Frontend UI improvements/requests (29.63%) * Display builds and boots count on job details page. * Fixed js library to show only failed boot reports as default. * Added missing data to build view, created new boot view. * LAVA-1511 - Upstream Kernel CI * LAVA-1554 - [backend] Email notification system (11.11%) * Make the email trigger api accept the lab name. * LAVA-1511 - Upstream Kernel CI * LAVA-1815 - File upload API (59.26%) * Ran more tests locally and on staging, merged the code on master. * Deployed on production and spent time testing it on staging * Load tested staging and on a local instance **************** Team In-Progress **************** # georgy.redkozubov(a)linaro.org Plan # * LAVA-1817 - 1066 # milo.casagrande(a)linaro.org Plan # * LAVA-1651 - Health monitoring for components * LAVA-1554 - [backend] Email notification system * LAVA-1828 - Fix spacing issues with kernel names on boot view # neil.williams(a)linaro.org Plan # * LAVA-1806 - Port VMGroup support as secondary connections * LAVA-1827 - Extend Multinode for delayed start # remi.duraffort(a)linaro.org Plan # * LAVA-1784 - New device configuration * LAVA-1755 - ST boards support * LAVA-1680 - Factorize utils functions in a specific module * LAVA-1580 - Download Helper * LAVA-1577 - VCS Helper class # senthil.kumaran(a)linaro.org Plan # * LAVA-1823 - Provide support for extended charatersets * LAVA-1414 - LC: Linaro login integration with LAVA * LAVA-1832 - LAVA Extension for Linaro Login Service # stevan.radakovic(a)linaro.org Plan # * LAVA-1629 - 808 * LAVA-1598 - 330 * LAVA-1813 - LSK image reports migration # tyler.baker(a)linaro.org Plan # * LAVA-1792 - Tyler's Mentoring * LAVA-1819 - Draft Blog Post for Upstream Kernel CI Project * LAVA-1818 - Document Upstream Kernel CI Project on WIKI * LAVA-1830 - Implement file upload API in lava-ci * LAVA-1785 - Investigate and Integrate Member development board

11 years

[PATCH v3 Ceph] crc32c: add aarch64 optimized crc32c implementation

by Yazen Ghannam

ARMv8 defines a set of optional CRC32/CRC32C instructions. This patch defines an optimized function that uses these instructions when available rather than table-based lookup. Optimized function based on a Hadoop patch by Ed Nevill. Autotools updated to check for compiler support. Optimized function is selected at runtime based on HWCAP_CRC32. Added crc32c "performance" unit test and arch unit test. Tested on AMD Seattle. Passes all crc32c unit tests. Unit test shows ~4x performance increase versus sctp. Signed-off-by: Yazen Ghannam <yazen.ghannam(a)linaro.org> --- configure.ac | 1 + m4/ax_arm.m4 | 18 ++++++++++++++-- src/arch/arm.c | 2 ++ src/arch/arm.h | 1 + src/common/Makefile.am | 10 ++++++++- src/common/crc32c.cc | 6 ++++++ src/common/crc32c_aarch64.c | 47 ++++++++++++++++++++++++++++++++++++++++++ src/common/crc32c_aarch64.h | 27 ++++++++++++++++++++++++ src/test/common/test_crc32c.cc | 10 +++++++++ src/test/test_arch.cc | 14 +++++++++++++ 10 files changed, 133 insertions(+), 3 deletions(-) create mode 100644 src/common/crc32c_aarch64.c create mode 100644 src/common/crc32c_aarch64.h diff --git a/configure.ac b/configure.ac index d836b02..60e4feb 100644 --- a/configure.ac +++ b/configure.ac @@ -575,6 +575,7 @@ AC_LANG_POP([C++]) # Find supported SIMD / NEON / SSE extensions supported by the compiler AX_ARM_FEATURES() AM_CONDITIONAL(HAVE_NEON, [ test "x$ax_cv_support_neon_ext" = "xyes"]) +AM_CONDITIONAL(HAVE_ARMV8_CRC, [ test "x$ax_cv_support_crc_ext" = "xyes"]) AX_INTEL_FEATURES() AM_CONDITIONAL(HAVE_SSSE3, [ test "x$ax_cv_support_ssse3_ext" = "xyes"]) AM_CONDITIONAL(HAVE_SSE4_PCLMUL, [ test "x$ax_cv_support_pclmuldq_ext" = "xyes"]) diff --git a/m4/ax_arm.m4 b/m4/ax_arm.m4 index 2ccc9a9..37ea0aa 100644 --- a/m4/ax_arm.m4 +++ b/m4/ax_arm.m4 @@ -13,13 +13,27 @@ AC_DEFUN([AX_ARM_FEATURES], fi ;; aarch64*) + AX_CHECK_COMPILE_FLAG(-march=armv8-a, ax_cv_support_armv8=yes, []) + if test x"$ax_cv_support_armv8" = x"yes"; then + ARM_ARCH_FLAGS="-march=armv8-a" + ARM_DEFINE_FLAGS="-DARCH_AARCH64" + fi AX_CHECK_COMPILE_FLAG(-march=armv8-a+simd, ax_cv_support_neon_ext=yes, []) if test x"$ax_cv_support_neon_ext" = x"yes"; then + ARM_ARCH_FLAGS="$ARM_ARCH_FLAGS+simd" + ARM_DEFINE_FLAGS="$ARM_DEFINE_FLAGS -DARM_NEON" ARM_NEON_FLAGS="-march=armv8-a+simd -DARCH_AARCH64 -DARM_NEON" - AC_SUBST(ARM_NEON_FLAGS) - ARM_FLAGS="$ARM_FLAGS $ARM_NEON_FLAGS" AC_DEFINE(HAVE_NEON,,[Support NEON instructions]) + AC_SUBST(ARM_NEON_FLAGS) + fi + AX_CHECK_COMPILE_FLAG(-march=armv8-a+crc, ax_cv_support_crc_ext=yes, []) + if test x"$ax_cv_support_crc_ext" = x"yes"; then + ARM_ARCH_FLAGS="$ARM_ARCH_FLAGS+crc" + ARM_CRC_FLAGS="-march=armv8-a+crc -DARCH_AARCH64" + AC_DEFINE(HAVE_ARMV8_CRC,,[Support ARMv8 CRC instructions]) + AC_SUBST(ARM_CRC_FLAGS) fi + ARM_FLAGS="$ARM_ARCH_FLAGS $ARM_DEFINE_FLAGS" ;; esac diff --git a/src/arch/arm.c b/src/arch/arm.c index 93d079a..5a47e33 100644 --- a/src/arch/arm.c +++ b/src/arch/arm.c @@ -2,6 +2,7 @@ /* flags we export */ int ceph_arch_neon = 0; +int ceph_arch_aarch64_crc32 = 0; #include <stdio.h> @@ -47,6 +48,7 @@ int ceph_arch_arm_probe(void) ceph_arch_neon = (get_hwcap() & HWCAP_NEON) == HWCAP_NEON; #elif __aarch64__ && __linux__ ceph_arch_neon = (get_hwcap() & HWCAP_ASIMD) == HWCAP_ASIMD; + ceph_arch_aarch64_crc32 = (get_hwcap() & HWCAP_CRC32) == HWCAP_CRC32; #else if (0) get_hwcap(); // make compiler shut up diff --git a/src/arch/arm.h b/src/arch/arm.h index f613438..1659b2e 100644 --- a/src/arch/arm.h +++ b/src/arch/arm.h @@ -6,6 +6,7 @@ extern "C" { #endif extern int ceph_arch_neon; /* true if we have ARM NEON or ASIMD abilities */ +extern int ceph_arch_aarch64_crc32; /* true if we have AArch64 CRC32/CRC32C abilities */ extern int ceph_arch_arm_probe(void); diff --git a/src/common/Makefile.am b/src/common/Makefile.am index 2888194..37d1404 100644 --- a/src/common/Makefile.am +++ b/src/common/Makefile.am @@ -112,11 +112,19 @@ endif LIBCOMMON_DEPS += libcommon_crc.la noinst_LTLIBRARIES += libcommon_crc.la +if HAVE_ARMV8_CRC +libcommon_crc_aarch64_la_SOURCES = common/crc32c_aarch64.c +libcommon_crc_aarch64_la_CFLAGS = $(AM_CFLAGS) $(ARM_CRC_FLAGS) +LIBCOMMON_DEPS += libcommon_crc_aarch64.la +noinst_LTLIBRARIES += libcommon_crc_aarch64.la +endif + noinst_HEADERS += \ common/bloom_filter.hpp \ common/sctp_crc32.h \ common/crc32c_intel_baseline.h \ - common/crc32c_intel_fast.h + common/crc32c_intel_fast.h \ + common/crc32c_aarch64.h # important; libmsg before libauth! diff --git a/src/common/crc32c.cc b/src/common/crc32c.cc index e2e81a4..45432f5 100644 --- a/src/common/crc32c.cc +++ b/src/common/crc32c.cc @@ -5,9 +5,11 @@ #include "arch/probe.h" #include "arch/intel.h" +#include "arch/arm.h" #include "common/sctp_crc32.h" #include "common/crc32c_intel_baseline.h" #include "common/crc32c_intel_fast.h" +#include "common/crc32c_aarch64.h" /* * choose best implementation based on the CPU architecture. @@ -24,6 +26,10 @@ ceph_crc32c_func_t ceph_choose_crc32(void) return ceph_crc32c_intel_fast; } + if (ceph_arch_aarch64_crc32){ + return ceph_crc32c_aarch64; + } + // default return ceph_crc32c_sctp; } diff --git a/src/common/crc32c_aarch64.c b/src/common/crc32c_aarch64.c new file mode 100644 index 0000000..d33827d --- /dev/null +++ b/src/common/crc32c_aarch64.c @@ -0,0 +1,47 @@ +#include "acconfig.h" +#include "include/int_types.h" +#include "common/crc32c_aarch64.h" + +#define CRC32CX(crc, value) __asm__("crc32cx %w[c], %w[c], %x[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CW(crc, value) __asm__("crc32cw %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CH(crc, value) __asm__("crc32ch %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CB(crc, value) __asm__("crc32cb %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) + +uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned len) +{ + int64_t length = len; + + if (!buffer) { + + while ((length -= sizeof(uint64_t)) >= 0) + CRC32CX(crc, 0); + + /* The following is more efficient than the straight loop */ + if (length & sizeof(uint32_t)) + CRC32CW(crc, 0); + + if (length & sizeof(uint16_t)) + CRC32CH(crc, 0); + + if (length & sizeof(uint8_t)) + CRC32CB(crc, 0); + } else { + while ((length -= sizeof(uint64_t)) >= 0) { + CRC32CX(crc, *(uint64_t *)buffer); + buffer += sizeof(uint64_t); + } + + /* The following is more efficient than the straight loop */ + if (length & sizeof(uint32_t)) { + CRC32CW(crc, *(uint32_t *)buffer); + buffer += sizeof(uint32_t); + } + if (length & sizeof(uint16_t)) { + CRC32CH(crc, *(uint16_t *)buffer); + buffer += sizeof(uint16_t); + } + if (length & sizeof(uint8_t)) + CRC32CB(crc, *buffer); + } + return crc; +} diff --git a/src/common/crc32c_aarch64.h b/src/common/crc32c_aarch64.h new file mode 100644 index 0000000..3727f54 --- /dev/null +++ b/src/common/crc32c_aarch64.h @@ -0,0 +1,27 @@ +#ifndef CEPH_COMMON_CRC32C_AARCH64_H +#define CEPH_COMMON_CRC32C_AARCH64_H + +#include "arch/arm.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef HAVE_ARMV8_CRC + +extern uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned len); + +#else + +static inline uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned len) +{ + return 0; +} + +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/test/common/test_crc32c.cc b/src/test/common/test_crc32c.cc index b4297c6..527f115 100644 --- a/src/test/common/test_crc32c.cc +++ b/src/test/common/test_crc32c.cc @@ -13,6 +13,7 @@ #include "common/sctp_crc32.h" #include "common/crc32c_intel_baseline.h" +#include "common/crc32c_aarch64.h" TEST(Crc32c, Small) { const char *a = "foo bar baz"; @@ -80,6 +81,15 @@ TEST(Crc32c, Performance) { std::cout << "intel baseline = " << rate << " MB/sec" << std::endl; ASSERT_EQ(261108528u, val); } + if (ceph_arch_aarch64_crc32) // Skip if CRC32C instructions are not defined. + { + utime_t start = ceph_clock_now(NULL); + unsigned val = ceph_crc32c_aarch64(0, (unsigned char *)a, len); + utime_t end = ceph_clock_now(NULL); + float rate = (float)len / (float)(1024*1024) / (float)(end - start); + std::cout << "aarch64 baseline = " << rate << " MB/sec" << std::endl; + ASSERT_EQ(261108528u, val); + } } diff --git a/src/test/test_arch.cc b/src/test/test_arch.cc index b129262..e2c225b 100644 --- a/src/test/test_arch.cc +++ b/src/test/test_arch.cc @@ -47,9 +47,20 @@ TEST(Arch, all) int expected; +#if (__arm__ || __aarch64__) + expected = (strstr(flags, " neon ") || strstr(flags, " asimd ")) ? 1 : 0; EXPECT_EQ(expected, ceph_arch_neon); +#endif +#if (__aarch64__) + + expected = strstr(flags, " crc32 ") ? 1 : 0; + EXPECT_EQ(expected, ceph_arch_aarch64_crc32); + +#endif +#if (__x86_64__) + expected = strstr(flags, " pclmulqdq ") ? 1 : 0; EXPECT_EQ(expected, ceph_arch_intel_pclmul); @@ -67,6 +78,9 @@ TEST(Arch, all) expected = strstr(flags, " sse2 ") ? 1 : 0; EXPECT_EQ(expected, ceph_arch_intel_sse2); + +#endif + #endif } -- 2.1.0

11 years

[PATCH v2 Ceph] crc32c: add aarch64 optimized crc32c implementation

by Yazen Ghannam

ARMv8 defines a set of optional CRC32/CRC32C instructions. This patch defines an optimized function that uses these instructions when available rather than table-based lookup. Optimized function based on a Hadoop patch by Ed Nevill. Autotools updated to check for compiler support. Optimized function is selected at runtime based on HWCAP_CRC32. Added crc32c "performance" unit test and arch unit test. Tested on AMD Seattle. Passes all crc32c unit tests. Unit test shows ~4x performance increase versus sctp. Signed-off-by: Yazen Ghannam <yazen.ghannam(a)linaro.org> --- configure.ac | 1 + m4/ax_arm.m4 | 18 +++++++++++-- src/arch/arm.c | 2 ++ src/arch/arm.h | 1 + src/common/Makefile.am | 10 +++++++- src/common/crc32c.cc | 6 +++++ src/common/crc32c_aarch64.c | 58 ++++++++++++++++++++++++++++++++++++++++++ src/common/crc32c_aarch64.h | 25 ++++++++++++++++++ src/test/common/test_crc32c.cc | 11 ++++++++ src/test/test_arch.cc | 3 +++ 10 files changed, 132 insertions(+), 3 deletions(-) create mode 100644 src/common/crc32c_aarch64.c create mode 100644 src/common/crc32c_aarch64.h diff --git a/configure.ac b/configure.ac index d836b02..60e4feb 100644 --- a/configure.ac +++ b/configure.ac @@ -575,6 +575,7 @@ AC_LANG_POP([C++]) # Find supported SIMD / NEON / SSE extensions supported by the compiler AX_ARM_FEATURES() AM_CONDITIONAL(HAVE_NEON, [ test "x$ax_cv_support_neon_ext" = "xyes"]) +AM_CONDITIONAL(HAVE_ARMV8_CRC, [ test "x$ax_cv_support_crc_ext" = "xyes"]) AX_INTEL_FEATURES() AM_CONDITIONAL(HAVE_SSSE3, [ test "x$ax_cv_support_ssse3_ext" = "xyes"]) AM_CONDITIONAL(HAVE_SSE4_PCLMUL, [ test "x$ax_cv_support_pclmuldq_ext" = "xyes"]) diff --git a/m4/ax_arm.m4 b/m4/ax_arm.m4 index 2ccc9a9..37ea0aa 100644 --- a/m4/ax_arm.m4 +++ b/m4/ax_arm.m4 @@ -13,13 +13,27 @@ AC_DEFUN([AX_ARM_FEATURES], fi ;; aarch64*) + AX_CHECK_COMPILE_FLAG(-march=armv8-a, ax_cv_support_armv8=yes, []) + if test x"$ax_cv_support_armv8" = x"yes"; then + ARM_ARCH_FLAGS="-march=armv8-a" + ARM_DEFINE_FLAGS="-DARCH_AARCH64" + fi AX_CHECK_COMPILE_FLAG(-march=armv8-a+simd, ax_cv_support_neon_ext=yes, []) if test x"$ax_cv_support_neon_ext" = x"yes"; then + ARM_ARCH_FLAGS="$ARM_ARCH_FLAGS+simd" + ARM_DEFINE_FLAGS="$ARM_DEFINE_FLAGS -DARM_NEON" ARM_NEON_FLAGS="-march=armv8-a+simd -DARCH_AARCH64 -DARM_NEON" - AC_SUBST(ARM_NEON_FLAGS) - ARM_FLAGS="$ARM_FLAGS $ARM_NEON_FLAGS" AC_DEFINE(HAVE_NEON,,[Support NEON instructions]) + AC_SUBST(ARM_NEON_FLAGS) + fi + AX_CHECK_COMPILE_FLAG(-march=armv8-a+crc, ax_cv_support_crc_ext=yes, []) + if test x"$ax_cv_support_crc_ext" = x"yes"; then + ARM_ARCH_FLAGS="$ARM_ARCH_FLAGS+crc" + ARM_CRC_FLAGS="-march=armv8-a+crc -DARCH_AARCH64" + AC_DEFINE(HAVE_ARMV8_CRC,,[Support ARMv8 CRC instructions]) + AC_SUBST(ARM_CRC_FLAGS) fi + ARM_FLAGS="$ARM_ARCH_FLAGS $ARM_DEFINE_FLAGS" ;; esac diff --git a/src/arch/arm.c b/src/arch/arm.c index 93d079a..5a47e33 100644 --- a/src/arch/arm.c +++ b/src/arch/arm.c @@ -2,6 +2,7 @@ /* flags we export */ int ceph_arch_neon = 0; +int ceph_arch_aarch64_crc32 = 0; #include <stdio.h> @@ -47,6 +48,7 @@ int ceph_arch_arm_probe(void) ceph_arch_neon = (get_hwcap() & HWCAP_NEON) == HWCAP_NEON; #elif __aarch64__ && __linux__ ceph_arch_neon = (get_hwcap() & HWCAP_ASIMD) == HWCAP_ASIMD; + ceph_arch_aarch64_crc32 = (get_hwcap() & HWCAP_CRC32) == HWCAP_CRC32; #else if (0) get_hwcap(); // make compiler shut up diff --git a/src/arch/arm.h b/src/arch/arm.h index f613438..1659b2e 100644 --- a/src/arch/arm.h +++ b/src/arch/arm.h @@ -6,6 +6,7 @@ extern "C" { #endif extern int ceph_arch_neon; /* true if we have ARM NEON or ASIMD abilities */ +extern int ceph_arch_aarch64_crc32; /* true if we have AArch64 CRC32/CRC32C abilities */ extern int ceph_arch_arm_probe(void); diff --git a/src/common/Makefile.am b/src/common/Makefile.am index 2888194..37d1404 100644 --- a/src/common/Makefile.am +++ b/src/common/Makefile.am @@ -112,11 +112,19 @@ endif LIBCOMMON_DEPS += libcommon_crc.la noinst_LTLIBRARIES += libcommon_crc.la +if HAVE_ARMV8_CRC +libcommon_crc_aarch64_la_SOURCES = common/crc32c_aarch64.c +libcommon_crc_aarch64_la_CFLAGS = $(AM_CFLAGS) $(ARM_CRC_FLAGS) +LIBCOMMON_DEPS += libcommon_crc_aarch64.la +noinst_LTLIBRARIES += libcommon_crc_aarch64.la +endif + noinst_HEADERS += \ common/bloom_filter.hpp \ common/sctp_crc32.h \ common/crc32c_intel_baseline.h \ - common/crc32c_intel_fast.h + common/crc32c_intel_fast.h \ + common/crc32c_aarch64.h # important; libmsg before libauth! diff --git a/src/common/crc32c.cc b/src/common/crc32c.cc index e2e81a4..45432f5 100644 --- a/src/common/crc32c.cc +++ b/src/common/crc32c.cc @@ -5,9 +5,11 @@ #include "arch/probe.h" #include "arch/intel.h" +#include "arch/arm.h" #include "common/sctp_crc32.h" #include "common/crc32c_intel_baseline.h" #include "common/crc32c_intel_fast.h" +#include "common/crc32c_aarch64.h" /* * choose best implementation based on the CPU architecture. @@ -24,6 +26,10 @@ ceph_crc32c_func_t ceph_choose_crc32(void) return ceph_crc32c_intel_fast; } + if (ceph_arch_aarch64_crc32){ + return ceph_crc32c_aarch64; + } + // default return ceph_crc32c_sctp; } diff --git a/src/common/crc32c_aarch64.c b/src/common/crc32c_aarch64.c new file mode 100644 index 0000000..a7f8341 --- /dev/null +++ b/src/common/crc32c_aarch64.c @@ -0,0 +1,58 @@ +#include "acconfig.h" +#include "include/int_types.h" +#include "common/crc32c_aarch64.h" + +#ifdef HAVE_ARMV8_CRC + +#define CRC32CX(crc, value) __asm__("crc32cx %w[c], %w[c], %x[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CW(crc, value) __asm__("crc32cw %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CH(crc, value) __asm__("crc32ch %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CB(crc, value) __asm__("crc32cb %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) + +uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned len) +{ + int64_t length = len; + + if (!buffer) { + + while ((length -= sizeof(uint64_t)) >= 0) + CRC32CX(crc, 0); + + /* The following is more efficient than the straight loop */ + if (length & sizeof(uint32_t)) + CRC32CW(crc, 0); + + if (length & sizeof(uint16_t)) + CRC32CH(crc, 0); + + if (length & sizeof(uint8_t)) + CRC32CB(crc, 0); + } else { + while ((length -= sizeof(uint64_t)) >= 0) { + CRC32CX(crc, *(uint64_t *)buffer); + buffer += sizeof(uint64_t); + } + + /* The following is more efficient than the straight loop */ + if (length & sizeof(uint32_t)) { + CRC32CW(crc, *(uint32_t *)buffer); + buffer += sizeof(uint32_t); + } + if (length & sizeof(uint16_t)) { + CRC32CH(crc, *(uint16_t *)buffer); + buffer += sizeof(uint16_t); + } + if (length & sizeof(uint8_t)) + CRC32CB(crc, *buffer); + } + return crc; +} + +#else + +uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned len) +{ + return 0; +} + +#endif diff --git a/src/common/crc32c_aarch64.h b/src/common/crc32c_aarch64.h new file mode 100644 index 0000000..8088578 --- /dev/null +++ b/src/common/crc32c_aarch64.h @@ -0,0 +1,25 @@ +#ifndef CEPH_COMMON_CRC32C_AARCH64_H +#define CEPH_COMMON_CRC32C_AARCH64_H + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef HAVE_ARMV8_CRC + +extern uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned len); + +#else + +static inline uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned len) +{ + return 0; +} + +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/test/common/test_crc32c.cc b/src/test/common/test_crc32c.cc index b4297c6..2e0ecf8 100644 --- a/src/test/common/test_crc32c.cc +++ b/src/test/common/test_crc32c.cc @@ -13,6 +13,7 @@ #include "common/sctp_crc32.h" #include "common/crc32c_intel_baseline.h" +#include "common/crc32c_aarch64.h" TEST(Crc32c, Small) { const char *a = "foo bar baz"; @@ -80,6 +81,16 @@ TEST(Crc32c, Performance) { std::cout << "intel baseline = " << rate << " MB/sec" << std::endl; ASSERT_EQ(261108528u, val); } +#ifdef HAVE_ARMV8_CRC + { + utime_t start = ceph_clock_now(NULL); + unsigned val = ceph_crc32c_aarch64(0, (unsigned char *)a, len); + utime_t end = ceph_clock_now(NULL); + float rate = (float)len / (float)(1024*1024) / (float)(end - start); + std::cout << "aarch64 baseline = " << rate << " MB/sec" << std::endl; + ASSERT_EQ(261108528u, val); + } +#endif } diff --git a/src/test/test_arch.cc b/src/test/test_arch.cc index b129262..27cdd1d 100644 --- a/src/test/test_arch.cc +++ b/src/test/test_arch.cc @@ -50,6 +50,9 @@ TEST(Arch, all) expected = (strstr(flags, " neon ") || strstr(flags, " asimd ")) ? 1 : 0; EXPECT_EQ(expected, ceph_arch_neon); + expected = strstr(flags, " crc32 ") ? 1 : 0; + EXPECT_EQ(expected, ceph_arch_aarch64_crc32); + expected = strstr(flags, " pclmulqdq ") ? 1 : 0; EXPECT_EQ(expected, ceph_arch_intel_pclmul); -- 2.2.1

11 years

[PATCH Ceph] crc32c: add arm64/aarch64 optimized crc32c implementation

by Yazen Ghannam

Tested on AMD Seattle. Passes all crc32c unit tests. ~4x performance increase versus sctp. Signed-off-by: Yazen Ghannam <yazen.ghannam(a)linaro.org> --- configure.ac | 1 + m4/ax_arm.m4 | 18 +++++++++++++--- src/arch/arm.c | 2 ++ src/arch/arm.h | 1 + src/common/Makefile.am | 11 ++++++++-- src/common/crc32c.cc | 6 ++++++ src/common/crc32c_arm64.c | 48 ++++++++++++++++++++++++++++++++++++++++++ src/common/crc32c_arm64.h | 25 ++++++++++++++++++++++ src/test/common/test_crc32c.cc | 9 ++++++++ 9 files changed, 116 insertions(+), 5 deletions(-) create mode 100644 src/common/crc32c_arm64.c create mode 100644 src/common/crc32c_arm64.h diff --git a/configure.ac b/configure.ac index d836b02..60e4feb 100644 --- a/configure.ac +++ b/configure.ac @@ -575,6 +575,7 @@ AC_LANG_POP([C++]) # Find supported SIMD / NEON / SSE extensions supported by the compiler AX_ARM_FEATURES() AM_CONDITIONAL(HAVE_NEON, [ test "x$ax_cv_support_neon_ext" = "xyes"]) +AM_CONDITIONAL(HAVE_ARMV8_CRC, [ test "x$ax_cv_support_crc_ext" = "xyes"]) AX_INTEL_FEATURES() AM_CONDITIONAL(HAVE_SSSE3, [ test "x$ax_cv_support_ssse3_ext" = "xyes"]) AM_CONDITIONAL(HAVE_SSE4_PCLMUL, [ test "x$ax_cv_support_pclmuldq_ext" = "xyes"]) diff --git a/m4/ax_arm.m4 b/m4/ax_arm.m4 index 2ccc9a9..4ef8081 100644 --- a/m4/ax_arm.m4 +++ b/m4/ax_arm.m4 @@ -13,13 +13,25 @@ AC_DEFUN([AX_ARM_FEATURES], fi ;; aarch64*) + AX_CHECK_COMPILE_FLAG(-march=armv8-a, ax_cv_support_armv8=yes, []) + if test x"$ax_cv_support_armv8" = x"yes"; then + ARM_ARCH_FLAGS="-march=armv8-a" + ARM_DEFINE_FLAGS="-DARCH_AARCH64" + fi AX_CHECK_COMPILE_FLAG(-march=armv8-a+simd, ax_cv_support_neon_ext=yes, []) if test x"$ax_cv_support_neon_ext" = x"yes"; then - ARM_NEON_FLAGS="-march=armv8-a+simd -DARCH_AARCH64 -DARM_NEON" - AC_SUBST(ARM_NEON_FLAGS) - ARM_FLAGS="$ARM_FLAGS $ARM_NEON_FLAGS" + ARM_ARCH_FLAGS="$ARM_ARCH_FLAGS+simd" + ARM_DEFINE_FLAGS="$ARM_DEFINE_FLAGS -DARM_NEON" AC_DEFINE(HAVE_NEON,,[Support NEON instructions]) fi + AX_CHECK_COMPILE_FLAG(-march=armv8-a+crc, ax_cv_support_crc_ext=yes, []) + if test x"$ax_cv_support_crc_ext" = x"yes"; then + ARM_ARCH_FLAGS="$ARM_ARCH_FLAGS+crc" + AC_DEFINE(HAVE_ARMV8_CRC,,[Support ARMv8 CRC instructions]) + fi + ARM_NEON_FLAGS="$ARM_ARCH_FLAGS $ARM_DEFINE_FLAGS" + AC_SUBST(ARM_NEON_FLAGS) + ARM_FLAGS="$ARM_FLAGS $ARM_NEON_FLAGS" ;; esac diff --git a/src/arch/arm.c b/src/arch/arm.c index 93d079a..2ea97eb 100644 --- a/src/arch/arm.c +++ b/src/arch/arm.c @@ -2,6 +2,7 @@ /* flags we export */ int ceph_arch_neon = 0; +int ceph_arch_arm64_crc32 = 0; #include <stdio.h> @@ -47,6 +48,7 @@ int ceph_arch_arm_probe(void) ceph_arch_neon = (get_hwcap() & HWCAP_NEON) == HWCAP_NEON; #elif __aarch64__ && __linux__ ceph_arch_neon = (get_hwcap() & HWCAP_ASIMD) == HWCAP_ASIMD; + ceph_arch_arm64_crc32 = (get_hwcap() & HWCAP_CRC32) == HWCAP_CRC32; #else if (0) get_hwcap(); // make compiler shut up diff --git a/src/arch/arm.h b/src/arch/arm.h index f613438..4ac716a 100644 --- a/src/arch/arm.h +++ b/src/arch/arm.h @@ -6,6 +6,7 @@ extern "C" { #endif extern int ceph_arch_neon; /* true if we have ARM NEON or ASIMD abilities */ +extern int ceph_arch_arm64_crc32; /* true if we have Aarch64 CRC32/CRC32C abilities */ extern int ceph_arch_arm_probe(void); diff --git a/src/common/Makefile.am b/src/common/Makefile.am index 2888194..4c36216 100644 --- a/src/common/Makefile.am +++ b/src/common/Makefile.am @@ -103,12 +103,18 @@ libcommon_crc_la_SOURCES = \ common/sctp_crc32.c \ common/crc32c.cc \ common/crc32c_intel_baseline.c \ - common/crc32c_intel_fast.c + common/crc32c_intel_fast.c \ + common/crc32c_arm64.c if WITH_GOOD_YASM_ELF64 libcommon_crc_la_SOURCES += common/crc32c_intel_fast_asm.S common/crc32c_intel_fast_zero_asm.S libcommon_crc_la_LIBTOOLFLAGS = --tag=CC endif + +if HAVE_ARMV8_CRC +libcommon_crc_la_CFLAGS = $(AM_CFLAGS) $(ARM_FLAGS) +endif + LIBCOMMON_DEPS += libcommon_crc.la noinst_LTLIBRARIES += libcommon_crc.la @@ -116,7 +122,8 @@ noinst_HEADERS += \ common/bloom_filter.hpp \ common/sctp_crc32.h \ common/crc32c_intel_baseline.h \ - common/crc32c_intel_fast.h + common/crc32c_intel_fast.h \ + common/crc32c_arm64.h # important; libmsg before libauth! diff --git a/src/common/crc32c.cc b/src/common/crc32c.cc index e2e81a4..540d431 100644 --- a/src/common/crc32c.cc +++ b/src/common/crc32c.cc @@ -5,9 +5,11 @@ #include "arch/probe.h" #include "arch/intel.h" +#include "arch/arm.h" #include "common/sctp_crc32.h" #include "common/crc32c_intel_baseline.h" #include "common/crc32c_intel_fast.h" +#include "common/crc32c_arm64.h" /* * choose best implementation based on the CPU architecture. @@ -24,6 +26,10 @@ ceph_crc32c_func_t ceph_choose_crc32(void) return ceph_crc32c_intel_fast; } + if (ceph_arch_arm64_crc32){ + return ceph_crc32c_arm64; + } + // default return ceph_crc32c_sctp; } diff --git a/src/common/crc32c_arm64.c b/src/common/crc32c_arm64.c new file mode 100644 index 0000000..6a754fb --- /dev/null +++ b/src/common/crc32c_arm64.c @@ -0,0 +1,48 @@ +#include "acconfig.h" +#include "include/int_types.h" +#include "common/crc32c_arm64.h" + +#define CRC32CX(crc, value) __asm__("crc32cx %w[c], %w[c], %x[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CW(crc, value) __asm__("crc32cw %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CH(crc, value) __asm__("crc32ch %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) +#define CRC32CB(crc, value) __asm__("crc32cb %w[c], %w[c], %w[v]":[c]"+r"(crc):[v]"r"(value)) + +uint32_t ceph_crc32c_arm64(uint32_t crc, unsigned char const *buffer, unsigned len) +{ + int64_t length = len; + + if (!buffer) { + + while ((length -= sizeof(uint64_t)) >= 0) + CRC32CX(crc, 0); + + /* The following is more efficient than the straight loop */ + if (length & sizeof(uint32_t)) + CRC32CW(crc, 0); + + if (length & sizeof(uint16_t)) + CRC32CH(crc, 0); + + if (length & sizeof(uint8_t)) + CRC32CB(crc, 0); + } else { + while ((length -= sizeof(uint64_t)) >= 0) { + CRC32CX(crc, *(uint64_t *)buffer); + buffer += sizeof(uint64_t); + } + + /* The following is more efficient than the straight loop */ + if (length & sizeof(uint32_t)) { + CRC32CW(crc, *(uint32_t *)buffer); + buffer += sizeof(uint32_t); + } + if (length & sizeof(uint16_t)) { + CRC32CH(crc, *(uint16_t *)buffer); + buffer += sizeof(uint16_t); + } + if (length & sizeof(uint8_t)) + CRC32CB(crc, *buffer); + } + return crc; +} + diff --git a/src/common/crc32c_arm64.h b/src/common/crc32c_arm64.h new file mode 100644 index 0000000..100b5e4 --- /dev/null +++ b/src/common/crc32c_arm64.h @@ -0,0 +1,25 @@ +#ifndef CEPH_COMMON_CRC32C_ARM64_H +#define CEPH_COMMON_CRC32C_ARM64_H + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __aarch64__ + +extern uint32_t ceph_crc32c_arm64(uint32_t crc, unsigned char const *buffer, unsigned len); + +#else + +static inline uint32_t ceph_crc32c_arm64(uint32_t crc, unsigned char const *buffer, unsigned len) +{ + return 0; +} + +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/test/common/test_crc32c.cc b/src/test/common/test_crc32c.cc index b4297c6..1a9b2e2 100644 --- a/src/test/common/test_crc32c.cc +++ b/src/test/common/test_crc32c.cc @@ -13,6 +13,7 @@ #include "common/sctp_crc32.h" #include "common/crc32c_intel_baseline.h" +#include "common/crc32c_arm64.h" TEST(Crc32c, Small) { const char *a = "foo bar baz"; @@ -80,6 +81,14 @@ TEST(Crc32c, Performance) { std::cout << "intel baseline = " << rate << " MB/sec" << std::endl; ASSERT_EQ(261108528u, val); } + { + utime_t start = ceph_clock_now(NULL); + unsigned val = ceph_crc32c_arm64(0, (unsigned char *)a, len); + utime_t end = ceph_clock_now(NULL); + float rate = (float)len / (float)(1024*1024) / (float)(end - start); + std::cout << "arm64 baseline = " << rate << " MB/sec" << std::endl; + ASSERT_EQ(261108528u, val); + } } -- 2.2.0

11 years

[meta-linaro 0/2] add support to boot from qemu for genericarmv8

by Kevin Hao

Hi, With these two patches, I can boot the genericarmv8 kernel from qemu with the following command: ./tmp-glibc/sysroots/x86_64-linux/usr/bin/qemu-system-aarch64 -kernel ./tmp-glibc/deploy/images/genericarmv8/Image-genericarmv8.bin -machine virt -cpu cortex-a57 -drive id=disk0,file=./tmp-glibc/deploy/images/genericarmv8/linaro-image-minimal-genericarmv8.ext3 -device virtio-blk-device,drive=disk0 -nographic -no-reboot -m 512 --append "root=/dev/vda rw console=ttyAMA0,38400 mem=512M highres=off ip=192.168.7.2::192.168.7.1:255.255.255.0 " Kevin Hao (2): qemu: drop it to use the one in oe-core genericarmv8: add the support for boot from qemu meta-aarch64/conf/machine/genericarmv8.conf | 4 + .../3f08ffb4a4741d147634761dc053ed386243a0de.patch | 42 ----------- .../qemu/files/enable-i386-linux-user.patch | 55 -------------- .../recipes-devtools/qemu/files/fdt_header.patch | 39 ---------- .../fix-libcap-header-issue-on-some-distro.patch | 84 --------------------- .../recipes-devtools/qemu/files/init-info.patch | 18 ----- .../qemu/files/larger_default_ram_size.patch | 22 ------ .../recipes-devtools/qemu/files/no-strip.patch | 15 ---- .../recipes-devtools/qemu/files/powerpc_rom.bin | Bin 4096 -> 0 bytes .../qemu/files/relocatable_sdk.patch | 34 --------- ...-Fix-aflag-logic-for-CODE64-and-the-0x67-.patch | 79 ------------------- .../qemu/files/target-ppc_fix_bit_extraction.patch | 70 ----------------- meta-linaro/recipes-devtools/qemu/qemu_git.bb | 25 ------ 13 files changed, 4 insertions(+), 483 deletions(-) delete mode 100644 meta-linaro/recipes-devtools/qemu/files/3f08ffb4a4741d147634761dc053ed386243a0de.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/enable-i386-linux-user.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/fdt_header.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/fix-libcap-header-issue-on-some-distro.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/init-info.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/larger_default_ram_size.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/no-strip.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/powerpc_rom.bin delete mode 100644 meta-linaro/recipes-devtools/qemu/files/relocatable_sdk.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/target-i386-Fix-aflag-logic-for-CODE64-and-the-0x67-.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/files/target-ppc_fix_bit_extraction.patch delete mode 100644 meta-linaro/recipes-devtools/qemu/qemu_git.bb -- 1.9.3

11 years

[PATCH PM-QA 00/18] Removing bashisms and other cleanups

by Lisa Nguyen

[ It's been long overdue and PM-QA gets a makeover... ] This patchset primarily fixes Linaro Bug# 772 (https://bugs.linaro.org/show_bug.cgi?id=772) to remove bashisms in all PM-QA scripts. These scripts will run on Android, Openembedded, and Ubuntu. Cleanups have been done to remove redundant code, improve readability, and resolve syntax errors that were not detected before. Next steps: Once this patchset has been reviewed and acked, the following steps will be taken: 1. Submit a patch to update the release tag on the pwrmgmt test definitions to pm-qa-v0.5.0 2. Submit a patch to update the pm-qa script (https://git.linaro.org/qa/test-definitions.git/blob/HEAD:/common/scripts/pm…) used to run PM-QA on Android by removing unnecessary busybox sym links and replace suspend test module with thermal in directory list. 3. Investigate further on why pandaboards do not like the cpuidle_03 test case. Comments and/or questions are highly encouraged. Lisa Nguyen (18): functions: Remove bashisms in function scripts cpuidle: Remove bashisms in cpuidle test module cputopology: Remove bashisms in cputopology test module cpufreq: Remove bashisms in cpufreq test module thermal: Remove bashisms in thermal test module cpuhotplug: Remove bashisms in cpuhotplug scripts suspend: Remove bashisms in suspend test module utils: Remove bashisms in utils_sanity.sh powertop: Remove bashisms in powertop test module Test.mk: Add sort function Switches: Export hotplug_allow_cpu0 Add cputopology_sanity script cpuhotplug: Rename 1_sanity_check.sh to cpuhotplug_00.sh cpuhotplug: Rename z_sanity_check.sh to cpuhotplug_09.sh Add descriptions for cpuhotplug_00.sh and cpuhotplug_09.sh Switches: Remove thermal_try_max variable cpufreq: Rewrite logic to check for userspace and powersave governors Android.mk: Update test numbers and remove whitespace Switches.sh | 6 +- Test.mk | 4 +- cpufreq/Android.mk | 2 +- cpufreq/cpufreq_01.sh | 4 +- cpufreq/cpufreq_02.sh | 5 +- cpufreq/cpufreq_03.sh | 13 +- cpufreq/cpufreq_04.sh | 16 ++- cpufreq/cpufreq_05.sh | 24 ++-- cpufreq/cpufreq_06.sh | 59 ++++----- cpufreq/cpufreq_07.sh | 48 ++++--- cpufreq/cpufreq_08.sh | 31 ++--- cpufreq/cpufreq_09.sh | 27 ++-- cpufreq/cpufreq_sanity.sh | 9 +- cpuhotplug/1_sanity_check.sh | 40 ------ cpuhotplug/1_sanity_check.txt | 1 - cpuhotplug/Android.mk | 18 +-- cpuhotplug/cpuhotplug_00.sh | 39 ++++++ cpuhotplug/cpuhotplug_00.txt | 1 + cpuhotplug/cpuhotplug_01.sh | 5 +- cpuhotplug/cpuhotplug_02.sh | 21 ++-- cpuhotplug/cpuhotplug_03.sh | 15 ++- cpuhotplug/cpuhotplug_04.sh | 21 ++-- cpuhotplug/cpuhotplug_05.sh | 13 +- cpuhotplug/cpuhotplug_06.sh | 16 ++- cpuhotplug/cpuhotplug_07.sh | 17 ++- cpuhotplug/cpuhotplug_08.sh | 23 ++-- cpuhotplug/cpuhotplug_09.sh | 39 ++++++ cpuhotplug/cpuhotplug_09.txt | 1 + cpuhotplug/cpuhotplug_sanity.sh | 5 +- cpuhotplug/z_sanity_check.sh | 40 ------ cpuhotplug/z_sanity_check.txt | 1 - cpuidle/Android.mk | 4 +- cpuidle/cpuidle_01.sh | 21 ++-- cpuidle/cpuidle_02.sh | 7 +- cpuidle/cpuidle_03.sh | 17 ++- cpuidle/cpuidle_sanity.sh | 9 +- cputopology/Android.mk | 2 +- cputopology/cputopology_01.sh | 9 +- cputopology/cputopology_02.sh | 5 +- cputopology/cputopology_sanity.sh | 49 ++++++++ include/functions.sh | 248 +++++++++++++++++-------------------- include/suspend_functions.sh | 24 ++-- include/thermal_functions.sh | 219 ++++++++++++++++---------------- powertop/powertop_01.sh | 19 ++- powertop/powertop_sanity.sh | 8 +- suspend/suspend_01.sh | 9 +- suspend/suspend_02.sh | 9 +- suspend/suspend_03.sh | 9 +- suspend/suspend_04.sh | 11 +- suspend/suspend_05.sh | 11 +- suspend/suspend_sanity.sh | 4 +- thermal/thermal_00.sh | 22 ++-- thermal/thermal_01.sh | 39 +++--- thermal/thermal_02.sh | 36 +++--- thermal/thermal_03.sh | 18 +-- thermal/thermal_04.sh | 37 +++--- thermal/thermal_05.sh | 30 ++--- thermal/thermal_06.sh | 92 +++++++------- thermal/thermal_sanity.sh | 7 +- utils/utils_sanity.sh | 4 +- 60 files changed, 759 insertions(+), 784 deletions(-) delete mode 100755 cpuhotplug/1_sanity_check.sh delete mode 100644 cpuhotplug/1_sanity_check.txt create mode 100755 cpuhotplug/cpuhotplug_00.sh create mode 100644 cpuhotplug/cpuhotplug_00.txt create mode 100755 cpuhotplug/cpuhotplug_09.sh create mode 100644 cpuhotplug/cpuhotplug_09.txt delete mode 100755 cpuhotplug/z_sanity_check.sh delete mode 100644 cpuhotplug/z_sanity_check.txt create mode 100755 cputopology/cputopology_sanity.sh -- 1.7.9.5

11 years

[ACTIVITY] Week 3

by Riku Voipio

== Progress == * FOSDEM slides/demo 70% * debugging arndale network regression again (20%) == Plans == * Native ARM jenkins slaves (CARD-1729) * Connect / Sprint plans

11 years

[ACTIVITY] LAVA team weekly report, week 3

by lava-team＠linaro.org

**************** Team Work Logged **************** # tyler-baker Progress # * LAVA-1511 - Upstream Kernel CI * LAVA-1818 - Document Upstream Kernel CI Project on WIKI (80.0%) * Two updates done to the wiki here: https://wiki.linaro.org/ProductTechnology/kernelci.org * LAVA-1511 - Upstream Kernel CI * LAVA-1641 - 2. Filtering Distributed Results (20.0%) * Patch ack'd and applied to arm-soc after a few revisions. # stylesen Progress # * LAVA-1317 - lava-dispatcher maintenance * LAVA-1414 - LC: Linaro login integration with LAVA (100.0%) * Document the findings with solutions. # remi.duraffort(a)st.com Progress # * LAVA-1608 - General Team Items * LAVA-1611 - Remi's Bugs (52.17%) * Review + debugging/cleaning some code * Reviewing and testing 4273 * Reviews * LAVA-1429 - Dispatcher Refactoring * LAVA-1402 - DF: support "repeat" in the new job files (30.43%) * Trying to debug a "too many opened files" situation that this card triggers. This is linked to the way we handle logging handlers. * Review+Test * LAVA-1429 - Dispatcher Refactoring * LAVA-1401 - DF: Implement basic use cases for Panda, BBB (4.35%) * Review * LAVA-1429 - Dispatcher Refactoring * LAVA-1455 - Perform Kexec testing with the new dispatcher (13.04%) * Reviewing # stevan.radakovic Progress # * LAVA-1536 - LAVA Server * LAVA-1622 - Create Charts with non-numeric build numbers (100.0%) * Rebasing and adding migration files. # neil.williams(a)linaro.org Progress # * LAVA-1429 - Dispatcher Refactoring * LAVA-1401 - DF: Implement basic use cases for Panda, BBB (13.33%) * LAVA-1429 - Dispatcher Refactoring * LAVA-1804 - DF: Implement advanced use cases (100.0%) * LAVA-1429 - Dispatcher Refactoring * LAVA-1402 - DF: support "repeat" in the new job files (20.0%) # milo Progress # * LAVA-1511 - Upstream Kernel CI * LAVA-1554 - [backend] Email notification system (24.39%) * Written more tests, updated docs and deployed in production. * Reworked email trigger API and re-deployed. * LAVA-1511 - Upstream Kernel CI * LAVA-1811 - Frontend UI improvements/requests (9.76%) * Added logic to show qemu data if available. * LAVA-1511 - Upstream Kernel CI * LAVA-1782 - Create FAQ page for kernelci.org (4.88%) * Update FAQ page content and merge it into master. * LAVA-1511 - Upstream Kernel CI * LAVA-1783 - Create contact page for kernelci.org (2.44%) * Fixed typos and merged into master. * LAVA-1511 - Upstream Kernel CI * LAVA-1815 - File upload API (58.54%) * Started working on the file upload API. * Completed file upload API, need to clean it up and tweak small issues. **************** Team In-Progress **************** # georgy.redkozubov(a)linaro.org Plan # * LAVA-1817 - 1066 # milo.casagrande(a)linaro.org Plan # * LAVA-1651 - Health monitoring for components * LAVA-1554 - [backend] Email notification system * LAVA-1815 - File upload API # neil.williams(a)linaro.org Plan # * LAVA-1805 - Port Multinode support # remi.duraffort(a)linaro.org Plan # * LAVA-1784 - New device configuration * LAVA-1755 - ST boards support * LAVA-1680 - Factorize utils functions in a specific module * LAVA-1580 - Download Helper * LAVA-1577 - VCS Helper class # senthil.kumaran(a)linaro.org Plan # * LAVA-1809 - Cross check migrations * LAVA-1794 - Support non-numeric measurements * LAVA-1414 - LC: Linaro login integration with LAVA # stevan.radakovic(a)linaro.org Plan # * LAVA-1629 - 808 * LAVA-1598 - 330 * LAVA-1813 - LSK image reports migration # tyler.baker(a)linaro.org Plan # * LAVA-1792 - Tyler's Mentoring * LAVA-1786 - Connect Presentations * LAVA-1819 - Draft Blog Post for Upstream Kernel CI Project * LAVA-1818 - Document Upstream Kernel CI Project on WIKI * LAVA-1785 - Investigate and Integrate ZTE development board

11 years

[ACTIVITY] Week3

by Wookey

== Progress == * cross-gcc/gcc patch-sync updates automated * cross-defaults-gcc includes symlinks & alternatives * multilib cross-gcc builds fixed * more multiarch sync binNMUs * Upgraded build machine to jessie * Fixed equivs for multiarch - found some bugs * Worked on multiarch policy = Plans == == Issues == Breakage from Jessie upgrade (no printing, schroots bunged up, 30G of logs filled /) Wookey -- Principal hats: Linaro, Debian, Wookware, ARM http://wookware.org/

11 years

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