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4332 discussions

by David Gilbert

Hi, Thanks to those who tested the test program I sent out a few weeks ago. Thanks to dmart for pointing me at the kernel patch that fixes the futex problem that this test uncovered; see https://bugs.launchpad.net/ubuntu/+source/linux-linaro/+bug/884676 Dave

13 years, 6 months

[RFC PATCH v2 0/9] ARM: cpu topology Cortex-A9

by Vincent Guittot

The sched_mc feature has been originally designed to improve power consumption of multi-package system and several architecture functions are available to tune the topology and the scheduler's parameters when scheduler rebuilds the sched_domain hierarchy (change the sched_mc_power_savings level). This patches improve the power consumption of dual and quad cortex-A9 when the sched_mc_power_savings is set to 2. The following patches' policy is to accept up to 4 threads (can be configured) in the run queue of a core before starting to load balance if cpu runs at low frequencies but to accept only 1 thread for high frequencies, which is the normal behaviour. The goal is to use only one core in light load situation and all cores in heavy load situation Patches [1-2] modify the ARM cpu topology according to sched_mc_power_savings value and Cortex id. Patch [3] enables ARCH_POWER feature of the scheduler. Patch [4] adds arch_scale_freq_power function for ARM platform. Patches [5-6] modify the cpu_power of CA-9 according to sched_mc_power_savings' level and core frequency. The main goal is to increase the capacity of a core when using low cpu frequency in order to pull tasks on this core. Note that this behaviour is not really advised but it can be seen as an intermediate step between the use of cpu hotplug (which is not a power saving feature) and a new load balancer which will take into account low load situation on dual core. Patch [7] ensures that cpu0 is used in priority when only one CPU is running. Patch [8] adds some debugfs interface for test purpose. Patch [9] ensures that the cpu_power will be updated periodically. TODO list: -remove useless start of ilb when the core has capacity. -add a method (DT, sysfs, ...) to set threshold for using 1 or all cpus for CA-9 v2: *Modify the method to update cpu_power *There are fewer patches than v1 because some issues are fixed by patches that has been pushed for 3.2. *These patches has been tested on snowball and vexpress boards. *Performance results are similar to v1 v1: http://permalink.gmane.org/gmane.linux.linaro.devel/8087 Vincent

13 years, 6 months

[RFC PATCH v2 09/09] sched: Ensure cpu_power periodic update

by Vincent Guittot

With a lot of small task, the softirq sched is nearly never called when no_hz is enable. Te load_balance is mainly called with the newly_idle mode which doesn't update the cpu_power. Add a next_update field which ensure a maximum update period when there is short activity Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- include/linux/sched.h | 1 + kernel/sched_fair.c | 24 ++++++++++++++++-------- 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/include/linux/sched.h b/include/linux/sched.h index 41d0237..8610921 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -901,6 +901,7 @@ struct sched_group_power { * single CPU. */ unsigned int power, power_orig; + unsigned long next_update; }; struct sched_group { diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c index bc8ee99..320b7a0 100644 --- a/kernel/sched_fair.c +++ b/kernel/sched_fair.c @@ -91,6 +91,8 @@ unsigned int __read_mostly sysctl_sched_shares_window = 10000000UL; static const struct sched_class fair_sched_class; +static unsigned long __read_mostly max_load_balance_interval = HZ/10; + /************************************************************** * CFS operations on generic schedulable entities: */ @@ -2667,6 +2669,11 @@ static void update_group_power(struct sched_domain *sd, int cpu) struct sched_domain *child = sd->child; struct sched_group *group, *sdg = sd->groups; unsigned long power; + unsigned long interval; + + interval = msecs_to_jiffies(sd->balance_interval); + interval = clamp(interval, 1UL, max_load_balance_interval); + sdg->sgp->next_update = jiffies + interval; if (!child) { update_cpu_power(sd, cpu); @@ -2774,12 +2781,15 @@ static inline void update_sg_lb_stats(struct sched_domain *sd, * domains. In the newly idle case, we will allow all the cpu's * to do the newly idle load balance. */ - if (idle != CPU_NEWLY_IDLE && local_group) { - if (balance_cpu != this_cpu) { - *balance = 0; - return; - } - update_group_power(sd, this_cpu); + if (local_group) { + if (idle != CPU_NEWLY_IDLE) { + if (balance_cpu != this_cpu) { + *balance = 0; + return; + } + update_group_power(sd, this_cpu); + } else if (time_after_eq(jiffies, group->sgp->next_update)) + update_group_power(sd, this_cpu); } /* Adjust by relative CPU power of the group */ @@ -3879,8 +3889,6 @@ void select_nohz_load_balancer(int stop_tick) static DEFINE_SPINLOCK(balancing); -static unsigned long __read_mostly max_load_balance_interval = HZ/10; - /* * Scale the max load_balance interval with the number of CPUs in the system. * This trades load-balance latency on larger machines for less cross talk. -- 1.7.4.1

13 years, 6 months

[RFC PATCH v2 08/09] ARM: cpu topology: Add debugfs interface for cpu_power

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 113 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 113 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 945b980..053ce9c 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -25,6 +25,11 @@ #include <linux/cpufreq.h> #endif +#ifdef CONFIG_DEBUG_FS +#include <linux/debugfs.h> +#include <linux/uaccess.h> /* for copy_from_user */ +#endif + #include <asm/cputype.h> #include <asm/topology.h> @@ -474,3 +479,111 @@ void init_cpu_topology(void) } smp_wmb(); } + +/* + * debugfs interface for scaling cpu power + */ + +#ifdef CONFIG_DEBUG_FS +static struct dentry *topo_debugfs_root; + +static ssize_t dbg_write(struct file *file, const char __user *buf, + size_t size, loff_t *off) +{ + unsigned int *value = file->f_dentry->d_inode->i_private; + char cdata[128]; + unsigned long tmp; + unsigned int cpu; + + if (size < (sizeof(cdata)-1)) { + if (copy_from_user(cdata, buf, size)) + return -EFAULT; + cdata[size] = 0; + if (!strict_strtoul(cdata, 10, &tmp)) { + *value = tmp; + +#ifdef CONFIG_CPU_FREQ + for_each_online_cpu(cpu) + set_power_scale(cpu, cpu_power[cpu].id); +#endif + } + return size; + } + return -EINVAL; +} + +static ssize_t dbg_read(struct file *file, char __user *buf, + size_t size, loff_t *off) +{ + unsigned int *value = file->f_dentry->d_inode->i_private; + char cdata[128]; + unsigned int len; + + len = sprintf(cdata, "%u\n", *value); + return simple_read_from_buffer(buf, size, off, cdata, len); +} + +static const struct file_operations debugfs_fops = { + .read = dbg_read, + .write = dbg_write, +}; + +static struct dentry *topo_debugfs_register(unsigned int cpu, + struct dentry *parent) +{ + struct dentry *cpu_d, *d; + char cpu_name[16]; + + sprintf(cpu_name, "cpu%u", cpu); + + cpu_d = debugfs_create_dir(cpu_name, parent); + if (!cpu_d) + return NULL; + + d = debugfs_create_file("cpu_power", S_IRUGO | S_IWUGO, + cpu_d, &per_cpu(cpu_scale, cpu), &debugfs_fops); + if (!d) + goto err_out; + +#ifdef CONFIG_CPU_FREQ + d = debugfs_create_file("scale", S_IRUGO | S_IWUGO, + cpu_d, &cpu_power[cpu].id, &debugfs_fops); + if (!d) + goto err_out; + + d = debugfs_create_file("freq", S_IRUGO, + cpu_d, &cpu_power[cpu].freq, &debugfs_fops); + if (!d) + goto err_out; +#endif + return cpu_d; + +err_out: + debugfs_remove_recursive(cpu_d); + return NULL; +} + +static int __init topo_debugfs_init(void) +{ + struct dentry *d; + unsigned int cpu; + + d = debugfs_create_dir("cpu_topo", NULL); + if (!d) + return -ENOMEM; + topo_debugfs_root = d; + + for_each_possible_cpu(cpu) { + d = topo_debugfs_register(cpu, topo_debugfs_root); + if (d == NULL) + goto err_out; + } + return 0; + +err_out: + debugfs_remove_recursive(topo_debugfs_root); + return -ENOMEM; +} + +late_initcall(topo_debugfs_init); +#endif -- 1.7.4.1

13 years, 6 months

[RFC PATCH v2 07/09] ARM: cpu topology: Add asym topology flag for using cpu0 1st

by Vincent Guittot

Modify the CPU sched_domain flags in powersave mode for using the cpu0 in ched_mc powersave mode Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/include/asm/topology.h | 33 +++++++++++++++++++++++++++++++++ arch/arm/kernel/topology.c | 11 +++++++++++ 2 files changed, 44 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h index 58b8b84..f7f02e3 100644 --- a/arch/arm/include/asm/topology.h +++ b/arch/arm/include/asm/topology.h @@ -34,6 +34,39 @@ static inline void store_cpu_topology(unsigned int cpuid) { } #endif +/* Common values for CPUs */ +#ifndef SD_CPU_INIT +#define SD_CPU_INIT (struct sched_domain) { \ + .min_interval = 1, \ + .max_interval = 4, \ + .busy_factor = 64, \ + .imbalance_pct = 125, \ + .cache_nice_tries = 1, \ + .busy_idx = 2, \ + .idle_idx = 1, \ + .newidle_idx = 0, \ + .wake_idx = 0, \ + .forkexec_idx = 0, \ + \ + .flags = 1*SD_LOAD_BALANCE \ + | 1*SD_BALANCE_NEWIDLE \ + | 1*SD_BALANCE_EXEC \ + | 1*SD_BALANCE_FORK \ + | 0*SD_BALANCE_WAKE \ + | 1*SD_WAKE_AFFINE \ + | 0*SD_PREFER_LOCAL \ + | 0*SD_SHARE_CPUPOWER \ + | 0*SD_SHARE_PKG_RESOURCES \ + | 0*SD_SERIALIZE \ + | arch_sd_sibling_asym_packing() \ + | sd_balance_for_package_power() \ + | sd_power_saving_flags() \ + , \ + .last_balance = jiffies, \ + .balance_interval = 1, \ +} +#endif + #include <asm-generic/topology.h> #endif /* _ASM_ARM_TOPOLOGY_H */ diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index a1b1f7f..945b980 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -227,6 +227,17 @@ unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) } /* + * sched_domain flag configuration + */ +/* TODO add a config flag for this function */ +int arch_sd_sibling_asym_packing(void) +{ + if (sched_smt_power_savings || sched_mc_power_savings) + return SD_ASYM_PACKING; + return 0; +} + +/* * default topology function */ -- 1.7.4.1

13 years, 6 months

[RFC PATCH v2 06/09] ARM: cpu topology: Modify cpu_power according to cpufreq

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 134 +++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 126 insertions(+), 8 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 2774c5d..a1b1f7f 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -21,6 +21,10 @@ #include <linux/cpumask.h> #include <linux/cpuset.h> +#ifdef CONFIG_CPU_FREQ +#include <linux/cpufreq.h> +#endif + #include <asm/cputype.h> #include <asm/topology.h> @@ -54,6 +58,7 @@ struct cputopo_arm cpu_topology[NR_CPUS]; * using its own cpu_power even it's not always true because of * no_hz_idle_balance */ + static DEFINE_PER_CPU(unsigned int, cpu_scale); /* @@ -65,17 +70,127 @@ unsigned int advanced_topology = 1; static void normal_cpu_topology_mask(void); static void (*set_cpu_topology_mask)(void) = normal_cpu_topology_mask; -/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. - * The content of this table could be SoC specific so we should add a method to - * overwrite this default table. +#ifdef CONFIG_CPU_FREQ +/* + * This struct describes parameters to compute cpu_power + */ +struct cputopo_power { + int id; + int max; /* max idx in the table */ + unsigned int step; /* frequency step for the table */ + unsigned int *table; /* table of cpu_power */ +}; + +/* default table with one default cpu_power value */ +unsigned int table_default_power[1] = { + 1024 +}; + +static struct cputopo_power default_cpu_power = { + .max = 1, + .step = 1, + .table = table_default_power, +}; + +/* CA-9 table with cpufreq modifying cpu_power */ +#define CPU_MAX_FREQ 10 +/* we use a 200Mhz step for scaling cpu power */ +#define CPU_TOPO_FREQ_STEP 200000 +/* This table sets the cpu_power scale of a cpu according to 2 inputs which are + * the frequency and the sched_mc mode. The content of this table could be SoC + * specific so we should add a method to overwrite this default table. * TODO: Study how to use DT for setting this table */ +unsigned int table_ca9_power[CPU_MAX_FREQ] = { +/* freq< 200 400 600 800 1000 1200 1400 1600 1800 other*/ + 4096, 4096, 4096, 1024, 1024, 1024, 1024, 1024, 1024, 1024, /* Power save mode CA9 MP */ +}; + +static struct cputopo_power CA9_cpu_power = { + .max = CPU_MAX_FREQ, + .step = CPU_TOPO_FREQ_STEP, + .table = table_ca9_power, +}; + #define ARM_CORTEX_A9_DEFAULT_SCALE 0 #define ARM_CORTEX_A9_POWER_SCALE 1 /* This table list all possible cpu power configuration */ -unsigned int table_config[2] = { +struct cputopo_power *table_config[2] = { + &default_cpu_power, + &CA9_cpu_power, +}; + +struct cputopo_scale { + int id; + int freq; + struct cputopo_power *power; +}; + +/* + * The table will be mostly used by one cpu which will update the + * configuration for all cpu on a cpufreq notification + * or a sched_mc level change + */ +static struct cputopo_scale cpu_power[NR_CPUS]; + +static void set_cpufreq_scale(unsigned int cpuid, unsigned int freq) +{ + unsigned int idx; + + cpu_power[cpuid].freq = freq; + + idx = freq / cpu_power[cpuid].power->step; + if (idx >= cpu_power[cpuid].power->max) + idx = cpu_power[cpuid].power->max - 1; + + per_cpu(cpu_scale, cpuid) = cpu_power[cpuid].power->table[idx]; + smp_wmb(); +} + +static void set_power_scale(unsigned int cpu, unsigned int idx) +{ + cpu_power[cpu].id = idx; + cpu_power[cpu].power = table_config[idx]; + + set_cpufreq_scale(cpu, cpu_power[cpu].freq); +} + +static int topo_cpufreq_transition(struct notifier_block *nb, + unsigned long state, void *data) +{ + struct cpufreq_freqs *freqs = data; + + if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE) + set_cpufreq_scale(freqs->cpu, freqs->new); + + return NOTIFY_OK; +} + +static struct notifier_block topo_cpufreq_nb = { + .notifier_call = topo_cpufreq_transition, +}; + +static int topo_cpufreq_init(void) +{ + unsigned int cpu; + + /* TODO set initial value according to current freq */ + + /* init core mask */ + for_each_possible_cpu(cpu) { + cpu_power[cpu].freq = 0; + cpu_power[cpu].power = &default_cpu_power; + } + + return cpufreq_register_notifier(&topo_cpufreq_nb, + CPUFREQ_TRANSITION_NOTIFIER); +} +#else +#define ARM_CORTEX_A9_DEFAULT_SCALE 0 +#define ARM_CORTEX_A9_POWER_SCALE 0 +/* This table list all possible cpu power configuration */ +unsigned int table_config[1] = { 1024, - 4096 }; static void set_power_scale(unsigned int cpu, unsigned int idx) @@ -83,14 +198,17 @@ static void set_power_scale(unsigned int cpu, unsigned int idx) per_cpu(cpu_scale, cpu) = table_config[idx]; } +static inline int topo_cpufreq_init(void) {return 0; } +#endif + static int init_cpu_power_scale(void) { + /* register cpufreq notifer */ + topo_cpufreq_init(); + /* Do we need to change default config */ advanced_topology = 1; - /* force topology update */ - arch_update_cpu_topology(); - /* Force a cpu topology update */ rebuild_sched_domains(); -- 1.7.4.1

13 years, 6 months

[RFC PATCH v2 05/09] ARM: cpu topology: Modify cpu_power according to sched_mc level

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 43 +++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 41 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 9d80e22..2774c5d 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -19,6 +19,7 @@ #include <linux/nodemask.h> #include <linux/sched.h> #include <linux/cpumask.h> +#include <linux/cpuset.h> #include <asm/cputype.h> #include <asm/topology.h> @@ -61,6 +62,43 @@ static DEFINE_PER_CPU(unsigned int, cpu_scale); unsigned int advanced_topology = 1; +static void normal_cpu_topology_mask(void); +static void (*set_cpu_topology_mask)(void) = normal_cpu_topology_mask; + +/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. + * The content of this table could be SoC specific so we should add a method to + * overwrite this default table. + * TODO: Study how to use DT for setting this table + */ +#define ARM_CORTEX_A9_DEFAULT_SCALE 0 +#define ARM_CORTEX_A9_POWER_SCALE 1 +/* This table list all possible cpu power configuration */ +unsigned int table_config[2] = { + 1024, + 4096 +}; + +static void set_power_scale(unsigned int cpu, unsigned int idx) +{ + per_cpu(cpu_scale, cpu) = table_config[idx]; +} + +static int init_cpu_power_scale(void) +{ + /* Do we need to change default config */ + advanced_topology = 1; + + /* force topology update */ + arch_update_cpu_topology(); + + /* Force a cpu topology update */ + rebuild_sched_domains(); + + return 0; +} + +core_initcall(init_cpu_power_scale); + /* * Update the cpu power */ @@ -129,6 +167,7 @@ static void normal_cpu_topology_mask(void) for_each_possible_cpu(cpuid) { default_cpu_topology_mask(cpuid); + set_power_scale(cpuid, ARM_CORTEX_A9_DEFAULT_SCALE); } smp_wmb(); } @@ -139,7 +178,6 @@ static void normal_cpu_topology_mask(void) */ static void power_cpu_topology_mask_CA9(void) { - unsigned int cpuid, cpu; for_each_possible_cpu(cpuid) { @@ -164,6 +202,7 @@ static void power_cpu_topology_mask_CA9(void) } } } + set_power_scale(cpuid, ARM_CORTEX_A9_POWER_SCALE); } smp_wmb(); } @@ -278,7 +317,7 @@ int arch_update_cpu_topology(void) /* set topology policy */ update_cpu_topology_policy(); - /* set topology mask*/ + /* set topology mask and power */ (*set_cpu_topology_mask)(); return 1; -- 1.7.4.1

13 years, 6 months

[RFC PATCH v2 04/09] ARM: scheduler: add a cpu_power function

by Vincent Guittot

Add an architecture specific function for setting cpu_power Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index af1c3e6..9d80e22 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -45,12 +45,32 @@ struct cputopo_arm cpu_topology[NR_CPUS]; /* + * cpu power scale management + */ + +/* + * a per cpu data structure should be better because each cpu is mainly + * using its own cpu_power even it's not always true because of + * no_hz_idle_balance + */ +static DEFINE_PER_CPU(unsigned int, cpu_scale); + +/* * cpu topology mask management */ unsigned int advanced_topology = 1; /* + * Update the cpu power + */ + +unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) +{ + return per_cpu(cpu_scale, cpu); +} + +/* * default topology function */ @@ -281,6 +301,8 @@ void init_cpu_topology(void) cpu_topo->socket_id = -1; cpumask_clear(&cpu_topo->core_sibling); cpumask_clear(&cpu_topo->thread_sibling); + + per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; } smp_wmb(); } -- 1.7.4.1

13 years, 6 months

[RFC PATCH v2 03/09] ARM: cpu topology: Enable ARCH_POWER

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- kernel/sched_features.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/kernel/sched_features.h b/kernel/sched_features.h index 2e74677..85f8bd9 100644 --- a/kernel/sched_features.h +++ b/kernel/sched_features.h @@ -47,7 +47,7 @@ SCHED_FEAT(CACHE_HOT_BUDDY, 1) /* * Use arch dependent cpu power functions */ -SCHED_FEAT(ARCH_POWER, 0) +SCHED_FEAT(ARCH_POWER, 1) SCHED_FEAT(HRTICK, 0) SCHED_FEAT(DOUBLE_TICK, 0) -- 1.7.4.1

13 years, 6 months

[RFC PATCH v2 02/09] ARM: cpu topology: modify cpu topology

by Vincent Guittot

Modify the CPU topology policy according to the sched_mc level and the cortex family Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 80 +++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 76 insertions(+), 4 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 90352cb..af1c3e6 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -18,6 +18,7 @@ #include <linux/node.h> #include <linux/nodemask.h> #include <linux/sched.h> +#include <linux/cpumask.h> #include <asm/cputype.h> #include <asm/topology.h> @@ -47,7 +48,7 @@ struct cputopo_arm cpu_topology[NR_CPUS]; * cpu topology mask management */ -unsigned int advanced_topology = 0; +unsigned int advanced_topology = 1; /* * default topology function @@ -113,6 +114,74 @@ static void normal_cpu_topology_mask(void) } /* + * For Cortex-A9 MPcore, we emulate a multi-package topology in power mode. + * The goal is to gathers tasks on 1 virtual package + */ +static void power_cpu_topology_mask_CA9(void) +{ + + unsigned int cpuid, cpu; + + for_each_possible_cpu(cpuid) { + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; + + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if ((cpuid_topo->socket_id == cpu_topo->socket_id) + && ((cpuid & 0x1) == (cpu & 0x1))) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + } + smp_wmb(); +} + +#define ARM_FAMILY_MASK 0xFF0FFFF0 +#define ARM_CORTEX_A9_FAMILY 0x410FC090 + +/* update_cpu_topology_policy select a cpu topology policy according to the + * available cores. + * TODO: The current version assumes that all cores are exactly the same which + * might not be true. We need to update it to take into account various + * configuration among which system with different kind of core. + */ +static int update_cpu_topology_policy(void) +{ + unsigned long cpuid; + + if (sched_mc_power_savings == POWERSAVINGS_BALANCE_NONE) { + set_cpu_topology_mask = normal_cpu_topology_mask; + return 0; + } + + cpuid = read_cpuid_id(); + cpuid &= ARM_FAMILY_MASK; + + switch (cpuid) { + case ARM_CORTEX_A9_FAMILY: + set_cpu_topology_mask = power_cpu_topology_mask_CA9; + break; + default: + set_cpu_topology_mask = normal_cpu_topology_mask; + break; + } + + return 0; +} + +/* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, * which prevents simultaneous write access to cpu_topology array @@ -183,11 +252,14 @@ int arch_update_cpu_topology(void) if (!advanced_topology) return 0; - /* clear core mask */ + /* clear core threads mask */ clear_cpu_topology_mask(); - /* update core and thread sibling masks */ - normal_cpu_topology_mask(); + /* set topology policy */ + update_cpu_topology_policy(); + + /* set topology mask*/ + (*set_cpu_topology_mask)(); return 1; } -- 1.7.4.1

13 years, 6 months

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