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4332 discussions

Re: [PATCH] HWMON: DA9052/53 hwmon driver v2

by Ashish Jangam

On Tue, 2012-02-21 at 16:48 +0530, Ashish Jangam wrote: > On Fri, 2012-02-10 at 07:58 -0500, Ashish Jangam wrote: > > The DA9052 PMIC provides an Analogue to Digital Converter with 10 bits > > resolution and 10 channels. > > > > + * Dialog Semiconductors DA9052-BC and DA9053-AA/Bx PMICs > > + Prefix: 'da9052' > > + Datasheet: Kindly visit www.dialog-semiconductor.com/product_table.php > > + and request for the official datasheet. > > + > Not really. From practical experience, the datasheet is not available > except for Dialog Semiconductor customers - not even for me to review > the driver (and that appears to be independent of my employer's > relationship with Dialog Semiconductor). I think this should read "not > publicly available". It is a bit misleading to suggest that it would be > available if that is not the case. Agreed. > > > +static const char * const input_names[] = { > > + [DA9052_ADC_VDDOUT] = "VDDOUT", > > + [DA9052_ADC_ICH] = "CHARGING CURRENT", > > + [DA9052_ADC_TBAT] = "BATTERY TEMP", > > + [DA9052_ADC_VBAT] = "BATTERY VOLTAGE", > > + [DA9052_ADC_IN4] = "ADC IN4", > > + [DA9052_ADC_IN5] = "ADC IN5", > > + [DA9052_ADC_IN6] = "ADC IN6", > > + [DA9052_ADC_TJUNC] = "BATTERY JUNCTION TEMP", > > + [DA9052_ADC_VBBAT] = "BACK-UP BATTERY VOLTAGE", > > +}; > > + > Where are those defines, or, in other words, which repository/branch is > your patch based on ? I don't see it in the current mainline kernel. The incremental ADC patch to the da9052 mfd core takes care of all such issues. However that patch is still under review...hoping to get it thru soon.

13 years, 4 months

Replicating Linaro Images to more memory cards

by Sudhangathan B S

I'm using Gumstix Overo-Fire. I need to replicate my systems to deploy and test my setup. Right now I have one uSD memory card which is working fine, but when I copy the whole card using either the `tar cvpf` or dd commands, the image doesn't work on any other memory card. Below is the console message when it hangs. I have tried many memory cards. Looks like Linaro images store the memory card ID and search for them during the boot time, which will obviously fail on a different card. Is there any way I can make my Linaro Image memory card independent.... so that my replication becomes easy..?? These are the last lines from the console messages during the boot, with the replicated memory card. [ 6.605651] usbcore: registered new interface driver usbhid [ 6.617279] usbhid: USB HID core driver Gave up waiting for root device. Common problems: - Boot args (cat /proc/cmdline) - Check rootdelay= (did the system wait long enough?) - Check root= (did the system wait for the right device?) - Missing modules (cat /proc/modules; ls /dev) ALERT! /dev/disk/by-uuid/17fb7403-3757-4533-b783-7be5436d9882 does not exist. ! --------------------------------- Sudhangathan BS Ph:(+91) 9731-905-205 ---------------------------------

13 years, 4 months

[PATCH] HWMON: DA9052/53 hwmon driver v2

by Ashish Jangam

The DA9052 PMIC provides an Analogue to Digital Converter with 10 bits resolution and 10 channels. This patch montiors the DA9052 PMIC's ADC channels mostly for battery parameters like battery temperature, junction temperature, battery current etc. This patch is functionally tested on Samsung SMDKV6410. Signed-off-by: David Dajun Chen <dchen(a)diasemi.com> Signed-off-by: Ashish Jangam <ashish.jangam(a)kpitcummins.com> --- Changes since v1 - Update documentation file for url - Modify the entry in Kconfig file - Correct reporting of junction temperature - Add conversion function for backup battery voltage - Change labels for temperatures in the device attributes to follow sensor index --- Documentation/hwmon/da9052 | 62 ++++++++ drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/da9052-hwmon.c | 344 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 417 insertions(+), 0 deletions(-) create mode 100644 Documentation/hwmon/da9052 create mode 100644 drivers/hwmon/da9052-hwmon.c diff --git a/Documentation/hwmon/da9052 b/Documentation/hwmon/da9052 new file mode 100644 index 0000000..7caa066 --- /dev/null +++ b/Documentation/hwmon/da9052 @@ -0,0 +1,62 @@ +Supported chips: + * Dialog Semiconductors DA9052-BC and DA9053-AA/Bx PMICs + Prefix: 'da9052' + Datasheet: Kindly visit www.dialog-semiconductor.com/product_table.php + and request for the official datasheet. + +Authors: David Dajun Chen <dchen(a)diasemi.com> + +Description +----------- + +The DA9052/53 provides an Analogue to Digital Converter (ADC) with 10 bits +resolution and track and hold circuitry combined with an analogue input +multiplexer. The analogue input multiplexer will allow conversion of up to 10 +different inputs. The track and hold circuit ensures stable input voltages at +the input of the ADC during the conversion. + +The ADC is used to measure the following inputs: +Channel 0: VDDOUT - measurement of the system voltage +Channel 1: ICH - internal battery charger current measurement +Channel 2: TBAT - output from the battery NTC +Channel 3: VBAT - measurement of the battery voltage +Channel 4: ADC_IN4 - high impedance input (0 - 2.5V) +Channel 5: ADC_IN5 - high impedance input (0 - 2.5V) +Channel 6: ADC_IN6 - high impedance input (0 - 2.5V) +Channel 7: XY - TSI interface to measure the X and Y voltage of the touch +screen resistive potentiometers +Channel 8: Internal Tjunc. - sense (internal temp. sensor) +Channel 9: VBBAT - measurement of the backup battery voltage + +By using sysfs attributes we can measure the system voltage VDDOUT, the battery +charging current ICH, battery temperature TBAT, battery junction temperature +TJUNC, battery voltage VBAT and the back up battery voltage VBBAT. + +Voltage Monitoring +------------------ + +Voltages are sampled by a 10 bit ADC. + +The battery voltage is calculated as: + Milli volt = ((ADC value * 1000) / 512) + 2500 + +The backup battery voltage is calculated as: + Milli volt = (ADC value * 2500) / 512; + +The voltages on ADC channels 4, 5 and 6 are calculated as: + Milli volt = (ADC value * 2500) / 1023 + +Temperature Monitoring +---------------------- + +Temperatures are sampled by a 10 bit ADC. Junction and battery temperatures +are monitored by the ADC channels. + +The junction temperature is calculated: + Degrees celsius = 1.708 * (TJUNC_RES - T_OFFSET) - 108.8 +The junction temperature attribute is supported by the driver. + +The battery temperature is calculated: + Degree Celcius = 1 / (t1 + 1/298)- 273 +where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255)) +Default values of R25, B, ITBAT are 10e3, 3380 and 50e-6 respectively. diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 24d584a..42b5f1a 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -313,6 +313,16 @@ config SENSORS_DS1621 This driver can also be built as a module. If so, the module will be called ds1621. +config SENSORS_DA9052_ADC + tristate "Dialog DA9052/DA9053 ADC" + depends on PMIC_DA9052 + help + Say y here to support the ADC found on Dialog Semiconductor + DA9052-BC and DA9053-AA/Bx PMICs. + + This driver can also be built as module. If so, the module + will be called da9052-hwmon. + config SENSORS_EXYNOS4_TMU tristate "Temperature sensor on Samsung EXYNOS4" depends on ARCH_EXYNOS4 diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 8251ce8..5fe96e5 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_SENSORS_APPLESMC) += applesmc.o obj-$(CONFIG_SENSORS_ASC7621) += asc7621.o obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o +obj-$(CONFIG_SENSORS_DA9052_ADC)+= da9052-hwmon.o obj-$(CONFIG_SENSORS_DME1737) += dme1737.o obj-$(CONFIG_SENSORS_DS620) += ds620.o obj-$(CONFIG_SENSORS_DS1621) += ds1621.o diff --git a/drivers/hwmon/da9052-hwmon.c b/drivers/hwmon/da9052-hwmon.c new file mode 100644 index 0000000..9bef6ab --- /dev/null +++ b/drivers/hwmon/da9052-hwmon.c @@ -0,0 +1,344 @@ +/* + * HWMON Driver for Dialog DA9052 + * + * Copyright(c) 2012 Dialog Semiconductor Ltd. + * + * Author: David Dajun Chen <dchen(a)diasemi.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/hwmon-sysfs.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/slab.h> +#include <linux/platform_device.h> + +#include <linux/mfd/da9052/da9052.h> +#include <linux/mfd/da9052/reg.h> + +struct da9052_hwmon { + struct da9052 *da9052; + struct device *class_device; + struct mutex hwmon_lock; +}; + +static const char * const input_names[] = { + [DA9052_ADC_VDDOUT] = "VDDOUT", + [DA9052_ADC_ICH] = "CHARGING CURRENT", + [DA9052_ADC_TBAT] = "BATTERY TEMP", + [DA9052_ADC_VBAT] = "BATTERY VOLTAGE", + [DA9052_ADC_IN4] = "ADC IN4", + [DA9052_ADC_IN5] = "ADC IN5", + [DA9052_ADC_IN6] = "ADC IN6", + [DA9052_ADC_TJUNC] = "BATTERY JUNCTION TEMP", + [DA9052_ADC_VBBAT] = "BACK-UP BATTERY VOLTAGE", +}; + +/* Conversion function for VDDOUT and VBAT */ +static inline int volt_reg_to_mV(int value) +{ + return ((value * 1000) / 512) + 2500; +} + +/* Conversion function for ADC channels 4, 5 and 6 */ +static inline int input_reg_to_mV(int value) +{ + return (value * 2500) / 1023; +} + +/* Conversion function for VBBAT */ +static inline int vbbat_reg_to_mV(int value) +{ + return (value * 2500) / 512; +} + +static int da9052_enable_vddout_channel(struct da9052 *da9052) +{ + int ret; + + ret = da9052_reg_read(da9052, DA9052_ADC_CONT_REG); + if (ret < 0) + return ret; + + ret |= DA9052_ADCCONT_AUTOVDDEN; + + return da9052_reg_write(da9052, DA9052_ADC_CONT_REG, ret); +} + +static int da9052_disable_vddout_channel(struct da9052 *da9052) +{ + int ret; + + ret = da9052_reg_read(da9052, DA9052_ADC_CONT_REG); + if (ret < 0) + return ret; + + ret &= ~DA9052_ADCCONT_AUTOVDDEN; + + return da9052_reg_write(da9052, DA9052_ADC_CONT_REG, ret); +} + +static ssize_t da9052_read_vddout(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct da9052_hwmon *hwmon = dev_get_drvdata(dev); + int ret, vdd; + + mutex_lock(&hwmon->hwmon_lock); + + ret = da9052_enable_vddout_channel(hwmon->da9052); + if (ret < 0) + goto hwmon_err; + + vdd = da9052_reg_read(hwmon->da9052, DA9052_VDD_RES_REG); + if (vdd < 0) { + ret = vdd; + goto hwmon_err_release; + } + + ret = da9052_disable_vddout_channel(hwmon->da9052); + if (ret < 0) + goto hwmon_err; + + mutex_unlock(&hwmon->hwmon_lock); + return sprintf(buf, "%d\n", volt_reg_to_mV(vdd)); + +hwmon_err_release: + da9052_disable_vddout_channel(hwmon->da9052); +hwmon_err: + mutex_unlock(&hwmon->hwmon_lock); + return ret; +} + +static ssize_t da9052_read_ich(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct da9052_hwmon *hwmon = dev_get_drvdata(dev); + int ret; + + ret = da9052_reg_read(hwmon->da9052, DA9052_ICHG_AV_REG); + if (ret < 0) + return ret; + + /* Equivalent to 3.9mA/bit in register ICHG_AV */ + return sprintf(buf, "%d\n", DIV_ROUND_CLOSEST(ret * 39, 10)); +} + +static ssize_t da9052_read_tbat(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct da9052_hwmon *hwmon = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", da9052_adc_read_temp(hwmon->da9052)); +} + +static ssize_t da9052_read_vbat(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct da9052_hwmon *hwmon = dev_get_drvdata(dev); + int ret; + + ret = da9052_adc_manual_read(hwmon->da9052, DA9052_ADC_VBAT); + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", volt_reg_to_mV(ret)); +} + +static ssize_t da9052_read_misc_channel(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct da9052_hwmon *hwmon = dev_get_drvdata(dev); + int channel = to_sensor_dev_attr(devattr)->index; + int ret; + + ret = da9052_adc_manual_read(hwmon->da9052, channel); + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", input_reg_to_mV(ret)); +} + +static ssize_t da9052_read_tjunc(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct da9052_hwmon *hwmon = dev_get_drvdata(dev); + int tjunc; + int toffset; + + tjunc = da9052_reg_read(hwmon->da9052, DA9052_TJUNC_RES_REG); + if (tjunc < 0) + return tjunc; + + toffset = da9052_reg_read(hwmon->da9052, DA9052_T_OFFSET_REG); + if (toffset < 0) + return toffset; + + /* + * Degrees celsius = 1.708 * (TJUNC_RES - T_OFFSET) - 108.8 + * T_OFFSET is a trim value used to improve accuracy of the result + */ + return sprintf(buf, "%d\n", 1708 * (tjunc - toffset) - 108800); +} + +static ssize_t da9052_read_vbbat(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct da9052_hwmon *hwmon = dev_get_drvdata(dev); + int ret; + + ret = da9052_adc_manual_read(hwmon->da9052, DA9052_ADC_VBBAT); + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", vbbat_reg_to_mV(ret)); +} + +static ssize_t da9052_hwmon_show_name(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + return sprintf(buf, "da9052-hwmon\n"); +} + +static ssize_t show_label(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return sprintf(buf, "%s\n", + input_names[to_sensor_dev_attr(devattr)->index]); +} + +static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, da9052_read_vddout, NULL, + DA9052_ADC_VDDOUT); +static SENSOR_DEVICE_ATTR(in0_label, S_IRUGO, show_label, NULL, + DA9052_ADC_VDDOUT); +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, da9052_read_vbat, NULL, + DA9052_ADC_VBAT); +static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, + DA9052_ADC_VBAT); +static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, da9052_read_misc_channel, NULL, + DA9052_ADC_IN4); +static SENSOR_DEVICE_ATTR(in4_label, S_IRUGO, show_label, NULL, + DA9052_ADC_IN4); +static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, da9052_read_misc_channel, NULL, + DA9052_ADC_IN5); +static SENSOR_DEVICE_ATTR(in5_label, S_IRUGO, show_label, NULL, + DA9052_ADC_IN5); +static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, da9052_read_misc_channel, NULL, + DA9052_ADC_IN6); +static SENSOR_DEVICE_ATTR(in6_label, S_IRUGO, show_label, NULL, + DA9052_ADC_IN6); +static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, da9052_read_vbbat, NULL, + DA9052_ADC_VBBAT); +static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, + DA9052_ADC_VBBAT); + +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, da9052_read_ich, NULL, + DA9052_ADC_ICH); +static SENSOR_DEVICE_ATTR(curr1_label, S_IRUGO, show_label, NULL, + DA9052_ADC_ICH); + +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, da9052_read_tbat, NULL, + DA9052_ADC_TBAT); +static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, show_label, NULL, + DA9052_ADC_TBAT); +static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, da9052_read_tjunc, NULL, + DA9052_ADC_TJUNC); +static SENSOR_DEVICE_ATTR(temp8_label, S_IRUGO, show_label, NULL, + DA9052_ADC_TJUNC); + +static DEVICE_ATTR(name, S_IRUGO, da9052_hwmon_show_name, NULL); + +static struct attribute *da9052_attr[] = { + &dev_attr_name.attr, + &sensor_dev_attr_in0_input.dev_attr.attr, + &sensor_dev_attr_in0_label.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_in3_label.dev_attr.attr, + &sensor_dev_attr_in4_input.dev_attr.attr, + &sensor_dev_attr_in4_label.dev_attr.attr, + &sensor_dev_attr_in5_input.dev_attr.attr, + &sensor_dev_attr_in5_label.dev_attr.attr, + &sensor_dev_attr_in6_input.dev_attr.attr, + &sensor_dev_attr_in6_label.dev_attr.attr, + &sensor_dev_attr_in9_input.dev_attr.attr, + &sensor_dev_attr_in9_label.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr1_label.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp2_label.dev_attr.attr, + &sensor_dev_attr_temp8_input.dev_attr.attr, + &sensor_dev_attr_temp8_label.dev_attr.attr, + NULL +}; + +static const struct attribute_group da9052_attr_group = {.attrs = da9052_attr}; + +static int __init da9052_hwmon_probe(struct platform_device *pdev) +{ + struct da9052_hwmon *hwmon; + int ret; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(struct da9052_hwmon), + GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + mutex_init(&hwmon->hwmon_lock); + hwmon->da9052 = dev_get_drvdata(pdev->dev.parent); + + platform_set_drvdata(pdev, hwmon); + + ret = sysfs_create_group(&pdev->dev.kobj, &da9052_attr_group); + if (ret) + goto err_mem; + + hwmon->class_device = hwmon_device_register(&pdev->dev); + if (IS_ERR(hwmon->class_device)) { + ret = PTR_ERR(hwmon->class_device); + goto err_sysfs; + } + + return 0; + +err_sysfs: + sysfs_remove_group(&pdev->dev.kobj, &da9052_attr_group); +err_mem: + return ret; +} + +static int __devexit da9052_hwmon_remove(struct platform_device *pdev) +{ + struct da9052_hwmon *hwmon = platform_get_drvdata(pdev); + + hwmon_device_unregister(hwmon->class_device); + sysfs_remove_group(&pdev->dev.kobj, &da9052_attr_group); + + return 0; +} + +static struct platform_driver da9052_hwmon_driver = { + .probe = da9052_hwmon_probe, + .remove = __devexit_p(da9052_hwmon_remove), + .driver = { + .name = "da9052-hwmon", + .owner = THIS_MODULE, + }, +}; + +module_platform_driver(da9052_hwmon_driver); + +MODULE_AUTHOR("David Dajun Chen <dchen(a)diasemi.com>"); +MODULE_DESCRIPTION("DA9052 HWMON driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:da9052-hwmon");

13 years, 4 months

Query: Multiple Mappings to Mem and ARMV6+

by viresh kumar

Hi Guys, Sorry for starting the long old thread again, but i have to start it as i was a bit confused. :( We know that we can't have multiple mappings with different attributes to the same physical memory on ARMv6+ machines due to speculative prefetch. So, we have following kind of mappings in kernel now (please correct me if i am wrong): - Low Mem: Mapped at boot time to - Normal Cacheable - Bufferable - ioremap() - blocked on Low Mem, so that we don't create Device type mapping to same mem - dma_alloc_coherent() and others: - Without DMA_MEM_BUFFERABLE selected - gives strongly ordered mem (i.e. Non cacheable - Non Bufferable) - With DMA_MEM_BUFFERABLE selected - gives Normal - Non cacheable - Bufferable mapping - Maybe some other too... I have a doubt with the last mapping mentioned above. We have two mappings possibly to the same physical memory, with different attributes: One is Cacheable and other one is not. Is this allowed by ARM? Because the patch in which Russell blocked ioremap on Low Mem, he clearly mentioned that these attributes are also important and they should be same. Sorry if i am missing something :) -- viresh

13 years, 4 months

[DOWNTIME] Android Build is down due to Ubuntu's sun-java6 package revocation

by Paul Sokolovsky

Hello, Recently, Ubuntu revoked sun-java6-* packages following retirement of its license: https://lists.ubuntu.com/archives/ubuntu-security-announce/2012-January/001… It propagated to the repositories we use for android-build.linaro.org slaves on this weekend. The end effect of this besides builds not being able to proceed, is slave pile-up issue, as Jenkins, seeing an initialization error for one slave, tries to start another, all going in cycles. As it's pretty late in here, the action I'm taking is disabling builds altogether, to proceed with resolving this first thing in the morning (access to previous builds is still available). Proposed actions are: 1. Install sun-java6-* from cached .deb's as risk-mitigating measure while analyzing the issue. 2. Consider/test switching to OpenJDK, as recommended by https://wiki.ubuntu.com/LucidLynx/ReleaseNotes/Java6Transition . Note that sun-java6 have been, and still is, listed by Google as the Android build prerequisite: http://source.android.com/source/initializing.html However, there were success reports with OpenJDK from individual developers previously. -- Best Regards, Paul Linaro.org | Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog

13 years, 4 months

12.02 Release Testing

by Zach Pfeffer

Hello everyone! Welcome back from Connect,ABS and ELC. I hope everyone had a safe trip home. Tony has listed the testing volunteers at: https://wiki.linaro.org/Cycles/1202/Release/PointOfContacts Please fill out the new QA test sheets for the following builds. We're only testing one Panda build (tracking). i.MX53 Quick Start, botao-sun https://android-build.linaro.org/builds/~linaro-android/imx53-ics-gcc46-fre… https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AkxwyUNxNaAadDE1M… i.MX6, bero https://android-build.linaro.org/builds/~linaro-android/imx6-ics-gcc46-free… https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AkxwyUNxNaAadDE1M… Origen, pfefferz https://android-build.linaro.org/builds/~linaro-android/origen-ics-gcc46-sa… https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AkxwyUNxNaAadDRDV… PandaBoard 4460, bhoj https://android-build.linaro.org/builds/~linaro-android/panda-ics-gcc46-til… https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AkxwyUNxNaAadGVWd… PandaBoard 4430, abhishek https://android-build.linaro.org/builds/~linaro-android/panda-ics-gcc46-til… https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AkxwyUNxNaAadGVWd… Snowball, mansson https://android-build.linaro.org/builds/~linaro-android/snowball-ics-gcc46-… https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AkxwyUNxNaAadEF1N… vexpress-a9, pundiramit https://android-build.linaro.org/builds/~linaro-android/vexpress-ics-gcc46-… https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AkxwyUNxNaAadExQd… Note the new layout of the testsheets. Also note that you should fill out the r1202 column and not edit the release names or the test names in each sheet since they're actually being imported now from a mastersheet. Patrik Ryd, would you boot test: https://android-build.linaro.org/builds/~linaro-android/panda-ics-gcc46-kwg… https://android-build.linaro.org/builds/~linaro-android/panda-ics-gcc46-oma… on 4430? (Look at the tip build of https://android-build.linaro.org/builds/~linaro-android/panda-ics-gcc46-oma… for special instructions) Please enter just the boot test into the spreadsheets. bhoj would you boot test 4460? I'd also like everyone to update the build notes for each release build you test. Paul would you put eveyone on the To: list on the access list for editing the build notes? The build notes should be a release specific copy of the tip. If you look at: https://android-build.linaro.org/builds/~linaro-android/panda-ics-gcc46-til… you'll see notes listed. Each release should have build notes. To update the release notes login and select the build in jenkins: https://android-build.linaro.org/jenkins Click add description. You'll probably want to take the from from the 12.01 releases (there's a little formatting). Send me questions. Thanks again to everyone for working so hard for Connect,ABS and ELC. Lets get 12.02 out the door and blast off to 12.03. -- Zach Pfeffer Android Platform Team Lead, Linaro Platform Teams Linaro.org | Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog

13 years, 4 months

Ask a question that use Linaro to develop app ?

by peter.meng

HI I'm newbie for Linaro . I understand that Linaro just provide the toolchains , u-boot, kernel after view the guide quickly . I want to know how about the basic function such as busybox etc . I assume that buy a board such as Pandaboard ES that use Linaro to do application develop as following action Step 1 install toolchain from Linaro Step 2 compile u-boot from Linaro Step 3 compile linux kernel from Linaro Step 4 I need compile such as busybox etc for root filesystem by myself . Is this step correctly ? Thanks a lot Best Regards . Peter Meng mengsanshui(a)gmail.com

13 years, 4 months

[PATCH] sched: generalize CONFIG_IRQ_TIME_ACCOUNTING for X86 and ARM

by Dmitry Antipov

Generalize CONFIG_IRQ_TIME_ACCOUNTING between X86 and ARM, move "noirqtime=" option to common debugging code. For a bit of backward compatibility, X86-specific option "tsc=noirqtime" is preserved, but issues a warning. Suggested-by: Yong Zhang <yong.zhang0(a)gmail.com> Suggested-by: Russell King <rmk+kernel(a)arm.linux.org.uk> Acked-by: Venkatesh Pallipadi <venki(a)google.com> Signed-off-by: Dmitry Antipov <dmitry.antipov(a)linaro.org> --- Documentation/kernel-parameters.txt | 9 +++++---- arch/arm/kernel/sched_clock.c | 2 ++ arch/x86/Kconfig | 11 ----------- arch/x86/kernel/tsc.c | 12 ++++++------ include/linux/sched.h | 17 ++++++++++------- kernel/sched/core.c | 20 +++++++++++--------- lib/Kconfig.debug | 12 ++++++++++++ 7 files changed, 46 insertions(+), 37 deletions(-) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 033d4e6..a5da255 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1790,6 +1790,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. noirqdebug [X86-32] Disables the code which attempts to detect and disable unhandled interrupt sources. + noirqtime [X86,ARM] Run time disables IRQ_TIME_ACCOUNTING and + eliminates the timestamping on irq/softirq entry/exit. + no_timer_check [X86,APIC] Disables the code which tests for broken timer IRQ sources. @@ -2636,10 +2639,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. as the stability checks done at bootup. Used to enable high-resolution timer mode on older hardware, and in virtualized environment. - [x86] noirqtime: Do not use TSC to do irq accounting. - Used to run time disable IRQ_TIME_ACCOUNTING on any - platforms where RDTSC is slow and this accounting - can add overhead. + [x86] noirqtime: obsoleted by "noirqtime" generic option, + see it's documentation for details. turbografx.map[2|3]= [HW,JOY] TurboGraFX parallel port interface diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index 5416c7c..30b5f89 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c @@ -144,6 +144,8 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) */ cd.epoch_ns = 0; + enable_sched_clock_irqtime(); + pr_debug("Registered %pF as sched_clock source\n", read); } diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5bed94e..4759676 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -805,17 +805,6 @@ config SCHED_MC making when dealing with multi-core CPU chips at a cost of slightly increased overhead in some places. If unsure say N here. -config IRQ_TIME_ACCOUNTING - bool "Fine granularity task level IRQ time accounting" - default n - ---help--- - Select this option to enable fine granularity task irq time - accounting. This is done by reading a timestamp on each - transitions between softirq and hardirq state, so there can be a - small performance impact. - - If in doubt, say N here. - source "kernel/Kconfig.preempt" config X86_UP_APIC diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index a62c201..f1b2b63 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -103,14 +103,15 @@ int __init notsc_setup(char *str) __setup("notsc", notsc_setup); -static int no_sched_irq_time; - static int __init tsc_setup(char *str) { if (!strcmp(str, "reliable")) tsc_clocksource_reliable = 1; - if (!strncmp(str, "noirqtime", 9)) - no_sched_irq_time = 1; + if (!strncmp(str, "noirqtime", 9)) { + printk(KERN_WARNING "tsc: tsc=noirqtime is " + "obsolete, use noirqtime instead\n"); + disable_sched_clock_irqtime(); + } return 1; } @@ -978,8 +979,7 @@ void __init tsc_init(void) /* now allow native_sched_clock() to use rdtsc */ tsc_disabled = 0; - if (!no_sched_irq_time) - enable_sched_clock_irqtime(); + enable_sched_clock_irqtime(); lpj = ((u64)tsc_khz * 1000); do_div(lpj, HZ); diff --git a/include/linux/sched.h b/include/linux/sched.h index 7d379a6..9b13f79 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1961,13 +1961,16 @@ extern void sched_clock_idle_wakeup_event(u64 delta_ns); #endif #ifdef CONFIG_IRQ_TIME_ACCOUNTING -/* - * An i/f to runtime opt-in for irq time accounting based off of sched_clock. - * The reason for this explicit opt-in is not to have perf penalty with - * slow sched_clocks. - */ -extern void enable_sched_clock_irqtime(void); -extern void disable_sched_clock_irqtime(void); +extern int sched_clock_irqtime; +static inline void enable_sched_clock_irqtime(void) +{ + if (sched_clock_irqtime == -1) + sched_clock_irqtime = 1; +} +static inline void disable_sched_clock_irqtime(void) +{ + sched_clock_irqtime = 0; +} #else static inline void enable_sched_clock_irqtime(void) {} static inline void disable_sched_clock_irqtime(void) {} diff --git a/kernel/sched/core.c b/kernel/sched/core.c index 5255c9d..a7ec043 100644 --- a/kernel/sched/core.c +++ b/kernel/sched/core.c @@ -757,18 +757,20 @@ static DEFINE_PER_CPU(u64, cpu_hardirq_time); static DEFINE_PER_CPU(u64, cpu_softirq_time); static DEFINE_PER_CPU(u64, irq_start_time); -static int sched_clock_irqtime; -void enable_sched_clock_irqtime(void) -{ - sched_clock_irqtime = 1; -} +/* -1 if not initialized, 0 if disabled with "noirqtime" kernel option + * or after unstable clock was detected, 1 if enabled and active. + */ +int sched_clock_irqtime = -1; -void disable_sched_clock_irqtime(void) +static int __init irqtime_setup(char *str) { sched_clock_irqtime = 0; + return 1; } +__setup("noirqtime", irqtime_setup); + #ifndef CONFIG_64BIT static DEFINE_PER_CPU(seqcount_t, irq_time_seq); @@ -822,7 +824,7 @@ void account_system_vtime(struct task_struct *curr) s64 delta; int cpu; - if (!sched_clock_irqtime) + if (sched_clock_irqtime < 1) return; local_irq_save(flags); @@ -2853,7 +2855,7 @@ void account_process_tick(struct task_struct *p, int user_tick) cputime_t one_jiffy_scaled = cputime_to_scaled(cputime_one_jiffy); struct rq *rq = this_rq(); - if (sched_clock_irqtime) { + if (sched_clock_irqtime > 0) { irqtime_account_process_tick(p, user_tick, rq); return; } @@ -2887,7 +2889,7 @@ void account_steal_ticks(unsigned long ticks) void account_idle_ticks(unsigned long ticks) { - if (sched_clock_irqtime) { + if (sched_clock_irqtime > 0) { irqtime_account_idle_ticks(ticks); return; } diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug index 8745ac7..236e814 100644 --- a/lib/Kconfig.debug +++ b/lib/Kconfig.debug @@ -299,6 +299,18 @@ config SCHEDSTATS application, you can say N to avoid the very slight overhead this adds. +config IRQ_TIME_ACCOUNTING + bool "Fine granularity task level IRQ time accounting" + depends on X86 || ARM + default n + ---help--- + Select this option to enable fine granularity task irq time + accounting. This is done by reading a timestamp on each + transitions between softirq and hardirq state, so there can be a + small performance impact. + + If in doubt, say N here. + config TIMER_STATS bool "Collect kernel timers statistics" depends on DEBUG_KERNEL && PROC_FS -- 1.7.7.6

13 years, 4 months

[PATCH][V3] ux500 : decouple/recouple gic from the PRCMU

by Daniel Lezcano

This patch allows to decouple and recouple the gic from the PRCMU. This is needed to put the A9 core in retention mode with the cpuidle driver. Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> --- drivers/mfd/db8500-prcmu.c | 32 ++++++++++++++++++++++++++++++++ include/linux/mfd/db8500-prcmu.h | 2 ++ include/linux/mfd/dbx500-prcmu.h | 16 ++++++++++++++++ 3 files changed, 50 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index af8e0ef..9baf4cd 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -787,6 +787,38 @@ int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll) return 0; } +#define PRCMU_A9_MASK_REQ 0x00000328 +#define PRCMU_A9_MASK_REQ_MASK 0x00000001 +#define PRCMU_GIC_DELAY 1 + +/* This function decouple the gic from the prcmu */ +int db8500_prcmu_gic_decouple(void) +{ + u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Set bit 0 register value to 1 */ + writel(val | PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Make sure the register is updated */ + readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Wait a few cycles for the gic mask completion */ + udelay(PRCMU_GIC_DELAY); + + return 0; +} + +/* This function recouple the gic with the prcmu */ +int db8500_prcmu_gic_recouple(void) +{ + u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Set bit 0 register value to 0 */ + writel(val & ~PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ); + + return 0; +} + /* This function should only be called while mb0_transfer.lock is held. */ static void config_wakeups(void) { diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index 60d27f7..a3c7eba 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h @@ -536,6 +536,8 @@ int prcmu_load_a9wdog(u8 id, u32 val); void db8500_prcmu_system_reset(u16 reset_code); int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll); +int db8500_prcmu_gic_decouple(void); +int db8500_prcmu_gic_recouple(void); void db8500_prcmu_enable_wakeups(u32 wakeups); int db8500_prcmu_set_epod(u16 epod_id, u8 epod_state); int db8500_prcmu_request_clock(u8 clock, bool enable); diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index bac942f..d38cf7d 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -237,6 +237,22 @@ static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, keep_ap_pll); } +static inline int prcmu_gic_decouple(void) +{ + if (machine_is_u5500()) + return -EINVAL; + else + return db8500_prcmu_gic_decouple(); +} + +static inline int prcmu_gic_recouple(void) +{ + if (machine_is_u5500()) + return -EINVAL; + else + return db8500_prcmu_gic_recouple(); +} + static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) { if (machine_is_u5500()) -- 1.7.5.4

13 years, 4 months

my LWN article on big.LITTLE

by Nicolas Pitre

For those of you interested by the topic, my article was published today. With a LWN subscription (or freely accessible in 2 weeks), it can be viewed here: http://lwn.net/Articles/481055/ The comments section is growing fast already! Nicolas

13 years, 4 months

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