From: Mike Turquette <mturquette(a)ti.com>
The common clock framework defines a common struct clk as well as an
implementation of the clk api that unifies clock operations on various
platforms and devices.
The net result is consolidation of many different struct clk definitions
and platform-specific clock framework implementations.
I consider this version merge-worthy pending ACKs from the relevant
maintainers; namely Russell, Thomas and the platform folks interested in
porting to this framework.
I would like to thank everyone who participated in the common clk
sessions at Linaro Connect and ELC; the feedback was invaluable.
Also I would like to thank Shawn Guo, Richard Zhao, Saravana Kannan and
Magnus Damm for tirelessly updating their platforms for the last few
revisions of this patch series and providng excellent feedback each
time.
Major changes since v4:
* rolled in TGLX's comments on overall design. We now have,
* proper handling of root clocks and orphan clocks
* multi-parent clocks are handled in the core
* struct clk is shielded from struct clk_foo and vice versa
* this is a return to the previous struct clk_hw design
* split basic clock types out into separate files
* split headers up by purpose
* clk.h remains the driver-level interface
* declarations for rate change notifiers are the only additions
* clk-provider.h is primary header for implementing clock operations
* clk-private.h allows for static initialization of clock data
* validation and bug fixes
* rebased onto Linus' v3.3-rc5 tag
Patches can be pulled from:
git://git.linaro.org/people/mturquette/linux.git v3.3-rc5-clkv5
v4 can be found at,
http://article.gmane.org/gmane.linux.linaro.devel/8896/
v3 can be found at,
http://article.gmane.org/gmane.linux.kernel/1218622
Mike Turquette (4):
Documentation: common clk API
clk: Kconfig: add entry for HAVE_CLK_PREPARE
clk: introduce the common clock framework
clk: basic clock hardware types
Documentation/clk.txt | 201 +++++++
drivers/clk/Kconfig | 31 +
drivers/clk/Makefile | 2 +
drivers/clk/clk-divider.c | 199 +++++++
drivers/clk/clk-fixed-rate.c | 81 +++
drivers/clk/clk-gate.c | 121 ++++
drivers/clk/clk-mux.c | 114 ++++
drivers/clk/clk.c | 1323 ++++++++++++++++++++++++++++++++++++++++++
include/linux/clk-private.h | 192 ++++++
include/linux/clk-provider.h | 294 ++++++++++
include/linux/clk.h | 68 ++-
11 files changed, 2621 insertions(+), 5 deletions(-)
create mode 100644 Documentation/clk.txt
create mode 100644 drivers/clk/clk-divider.c
create mode 100644 drivers/clk/clk-fixed-rate.c
create mode 100644 drivers/clk/clk-gate.c
create mode 100644 drivers/clk/clk-mux.c
create mode 100644 drivers/clk/clk.c
create mode 100644 include/linux/clk-private.h
create mode 100644 include/linux/clk-provider.h
Cc: Jeremy Kerr <jeremy.kerr(a)canonical.com>
Cc: Thomas Gleixner <tglx(a)linutronix.de>
Cc: Arnd Bergman <arnd.bergmann(a)linaro.org>
Cc: Paul Walmsley <paul(a)pwsan.com>
Cc: Shawn Guo <shawn.guo(a)freescale.com>
Cc: Richard Zhao <richard.zhao(a)linaro.org>
Cc: Saravana Kannan <skannan(a)codeaurora.org>
Cc: Magnus Damm <magnus.damm(a)gmail.com>
Cc: Rob Herring <rob.herring(a)calxeda.com>
Cc: Mark Brown <broonie(a)opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij(a)stericsson.com>
Cc: Stephen Boyd <sboyd(a)codeaurora.org>
Cc: Amit Kucheria <amit.kucheria(a)linaro.org>
Cc: Deepak Saxena <dsaxena(a)linaro.org>
Cc: Grant Likely <grant.likely(a)secretlab.ca>
Cc: Andrew Lunn <andrew(a)lunn.ch>
--
1.7.5.4
Sent from Samsung MobileAndy Green <andy.green(a)linaro.org> wrote:On 03/16/2012 10:46 PM, Somebody in the thread at some point said:
> If you look at tilt-android-tracking, there is a complete 1.8 SGX
> (usable on ICS) on fairly recent basis which includes its own rpmsg
> stack as part of the SGX port. The matching userlands are available via
> google AOSP.
>
> http://git.linaro.org/gitweb?p=landing-teams/working/ti/kernel.git;a=shortl…
>
> We also have what's currently only working on
>
>
> I was a bit unclear. Sorry. First, we are thinking of using Linux for
> this task instead of Android. We want rpmsg support to get access to the
> m3 devices for h264 encoding and decoding. with pvr I basically meant a
> dss which can be used to compile rsalvetis pvr omap 4 kernel module.
Bit unclear is an understatement in this case ^^ rpmsg is a complete red
herring then.
1.7 SGX as currently used in Ubuntu does not use rpmsg. All the
currently available mm decode solutions for Ubuntu don't use it yet
either, they use its predecessor "syslink".
If you check out tilt-3.1 branch from our repo that has working syslink
+ tiler pieces needed by the mm decode pieces in Ubuntu and will build
against SGX dkms.
-Andy
--
Andy Green | TI Landing Team Leader
Linaro.org │ Open source software for ARM SoCs | Follow Linaro
http://facebook.com/pages/Linaro/155974581091106 -
http://twitter.com/#!/linaroorg - http://linaro.org/linaro-blog
So what you are basically saying is forget rpmsg for the time being? Do you know if gst-ducati works with syslink then?
thank you so much for your help so far.
Hi,
I am currently playing with a couple of the development boards for which
there are Linaro hwpacks and LEBs. Since what I am trying to do requires
a lot of disk and network I/O, I've been paying special attention to the
data transfer rates I can get out of these boards.
Below is a brief summary of my findings.
1) i.MX 53
* disk I/O using an external SSD drive is very good; good enough to
not require further measurements
* network I/O is approximately 9-10 MByte/s (perhaps more) which
seems ok given the 100 MBit/s Ethernet interface
2) Snowball (PDK, version 8)
* it seems to be impossible to get the USB OTG host mode to work,
therefore I could not test disk I/O with a USB drive; it appears
the OTG port on the version 8 board does not even have enough power
for a powered USB to actually go online (I am unaware of the
details of how this works unfortunately)
* performing network I/O with netcat casues netcat, ksoftirqd and
kworker to use ~33% of the CPU each, resulting in 100% CPU usage
only to handle the network data transfer
* the resulting network transfer rate is about 5.5 MByte/s, which
is significantly less than what the 100 MBit/s Ethernet interface
should be able to produce
3) Origen
* the internal USB hub runs at Full Speed (12 MBit/s), resulting in a
maximum USB disk I/O of 1.5 MByte/s
* since the board does not feature Ethernet itself, I tried to attach
a USB Ethernet controller to it, but of course the transfer rate
through that is by the I/O upper limit of the USB hub
* I did not test wireless but it is not feasible for what I am trying
to do anyway
I guess not all of this is surprising. The i.MX performs quite well but
unfortunately the CPU is quite slow compared to the others. However, I
wonder whether the USB OTG host mode issue on the Snowball is a known
problem? Also, network I/O occupying all of the CPU seems to be a bug or
at least a dodgy driver. About the Origen: I assume there is nothing
that can be done to have High Speed USB on it?
Thanks in advance! If anyone needs me to provide more information, I'll
gladly try to do that.
Regards,
Jannis
This is the first announcement on upcoming changes to the supported
Linaro GCC versions.
GCC 4.7 is expected out in the next two weeks. We plan to switch to
4.7 for the Linaro GCC 2012.04 release and, as part of that, will put
Linaro GCC 4.6 into maintenance and retire Linaro GCC 4.5. While in
maintenance we will continue to update, fix bugs, and do releases on
4.6. No further changes or releases will be made to 4.5. All
historical releases and branches will stay available.
For more informatio, please see the flyer at:
https://wiki.linaro.org/WorkingGroups/ToolChain/Flyer
especially the section on Lifecycle:
https://wiki.linaro.org/WorkingGroups/ToolChain/Flyer#Lifecycle
The formal change notes will be sent after the 2012.04 release.
-- Michael
Greetings,
If someone has something which is not in the mainline, was not in the
12.01 kernel release, but worth including into the 12.02 kernel release,
please let me know by the end of Feb 14, PST (the git branch where I
could pull from). This release will be v3.3-rc3 based, so you patches
should be based on that (easiest for me), or on the tip of the linus tree.
My expectations are that the power management WG has some topics to add
to the 12.02.
I am aware of git://git.secretlab.ca/git/linux-2.6.git, irqdomain/next
The kernel working group has some blueprints for 12.02. Please let me
know, if there is something for me to do here.
The following commits from linux-linaro-3.2 branch will be carried over
to 12.02:
commit 2eb6f8b98d8471c83be7e3ab53fe4386884c96a9
Author: Vincent Guittot <vincent.guittot(a)linaro.org>
Date: Fri Oct 21 09:02:47 2011 +0200
sched: Ensure cpu_power periodic update
commit 2b21b980917662503a16e079b5d4a5a8a17886cd
Author: Arnd Bergmann <arnd(a)arndb.de>
Date: Sat Oct 8 17:07:50 2011 +0200
ARM: kprobes: work around build errors
commit 61d24dd4d0528d369ea81f6e5d5e1db9c62ad46a
Author: Ming Lei <ming.lei(a)canonical.com>
Date: Wed Aug 31 00:03:13 2011 +0800
usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
Amit (Amit Daniel Kachhap), please let me know if for 12.02 I should use
the commits below, or take an updated version from you:
ARM: exynos4: Add thermal sensor driver platform device support
thermal: exynos4: Register the tmu sensor with the thermal interface layer
thermal: exynos: Add thermal interface support for linux thermal layer
thermal: Add generic cpu cooling implementation
thermal: Add a new trip type to use cooling device instance number
EXYNOS: Make EXYNOS common cpufreq driver
ARM: exynos: Enable l2 configuration through device tree
ARM: exynos: remove useless code to save/restore L2
ARM: exynos: save L2 settings during bootup
ARM: s5p: add L2 early resume code
ARM: exynos: Add support AFTR mode on EXYNOS4210
Thanks,
Andrey Konovalov
From: "Ying-Chun Liu (PaulLiu)" <paul.liu(a)linaro.org>
Anatop is a mfd chip embedded in Freescale i.MX6Q SoC.
Anatop provides regulators and thermal.
This driver handles the address space and the operation of the mfd device.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org>
Acked-by: Shawn Guo <shawn.guo(a)linaro.org>
Cc: Samuel Ortiz <sameo(a)linux.intel.com>
Cc: Mark Brown <broonie(a)opensource.wolfsonmicro.com>
Cc: Venu Byravarasu <vbyravarasu(a)nvidia.com>
Cc: Peter Korsgaard <jacmet(a)sunsite.dk>
Cc: Arnd Bergmann <arnd(a)arndb.de>
Cc: Rob Lee <rob.lee(a)linaro.org>
---
drivers/mfd/Kconfig | 8 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/anatop-mfd.c | 137 ++++++++++++++++++++++++++++++++++++++++++++
include/linux/mfd/anatop.h | 40 +++++++++++++
4 files changed, 186 insertions(+), 0 deletions(-)
create mode 100644 drivers/mfd/anatop-mfd.c
create mode 100644 include/linux/mfd/anatop.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 82da448..c3a9f31 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -846,6 +846,14 @@ config MFD_INTEL_MSIC
Passage) chip. This chip embeds audio, battery, GPIO, etc.
devices used in Intel Medfield platforms.
+config MFD_ANATOP
+ bool "Support for Freescale i.MX on-chip ANATOP controller"
+ depends on SOC_IMX6Q
+ help
+ Select this option to enable Freescale i.MX on-chip ANATOP
+ MFD controller. This controller embeds regulator and
+ thermal devices for Freescale i.MX platforms.
+
endmenu
endif
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 27430d3..42c8bf6 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -113,3 +113,4 @@ obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o
obj-$(CONFIG_MFD_AAT2870_CORE) += aat2870-core.o
obj-$(CONFIG_MFD_INTEL_MSIC) += intel_msic.o
obj-$(CONFIG_MFD_S5M_CORE) += s5m-core.o s5m-irq.o
+obj-$(CONFIG_MFD_ANATOP) += anatop-mfd.o
diff --git a/drivers/mfd/anatop-mfd.c b/drivers/mfd/anatop-mfd.c
new file mode 100644
index 0000000..2af4248
--- /dev/null
+++ b/drivers/mfd/anatop-mfd.c
@@ -0,0 +1,137 @@
+/*
+ * Anatop MFD driver
+ *
+ * Copyright (C) 2012 Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org>
+ * Copyright (C) 2012 Linaro
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/mfd/anatop.h>
+
+u32 anatop_get_bits(struct anatop *adata, u32 addr, int bit_shift,
+ int bit_width)
+{
+ u32 val, mask;
+
+ if (bit_width == 32)
+ mask = ~0;
+ else
+ mask = (1 << bit_width) - 1;
+
+ val = readl(adata->ioreg + addr);
+ val = (val >> bit_shift) & mask;
+
+ return val;
+}
+EXPORT_SYMBOL_GPL(anatop_get_bits);
+
+void anatop_set_bits(struct anatop *adata, u32 addr, int bit_shift,
+ int bit_width, u32 data)
+{
+ u32 val, mask;
+
+ if (bit_width == 32)
+ mask = ~0;
+ else
+ mask = (1 << bit_width) - 1;
+
+ spin_lock(&adata->reglock);
+ val = readl(adata->ioreg + addr) & ~(mask << bit_shift);
+ writel((data << bit_shift) | val, adata->ioreg + addr);
+ spin_unlock(&adata->reglock);
+}
+EXPORT_SYMBOL_GPL(anatop_set_bits);
+
+static const struct of_device_id of_anatop_match[] = {
+ { .compatible = "fsl,imx6q-anatop", },
+ { },
+};
+
+static int __devinit of_anatop_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ void *ioreg;
+ struct anatop *drvdata;
+
+ ioreg = of_iomap(np, 0);
+ if (!ioreg)
+ return -EADDRNOTAVAIL;
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+ drvdata->ioreg = ioreg;
+ spin_lock_init(&drvdata->reglock);
+ platform_set_drvdata(pdev, drvdata);
+ of_platform_populate(np, of_anatop_match, NULL, dev);
+
+ return 0;
+}
+
+static int __devexit of_anatop_remove(struct platform_device *pdev)
+{
+ struct anatop *drvdata;
+ drvdata = platform_get_drvdata(pdev);
+ iounmap(drvdata->ioreg);
+
+ return 0;
+}
+
+static struct platform_driver anatop_of_driver = {
+ .driver = {
+ .name = "anatop-mfd",
+ .owner = THIS_MODULE,
+ .of_match_table = of_anatop_match,
+ },
+ .probe = of_anatop_probe,
+ .remove = of_anatop_remove,
+};
+
+static int __init anatop_init(void)
+{
+ return platform_driver_register(&anatop_of_driver);
+}
+postcore_initcall(anatop_init);
+
+static void __exit anatop_exit(void)
+{
+ platform_driver_unregister(&anatop_of_driver);
+}
+module_exit(anatop_exit);
+
+MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org>");
+MODULE_DESCRIPTION("ANATOP MFD driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/anatop.h b/include/linux/mfd/anatop.h
new file mode 100644
index 0000000..22c1007
--- /dev/null
+++ b/include/linux/mfd/anatop.h
@@ -0,0 +1,40 @@
+/*
+ * anatop.h - Anatop MFD driver
+ *
+ * Copyright (C) 2012 Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org>
+ * Copyright (C) 2012 Linaro
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __LINUX_MFD_ANATOP_H
+#define __LINUX_MFD_ANATOP_H
+
+#include <linux/spinlock.h>
+
+/**
+ * anatop - MFD data
+ * @ioreg: ioremap register
+ * @reglock: spinlock for register read/write
+ */
+struct anatop {
+ void *ioreg;
+ spinlock_t reglock;
+};
+
+extern u32 anatop_get_bits(struct anatop *, u32, int, int);
+extern void anatop_set_bits(struct anatop *, u32, int, int, u32);
+
+#endif /* __LINUX_MFD_ANATOP_H */
--
1.7.9.1