On Thu, Apr 03, 2025 at 12:55:46PM +0530, Anshuman Khandual wrote:
On 3/27/25 17:08, Leo Yan wrote:
Some CoreSight components have trace bus clocks 'atclk' and are enabled using clk_prepare_enable(). These clocks are not disabled when modules exit.
As atclk is optional, use devm_clk_get_optional_enabled() to manage it. The benefit is the driver model layer can automatically disable and release clocks.
Check the returned value with IS_ERR() to detect errors but leave the NULL pointer case if the clock is not found. And remove the error handling codes which are no longer needed.
Fixes: d1839e687773 ("coresight: etm: retrieve and handle atclk") Signed-off-by: Leo Yan leo.yan@arm.com
This patch probably should be positioned right after [PATCH 4/9] which replaces pclk clock init with devm_clk_get_enabled().
Sure. Will reorder patches for this.
Thanks, Leo